* [PATCH 1/2] dt-bindings: net: altr,socfpga-stmmac: add more interrupts for Agilex5
@ 2026-06-26 4:25 Dinh Nguyen
2026-06-26 4:25 ` [PATCH 2/2] arm64: dts: socfpga: agilex5: update channel interrupts for gmac1 and gmac2 Dinh Nguyen
` (2 more replies)
0 siblings, 3 replies; 7+ messages in thread
From: Dinh Nguyen @ 2026-06-26 4:25 UTC (permalink / raw)
To: robh, krzk+dt, conor+dt
Cc: dinguyen, devicetree, muhammad.nazim.amirul.nazle.asmade
The stmmac hardware on Agilex5 supports 8 TX/RX queue pairs and is
dma-coherent. Update the schema to handle the hardware differences
between SoC variants.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
---
.../bindings/net/altr,socfpga-stmmac.yaml | 51 +++++++++++++++++--
1 file changed, 46 insertions(+), 5 deletions(-)
diff --git a/Documentation/devicetree/bindings/net/altr,socfpga-stmmac.yaml b/Documentation/devicetree/bindings/net/altr,socfpga-stmmac.yaml
index fc445ad5a1f1..9bae17688992 100644
--- a/Documentation/devicetree/bindings/net/altr,socfpga-stmmac.yaml
+++ b/Documentation/devicetree/bindings/net/altr,socfpga-stmmac.yaml
@@ -62,12 +62,28 @@ properties:
- const: stmmaceth
- const: ptp_ref
- interrupts:
- maxItems: 1
-
interrupt-names:
- items:
- - const: macirq
+ oneOf:
+ - items:
+ - const: macirq
+ - items:
+ - const: macirq
+ - const: tx-queue-0
+ - const: tx-queue-1
+ - const: tx-queue-2
+ - const: tx-queue-3
+ - const: tx-queue-4
+ - const: tx-queue-5
+ - const: tx-queue-6
+ - const: tx-queue-7
+ - const: rx-queue-0
+ - const: rx-queue-1
+ - const: rx-queue-2
+ - const: rx-queue-3
+ - const: rx-queue-4
+ - const: rx-queue-5
+ - const: rx-queue-6
+ - const: rx-queue-7
iommus:
minItems: 1
@@ -149,10 +165,35 @@ required:
- clocks
- clock-names
- altr,sysmgr-syscon
+ - interrupts
+ - interrupt-names
allOf:
- $ref: snps,dwmac.yaml#
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: altr,socfpga-stmmac-agilex5
+ then:
+ properties:
+ interrupts:
+ minItems: 17
+ maxItems: 17
+
+ interrupt-names:
+ minItems: 17
+ maxItems: 17
+
+ dma-coherent: true
+ else:
+ properties:
+ interrupts:
+ minItems: 1
+
+ dma-coherent: false
+
unevaluatedProperties: false
examples:
--
2.42.0.411.g813d9a9188
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH 2/2] arm64: dts: socfpga: agilex5: update channel interrupts for gmac1 and gmac2
2026-06-26 4:25 [PATCH 1/2] dt-bindings: net: altr,socfpga-stmmac: add more interrupts for Agilex5 Dinh Nguyen
@ 2026-06-26 4:25 ` Dinh Nguyen
2026-06-26 4:31 ` sashiko-bot
2026-06-26 4:31 ` [PATCH 1/2] dt-bindings: net: altr,socfpga-stmmac: add more interrupts for Agilex5 sashiko-bot
2026-06-26 16:08 ` Conor Dooley
2 siblings, 1 reply; 7+ messages in thread
From: Dinh Nguyen @ 2026-06-26 4:25 UTC (permalink / raw)
To: robh, krzk+dt, conor+dt
Cc: dinguyen, devicetree, muhammad.nazim.amirul.nazle.asmade
Populate the gmac1 and gmac2 interrupt list to support 8 TX/RX queue
pairs.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
---
.../arm64/boot/dts/intel/socfpga_agilex5.dtsi | 72 +++++++++++++++++--
1 file changed, 68 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
index 2096decb5655..f54767d1526e 100644
--- a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
@@ -702,8 +702,40 @@ gmac1: ethernet@10820000 {
compatible = "altr,socfpga-stmmac-agilex5",
"snps,dwxgmac-2.10";
reg = <0x10820000 0x3500>;
- interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "macirq";
+ interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "macirq",
+ "tx-queue-0",
+ "tx-queue-1",
+ "tx-queue-2",
+ "tx-queue-3",
+ "tx-queue-4",
+ "tx-queue-5",
+ "tx-queue-6",
+ "tx-queue-7",
+ "rx-queue-0",
+ "rx-queue-1",
+ "rx-queue-2",
+ "rx-queue-3",
+ "rx-queue-4",
+ "rx-queue-5",
+ "rx-queue-6",
+ "rx-queue-7";
resets = <&rst EMAC1_RESET>, <&rst EMAC1_OCP_RESET>;
reset-names = "stmmaceth", "ahb";
clocks = <&clkmgr AGILEX5_EMAC1_CLK>,
@@ -816,8 +848,40 @@ gmac2: ethernet@10830000 {
compatible = "altr,socfpga-stmmac-agilex5",
"snps,dwxgmac-2.10";
reg = <0x10830000 0x3500>;
- interrupts = <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "macirq";
+ interrupts = <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 228 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 230 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 231 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 232 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 234 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 235 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 236 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 237 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "macirq",
+ "tx-queue-0",
+ "tx-queue-1",
+ "tx-queue-2",
+ "tx-queue-3",
+ "tx-queue-4",
+ "tx-queue-5",
+ "tx-queue-6",
+ "tx-queue-7",
+ "rx-queue-0",
+ "rx-queue-1",
+ "rx-queue-2",
+ "rx-queue-3",
+ "rx-queue-4",
+ "rx-queue-5",
+ "rx-queue-6",
+ "rx-queue-7";
resets = <&rst EMAC2_RESET>, <&rst EMAC2_OCP_RESET>;
reset-names = "stmmaceth", "ahb";
clocks = <&clkmgr AGILEX5_EMAC2_CLK>,
--
2.42.0.411.g813d9a9188
^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [PATCH 2/2] arm64: dts: socfpga: agilex5: update channel interrupts for gmac1 and gmac2
2026-06-26 4:25 ` [PATCH 2/2] arm64: dts: socfpga: agilex5: update channel interrupts for gmac1 and gmac2 Dinh Nguyen
@ 2026-06-26 4:31 ` sashiko-bot
2026-06-26 10:53 ` Dinh Nguyen
0 siblings, 1 reply; 7+ messages in thread
From: sashiko-bot @ 2026-06-26 4:31 UTC (permalink / raw)
To: Dinh Nguyen; +Cc: devicetree, robh, conor+dt
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Incomplete DT update: gmac0 is left with an invalid interrupt count that will fail dtbs validation.
--
commit ce31f4c657e3508e9aef68e6da54a09c1d243026
Author: Dinh Nguyen <dinguyen@kernel.org>
arm64: dts: socfpga: agilex5: update channel interrupts for gmac1 and gmac2
Populate the gmac1 and gmac2 interrupt list to support 8 TX/RX queue
pairs.
> diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> index 02e62d954e949..140e4bf9fb155 100644
> --- a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> +++ b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> @@ -670,8 +670,40 @@ gmac1: ethernet@10820000 {
> compatible = "altr,socfpga-stmmac-agilex5",
> "snps,dwxgmac-2.10";
> reg = <0x10820000 0x3500>;
[Severity: Medium]
Should gmac0 also be updated to include 17 interrupts?
Looking earlier in the same file, gmac0 uses the exact same
"altr,socfpga-stmmac-agilex5" compatible string, but this patch
leaves it configured with only a single interrupt:
arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi:
gmac0: ethernet@10810000 {
compatible = "altr,socfpga-stmmac-agilex5",
"snps,dwxgmac-2.10";
reg = <0x10810000 0x3500>;
interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq";
...
}
Since the device tree binding strictly requires 17 interrupts for this
specific compatible string, won't skipping gmac0 result in dtbs_check
validation errors and leave its queues without dedicated interrupts at
runtime?
> - interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "macirq";
> + interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
[ ... ]
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260626042541.1091774-1-dinguyen@kernel.org?part=2
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH 2/2] arm64: dts: socfpga: agilex5: update channel interrupts for gmac1 and gmac2
2026-06-26 4:31 ` sashiko-bot
@ 2026-06-26 10:53 ` Dinh Nguyen
0 siblings, 0 replies; 7+ messages in thread
From: Dinh Nguyen @ 2026-06-26 10:53 UTC (permalink / raw)
To: sashiko-reviews; +Cc: devicetree, robh, conor+dt
On 6/25/26 23:31, sashiko-bot@kernel.org wrote:
> Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
> - [Medium] Incomplete DT update: gmac0 is left with an invalid interrupt count that will fail dtbs validation.
> --
>
> commit ce31f4c657e3508e9aef68e6da54a09c1d243026
> Author: Dinh Nguyen <dinguyen@kernel.org>
>
> arm64: dts: socfpga: agilex5: update channel interrupts for gmac1 and gmac2
>
> Populate the gmac1 and gmac2 interrupt list to support 8 TX/RX queue
> pairs.
>
>> diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
>> index 02e62d954e949..140e4bf9fb155 100644
>> --- a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
>> +++ b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
>> @@ -670,8 +670,40 @@ gmac1: ethernet@10820000 {
>> compatible = "altr,socfpga-stmmac-agilex5",
>> "snps,dwxgmac-2.10";
>> reg = <0x10820000 0x3500>;
>
> [Severity: Medium]
> Should gmac0 also be updated to include 17 interrupts?
>
There was an earlier patch that updatee gmac0 to 17 interrupts:
https://lore.kernel.org/all/20260609131641.28476-1-muhammad.nazim.amirul.nazle.asmade@altera.com/
Dinh
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 1/2] dt-bindings: net: altr,socfpga-stmmac: add more interrupts for Agilex5
2026-06-26 4:25 [PATCH 1/2] dt-bindings: net: altr,socfpga-stmmac: add more interrupts for Agilex5 Dinh Nguyen
2026-06-26 4:25 ` [PATCH 2/2] arm64: dts: socfpga: agilex5: update channel interrupts for gmac1 and gmac2 Dinh Nguyen
@ 2026-06-26 4:31 ` sashiko-bot
2026-06-26 16:08 ` Conor Dooley
2 siblings, 0 replies; 7+ messages in thread
From: sashiko-bot @ 2026-06-26 4:31 UTC (permalink / raw)
To: Dinh Nguyen; +Cc: conor+dt, devicetree, robh
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Removing the top-level constraints for `interrupts` and `interrupt-names` without restoring them in the `else` block allows older variants to incorrectly pass schema validation with up to 17 interrupts.
--
commit b9bb703e842480b5efde889d362af4d3e53520cb
Author: Dinh Nguyen <dinguyen@kernel.org>
dt-bindings: net: altr,socfpga-stmmac: add more interrupts for Agilex5
The stmmac hardware on Agilex5 supports 8 TX/RX queue pairs and is
dma-coherent. This commit updates the schema to handle the hardware
differences between SoC variants.
> diff --git a/Documentation/devicetree/bindings/net/altr,socfpga-stmmac.yaml b/Documentation/devicetree/bindings/net/altr,socfpga-stmmac.yaml
> index fc445ad5a1f1a..9bae17688992c 100644
> --- a/Documentation/devicetree/bindings/net/altr,socfpga-stmmac.yaml
> +++ b/Documentation/devicetree/bindings/net/altr,socfpga-stmmac.yaml
[ ... ]
> @@ -62,12 +62,28 @@ properties:
> - const: stmmaceth
> - const: ptp_ref
>
> - interrupts:
> - maxItems: 1
> -
> interrupt-names:
[ ... ]
> @@ -149,10 +165,35 @@ required:
[ ... ]
> allOf:
> - $ref: snps,dwmac.yaml#
>
> + - if:
> + properties:
> + compatible:
> + contains:
> + const: altr,socfpga-stmmac-agilex5
> + then:
> + properties:
> + interrupts:
> + minItems: 17
> + maxItems: 17
> +
> + interrupt-names:
> + minItems: 17
> + maxItems: 17
> +
> + dma-coherent: true
> + else:
> + properties:
> + interrupts:
> + minItems: 1
[Severity: Medium]
Does this missing maxItems constraint allow older variants to incorrectly pass
schema validation with up to 17 interrupts?
Since the top-level maxItems: 1 constraint was removed for interrupts, this
else block applies to all non-Agilex5 variants but only enforces minItems: 1.
Because there are no top-level restrictions stopping it, device trees for
older variants (e.g., altr,socfpga-stmmac-a10-s10) could specify multiple
interrupts and matching interrupt-names without triggering a schema validation
error.
Should maxItems: 1 for interrupts and a matching constraint for
interrupt-names be added to this else block to enforce the original strict
hardware constraints for prior generations?
> +
> + dma-coherent: false
> +
> unevaluatedProperties: false
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260626042541.1091774-1-dinguyen@kernel.org?part=1
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 1/2] dt-bindings: net: altr,socfpga-stmmac: add more interrupts for Agilex5
2026-06-26 4:25 [PATCH 1/2] dt-bindings: net: altr,socfpga-stmmac: add more interrupts for Agilex5 Dinh Nguyen
2026-06-26 4:25 ` [PATCH 2/2] arm64: dts: socfpga: agilex5: update channel interrupts for gmac1 and gmac2 Dinh Nguyen
2026-06-26 4:31 ` [PATCH 1/2] dt-bindings: net: altr,socfpga-stmmac: add more interrupts for Agilex5 sashiko-bot
@ 2026-06-26 16:08 ` Conor Dooley
2 siblings, 0 replies; 7+ messages in thread
From: Conor Dooley @ 2026-06-26 16:08 UTC (permalink / raw)
To: Dinh Nguyen
Cc: robh, krzk+dt, conor+dt, devicetree,
muhammad.nazim.amirul.nazle.asmade
[-- Attachment #1: Type: text/plain, Size: 2864 bytes --]
On Thu, Jun 25, 2026 at 11:25:40PM -0500, Dinh Nguyen wrote:
> The stmmac hardware on Agilex5 supports 8 TX/RX queue pairs and is
> dma-coherent. Update the schema to handle the hardware differences
> between SoC variants.
>
> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
> ---
> .../bindings/net/altr,socfpga-stmmac.yaml | 51 +++++++++++++++++--
> 1 file changed, 46 insertions(+), 5 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/net/altr,socfpga-stmmac.yaml b/Documentation/devicetree/bindings/net/altr,socfpga-stmmac.yaml
> index fc445ad5a1f1..9bae17688992 100644
> --- a/Documentation/devicetree/bindings/net/altr,socfpga-stmmac.yaml
> +++ b/Documentation/devicetree/bindings/net/altr,socfpga-stmmac.yaml
> @@ -62,12 +62,28 @@ properties:
> - const: stmmaceth
> - const: ptp_ref
>
> - interrupts:
> - maxItems: 1
> -
The top level should retain the widest constraints, so this should say
min 1 max 17.
> interrupt-names:
> - items:
> - - const: macirq
> + oneOf:
> + - items:
> + - const: macirq
This is unneeded, just have one list with everything, since entry 1 is
the same for both.
> + - items:
> + - const: macirq
> + - const: tx-queue-0
> + - const: tx-queue-1
> + - const: tx-queue-2
> + - const: tx-queue-3
> + - const: tx-queue-4
> + - const: tx-queue-5
> + - const: tx-queue-6
> + - const: tx-queue-7
> + - const: rx-queue-0
> + - const: rx-queue-1
> + - const: rx-queue-2
> + - const: rx-queue-3
> + - const: rx-queue-4
> + - const: rx-queue-5
> + - const: rx-queue-6
> + - const: rx-queue-7
>
> iommus:
> minItems: 1
> @@ -149,10 +165,35 @@ required:
> - clocks
> - clock-names
> - altr,sysmgr-syscon
> + - interrupts
> + - interrupt-names
No mention in the commit message of an ABI change.
>
> allOf:
> - $ref: snps,dwmac.yaml#
>
> + - if:
> + properties:
> + compatible:
> + contains:
> + const: altr,socfpga-stmmac-agilex5
> + then:
> + properties:
> + interrupts:
> + minItems: 17
> + maxItems: 17
With the change I suggest for the list, the maxItems here can be
removed.
> +
> + interrupt-names:
> + minItems: 17
> + maxItems: 17
And here.
> +
> + dma-coherent: true
> + else:
> + properties:
> + interrupts:
> + minItems: 1
This should have been maxItems: 1 I think.
pw-bot: changes-requested
Thanks,
Conor.
> +
> + dma-coherent: false
> +
> unevaluatedProperties: false
>
> examples:
> --
> 2.42.0.411.g813d9a9188
>
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 2/2] arm64: dts: socfpga: agilex5: update channel interrupts for gmac1 and gmac2
@ 2026-08-17 1:18 kernel test robot
0 siblings, 0 replies; 7+ messages in thread
From: kernel test robot @ 2026-08-17 1:18 UTC (permalink / raw)
To: oe-kbuild; +Cc: lkp
::::::
:::::: Manual check reason: "dtcheck: binding changes may go via different trees"
::::::
BCC: lkp@intel.com
CC: oe-kbuild-all@lists.linux.dev
In-Reply-To: <20260626042541.1091774-2-dinguyen@kernel.org>
References: <20260626042541.1091774-2-dinguyen@kernel.org>
TO: Dinh Nguyen <dinguyen@kernel.org>
TO: robh@kernel.org
TO: krzk+dt@kernel.org
TO: conor+dt@kernel.org
CC: dinguyen@kernel.org
CC: devicetree@vger.kernel.org
CC: muhammad.nazim.amirul.nazle.asmade@altera.com
Hi Dinh,
kernel test robot noticed the following build warnings:
[auto build test WARNING on robh/for-next]
[also build test WARNING on linus/master v7.2]
[cannot apply to next-20260814]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Dinh-Nguyen/arm64-dts-socfpga-agilex5-update-channel-interrupts-for-gmac1-and-gmac2/20260808-023339
base: https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next
patch link: https://lore.kernel.org/r/20260626042541.1091774-2-dinguyen%40kernel.org
patch subject: [PATCH 2/2] arm64: dts: socfpga: agilex5: update channel interrupts for gmac1 and gmac2
:::::: branch date: 9 days ago
:::::: commit date: 9 days ago
config: arm64-randconfig-2052-20260816 (https://download.01.org/0day-ci/archive/20260817/202608170303.tLRv4IM1-lkp@intel.com/config)
compiler: clang version 24.0.0git (https://github.com/llvm/llvm-project daa9d09970fed49996f42a8f7000b584f295991d)
dtschema: 2026.7.dev15+g01b5073ab
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20260817/202608170303.tLRv4IM1-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/r/202608170303.tLRv4IM1-lkp@intel.com/
dtcheck warnings: (new ones prefixed by >>)
>> arch/arm64/boot/dts/intel/socfpga_agilex3_socdk.dtb: ethernet@10810000 (altr,socfpga-stmmac-agilex5): interrupt-names: ['macirq'] is too short
from schema $id: http://devicetree.org/schemas/net/altr,socfpga-stmmac.yaml
>> arch/arm64/boot/dts/intel/socfpga_agilex3_socdk.dtb: ethernet@10810000 (altr,socfpga-stmmac-agilex5): interrupts: [[0, 190, 4]] is too short
from schema $id: http://devicetree.org/schemas/net/altr,socfpga-stmmac.yaml
arch/arm64/boot/dts/intel/socfpga_agilex3_socdk.dtb: ethernet@10820000 (altr,socfpga-stmmac-agilex5): interrupt-names: ['macirq'] is too short
from schema $id: http://devicetree.org/schemas/net/altr,socfpga-stmmac.yaml
arch/arm64/boot/dts/intel/socfpga_agilex3_socdk.dtb: ethernet@10820000 (altr,socfpga-stmmac-agilex5): interrupts: [[0, 207, 4]] is too short
from schema $id: http://devicetree.org/schemas/net/altr,socfpga-stmmac.yaml
arch/arm64/boot/dts/intel/socfpga_agilex3_socdk.dtb: ethernet@10830000 (altr,socfpga-stmmac-agilex5): interrupt-names: ['macirq'] is too short
from schema $id: http://devicetree.org/schemas/net/altr,socfpga-stmmac.yaml
arch/arm64/boot/dts/intel/socfpga_agilex3_socdk.dtb: ethernet@10830000 (altr,socfpga-stmmac-agilex5): interrupts: [[0, 224, 4]] is too short
from schema $id: http://devicetree.org/schemas/net/altr,socfpga-stmmac.yaml
--
>> arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dtb: ethernet@10810000 (altr,socfpga-stmmac-agilex5): interrupt-names: ['macirq'] is too short
from schema $id: http://devicetree.org/schemas/net/altr,socfpga-stmmac.yaml
>> arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dtb: ethernet@10810000 (altr,socfpga-stmmac-agilex5): interrupts: [[0, 190, 4]] is too short
from schema $id: http://devicetree.org/schemas/net/altr,socfpga-stmmac.yaml
arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dtb: ethernet@10820000 (altr,socfpga-stmmac-agilex5): interrupt-names: ['macirq'] is too short
from schema $id: http://devicetree.org/schemas/net/altr,socfpga-stmmac.yaml
arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dtb: ethernet@10820000 (altr,socfpga-stmmac-agilex5): interrupts: [[0, 207, 4]] is too short
from schema $id: http://devicetree.org/schemas/net/altr,socfpga-stmmac.yaml
arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dtb: ethernet@10830000 (altr,socfpga-stmmac-agilex5): interrupt-names: ['macirq'] is too short
from schema $id: http://devicetree.org/schemas/net/altr,socfpga-stmmac.yaml
arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dtb: ethernet@10830000 (altr,socfpga-stmmac-agilex5): interrupts: [[0, 224, 4]] is too short
from schema $id: http://devicetree.org/schemas/net/altr,socfpga-stmmac.yaml
--
>> arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_013b.dtb: ethernet@10810000 (altr,socfpga-stmmac-agilex5): interrupt-names: ['macirq'] is too short
from schema $id: http://devicetree.org/schemas/net/altr,socfpga-stmmac.yaml
>> arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_013b.dtb: ethernet@10810000 (altr,socfpga-stmmac-agilex5): interrupts: [[0, 190, 4]] is too short
from schema $id: http://devicetree.org/schemas/net/altr,socfpga-stmmac.yaml
arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_013b.dtb: ethernet@10820000 (altr,socfpga-stmmac-agilex5): interrupt-names: ['macirq'] is too short
from schema $id: http://devicetree.org/schemas/net/altr,socfpga-stmmac.yaml
arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_013b.dtb: ethernet@10820000 (altr,socfpga-stmmac-agilex5): interrupts: [[0, 207, 4]] is too short
from schema $id: http://devicetree.org/schemas/net/altr,socfpga-stmmac.yaml
arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_013b.dtb: ethernet@10830000 (altr,socfpga-stmmac-agilex5): interrupt-names: ['macirq'] is too short
from schema $id: http://devicetree.org/schemas/net/altr,socfpga-stmmac.yaml
arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_013b.dtb: ethernet@10830000 (altr,socfpga-stmmac-agilex5): interrupts: [[0, 224, 4]] is too short
from schema $id: http://devicetree.org/schemas/net/altr,socfpga-stmmac.yaml
--
>> arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_modular.dtb: ethernet@10810000 (altr,socfpga-stmmac-agilex5): interrupt-names: ['macirq'] is too short
from schema $id: http://devicetree.org/schemas/net/altr,socfpga-stmmac.yaml
>> arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_modular.dtb: ethernet@10810000 (altr,socfpga-stmmac-agilex5): interrupts: [[0, 190, 4]] is too short
from schema $id: http://devicetree.org/schemas/net/altr,socfpga-stmmac.yaml
arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_modular.dtb: ethernet@10820000 (altr,socfpga-stmmac-agilex5): interrupt-names: ['macirq'] is too short
from schema $id: http://devicetree.org/schemas/net/altr,socfpga-stmmac.yaml
arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_modular.dtb: ethernet@10820000 (altr,socfpga-stmmac-agilex5): interrupts: [[0, 207, 4]] is too short
from schema $id: http://devicetree.org/schemas/net/altr,socfpga-stmmac.yaml
arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_modular.dtb: ethernet@10830000 (altr,socfpga-stmmac-agilex5): interrupt-names: ['macirq'] is too short
from schema $id: http://devicetree.org/schemas/net/altr,socfpga-stmmac.yaml
arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_modular.dtb: ethernet@10830000 (altr,socfpga-stmmac-agilex5): interrupts: [[0, 224, 4]] is too short
from schema $id: http://devicetree.org/schemas/net/altr,socfpga-stmmac.yaml
--
>> arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_nand.dtb: ethernet@10810000 (altr,socfpga-stmmac-agilex5): interrupt-names: ['macirq'] is too short
from schema $id: http://devicetree.org/schemas/net/altr,socfpga-stmmac.yaml
>> arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_nand.dtb: ethernet@10810000 (altr,socfpga-stmmac-agilex5): interrupts: [[0, 190, 4]] is too short
from schema $id: http://devicetree.org/schemas/net/altr,socfpga-stmmac.yaml
arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_nand.dtb: ethernet@10820000 (altr,socfpga-stmmac-agilex5): interrupt-names: ['macirq'] is too short
from schema $id: http://devicetree.org/schemas/net/altr,socfpga-stmmac.yaml
arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_nand.dtb: ethernet@10820000 (altr,socfpga-stmmac-agilex5): interrupts: [[0, 207, 4]] is too short
from schema $id: http://devicetree.org/schemas/net/altr,socfpga-stmmac.yaml
arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_nand.dtb: ethernet@10830000 (altr,socfpga-stmmac-agilex5): interrupt-names: ['macirq'] is too short
from schema $id: http://devicetree.org/schemas/net/altr,socfpga-stmmac.yaml
arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_nand.dtb: ethernet@10830000 (altr,socfpga-stmmac-agilex5): interrupts: [[0, 224, 4]] is too short
from schema $id: http://devicetree.org/schemas/net/altr,socfpga-stmmac.yaml
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2026-08-17 1:19 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
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2026-06-26 4:25 [PATCH 1/2] dt-bindings: net: altr,socfpga-stmmac: add more interrupts for Agilex5 Dinh Nguyen
2026-06-26 4:25 ` [PATCH 2/2] arm64: dts: socfpga: agilex5: update channel interrupts for gmac1 and gmac2 Dinh Nguyen
2026-06-26 4:31 ` sashiko-bot
2026-06-26 10:53 ` Dinh Nguyen
2026-06-26 4:31 ` [PATCH 1/2] dt-bindings: net: altr,socfpga-stmmac: add more interrupts for Agilex5 sashiko-bot
2026-06-26 16:08 ` Conor Dooley
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2026-08-17 1:18 [PATCH 2/2] arm64: dts: socfpga: agilex5: update channel interrupts for gmac1 and gmac2 kernel test robot
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