From: sashiko-bot@kernel.org
To: "Guodong Xu" <docular.xu@gmail.com>
Cc: robh@kernel.org, kvm@vger.kernel.org, devicetree@vger.kernel.org,
conor+dt@kernel.org
Subject: Re: [PATCH v5 08/17] dt-bindings: riscv: Require block-size for Zicbom, Zicbop, and Zicboz
Date: Wed, 01 Jul 2026 13:35:35 +0000 [thread overview]
Message-ID: <20260701133536.480731F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260701-rva23u64-hwprobe-v2-v5-8-2c61f94a695a@gmail.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] JSON schema 'if' blocks incorrectly match nodes missing the 'riscv,isa-extensions' property, erroneously enforcing block-size requirements on legacy device trees.
--
commit 08f47eb689e1ffc05b399844b4f633278d53641f
Author: Guodong Xu <docular.xu@gmail.com>
dt-bindings: riscv: Require block-size for Zicbom, Zicbop, and Zicboz
This commit updates the RISC-V extensions schema to make block-size properties
mandatory for the Zicbom, Zicbop, and Zicboz extensions. The goal is to catch
missing properties during dtbs_check since these extensions do not have a
default cache block size.
> diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml
> index 5ffc40d599c02..f4dd34d446c02 100644
> --- a/Documentation/devicetree/bindings/riscv/extensions.yaml
> +++ b/Documentation/devicetree/bindings/riscv/extensions.yaml
[ ... ]
> @@ -1142,6 +1142,32 @@ allOf:
> not:
> contains:
> const: zilsd
> + # All three Zicbo* extensions require their block size property as there's no
> + # default.
> + - if:
> + properties:
> + riscv,isa-extensions:
> + contains:
> + const: zicbom
> + then:
> + required:
> + - riscv,cbom-block-size
[Severity: Medium]
Does this JSON schema 'if' block inadvertently evaluate to true for nodes
missing the 'riscv,isa-extensions' property entirely?
In JSON schema validation, the 'properties' keyword only applies constraints
to properties that are actually present in the instance. If a device tree
node lacks 'riscv,isa-extensions' (such as legacy nodes using only the
deprecated 'riscv,isa' property), this 'if' condition will vacuously succeed.
Will this erroneously enforce the 'riscv,cbom-block-size' requirement on
all those legacy nodes during dtbs_check?
[ ... ]
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260701-rva23u64-hwprobe-v2-v5-0-2c61f94a695a@gmail.com?part=8
next prev parent reply other threads:[~2026-07-01 13:35 UTC|newest]
Thread overview: 66+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-01 12:52 [PATCH v5 00/17] riscv: hwprobe: Expose RVA23U64 base behavior Guodong Xu
2026-07-01 12:52 ` Guodong Xu
2026-07-01 12:52 ` Guodong Xu
2026-07-01 12:52 ` [PATCH v5 01/17] dt-bindings: riscv: sort multi-letter Z extensions alphanumerically Guodong Xu
2026-07-01 12:52 ` Guodong Xu
2026-07-01 12:52 ` Guodong Xu
2026-07-01 12:52 ` [PATCH v5 02/17] riscv: hwprobe.rst: Make indentation consistent Guodong Xu
2026-07-01 12:52 ` Guodong Xu
2026-07-01 12:52 ` Guodong Xu
2026-07-01 12:52 ` [PATCH v5 03/17] riscv: hwprobe.rst: Document EXT_ZICFISS and EXT_ZICFILP Guodong Xu
2026-07-01 12:52 ` Guodong Xu
2026-07-01 12:52 ` Guodong Xu
2026-07-01 12:52 ` [PATCH v5 04/17] riscv: Standardize extension capitalization Guodong Xu
2026-07-01 12:52 ` Guodong Xu
2026-07-01 12:52 ` Guodong Xu
2026-07-01 12:52 ` [PATCH v5 05/17] riscv: Add Zicclsm to cpufeature and hwprobe Guodong Xu
2026-07-01 12:52 ` Guodong Xu
2026-07-01 12:52 ` Guodong Xu
2026-07-01 12:52 ` [PATCH v5 06/17] riscv: Add Ziccamoa, Ziccif, Ziccrse, and Za64rs " Guodong Xu
2026-07-01 12:52 ` Guodong Xu
2026-07-01 12:52 ` Guodong Xu
2026-07-01 12:52 ` [PATCH v5 07/17] riscv: Add B to hwcap " Guodong Xu
2026-07-01 12:52 ` Guodong Xu
2026-07-01 12:52 ` Guodong Xu
2026-07-01 13:27 ` sashiko-bot
2026-07-01 12:52 ` [PATCH v5 08/17] dt-bindings: riscv: Require block-size for Zicbom, Zicbop, and Zicboz Guodong Xu
2026-07-01 12:52 ` Guodong Xu
2026-07-01 12:52 ` Guodong Xu
2026-07-01 13:35 ` sashiko-bot [this message]
2026-07-01 15:54 ` Rob Herring (Arm)
2026-07-01 15:54 ` Rob Herring (Arm)
2026-07-01 15:54 ` Rob Herring (Arm)
2026-07-01 20:39 ` Conor Dooley
2026-07-01 20:39 ` Conor Dooley
2026-07-01 20:39 ` Conor Dooley
2026-07-01 12:52 ` [PATCH v5 09/17] dt-bindings: riscv: Add Zic64b extension description Guodong Xu
2026-07-01 12:52 ` Guodong Xu
2026-07-01 12:52 ` Guodong Xu
2026-07-01 13:42 ` sashiko-bot
2026-07-01 12:52 ` [PATCH v5 10/17] riscv: Add Zic64b to cpufeature and hwprobe Guodong Xu
2026-07-01 12:52 ` Guodong Xu
2026-07-01 12:52 ` Guodong Xu
2026-07-01 13:53 ` sashiko-bot
2026-07-01 12:52 ` [PATCH v5 11/17] riscv: dts: spacemit: k3: Add Zic64b ISA extension Guodong Xu
2026-07-01 12:52 ` Guodong Xu
2026-07-01 12:52 ` Guodong Xu
2026-07-01 12:52 ` [PATCH v5 12/17] riscv: dts: spacemit: k1: " Guodong Xu
2026-07-01 12:52 ` Guodong Xu
2026-07-01 12:52 ` Guodong Xu
2026-07-01 14:00 ` sashiko-bot
2026-07-01 12:52 ` [PATCH v5 13/17] riscv: dts: sophgo: sg2044: " Guodong Xu
2026-07-01 12:52 ` Guodong Xu
2026-07-01 12:52 ` Guodong Xu
2026-07-01 12:52 ` [PATCH v5 14/17] riscv: Add a getter for user PMLEN support Guodong Xu
2026-07-01 12:52 ` Guodong Xu
2026-07-01 12:52 ` Guodong Xu
2026-07-01 12:52 ` [PATCH v5 15/17] riscv: cpufeature: Introduce ISA bases bitmap and rva23u64 detection Guodong Xu
2026-07-01 12:52 ` Guodong Xu
2026-07-01 12:52 ` Guodong Xu
2026-07-01 14:22 ` sashiko-bot
2026-07-01 12:52 ` [PATCH v5 16/17] riscv: cpu: Output isa bases lines in cpuinfo Guodong Xu
2026-07-01 12:52 ` Guodong Xu
2026-07-01 12:52 ` Guodong Xu
2026-07-01 12:52 ` [PATCH v5 17/17] riscv: hwprobe: Introduce rva23u64 base behavior Guodong Xu
2026-07-01 12:52 ` Guodong Xu
2026-07-01 12:52 ` Guodong Xu
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