Re: [PATCH v5 10/17] riscv: Add Zic64b to cpufeature and hwprobe

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] The Zic64b extension is exported to userspace via hwprobe but lacks corresponding KVM support, preventing VMMs from discovering and exposing it to guests.
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commit 071fffe45b5cfa38ee92c48f5063587d8cccb183
Author: Qingwei Hu <qingwei.hu@bytedance.com>
riscv: Add Zic64b to cpufeature and hwprobe

This commit adds support for the Zic64b extension to cpufeature and hwprobe.
It introduces a validation callback to ensure consistent CBO block sizes and
exports the capability to userspace.

Link: https://lists.riscv.org/g/tech-unprivileged/topic/question_about_zic64b_and/119631059

> diff --git a/arch/riscv/include/uapi/asm/hwprobe.h b/arch/riscv/include/uapi/asm/hwprobe.h
> index 430dc49a82863..36ec8ab470423 100644
> --- a/arch/riscv/include/uapi/asm/hwprobe.h
> +++ b/arch/riscv/include/uapi/asm/hwprobe.h
> @@ -122,6 +122,7 @@ struct riscv_hwprobe {
>  #define		RISCV_HWPROBE_EXT_ZICCRSE	(1ULL << 4)
>  #define		RISCV_HWPROBE_EXT_ZA64RS	(1ULL << 5)
>  #define		RISCV_HWPROBE_EXT_B		(1ULL << 6)
> +#define		RISCV_HWPROBE_EXT_ZIC64B	(1ULL << 7)

[Severity: Medium]
Since Zic64b is being exported to userspace via hwprobe here, should it also
be added to the KVM UAPI?

Without corresponding KVM support in enum KVM_RISCV_ISA_EXT_ID in
arch/riscv/include/uapi/asm/kvm.h and kvm_isa_ext_arr in arch/riscv/kvm/isa.c,
VMMs will be unable to negotiate and expose this capability to guests.

Does this patch need parallel KVM API plumbing to ensure virtualization
parity for this mandatory extension?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260701-rva23u64-hwprobe-v2-v5-0-2c61f94a695a@gmail.com?part=10