From: Inochi Amaoto <inochiama@gmail.com>
To: "Jingoo Han" <jingoohan1@gmail.com>,
"Manivannan Sadhasivam" <mani@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Yixun Lan" <dlan@kernel.org>, "Paul Walmsley" <pjw@kernel.org>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Alexandre Ghiti" <alex@ghiti.fr>,
"Christian Bruel" <christian.bruel@foss.st.com>,
"Inochi Amaoto" <inochiama@gmail.com>,
"Frank Li" <Frank.Li@nxp.com>,
"Neil Armstrong" <neil.armstrong@linaro.org>,
"Andy Shevchenko" <andriy.shevchenko@linux.intel.com>,
"Sascha Hauer" <s.hauer@pengutronix.de>,
"Xincheng Zhang" <zhangxincheng@ultrarisc.com>,
"Alex Elder" <elder@riscstar.com>,
"Randolph Lin" <randolph@andestech.com>,
"Siddharth Vadapalli" <s-vadapalli@ti.com>,
"Vidya Sagar" <vidyas@nvidia.com>,
"Gustavo Pimentel" <gustavo.pimentel@synopsys.com>
Cc: linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
spacemit@lists.linux.dev, Yixun Lan <dlan@gentoo.org>,
Longbin Li <looong.bin@gmail.com>
Subject: [PATCH v3 5/6] dt-bindings: PCI: spacemit: Introduce Spacemit K3 PCIe host controller
Date: Fri, 3 Jul 2026 10:00:01 +0800 [thread overview]
Message-ID: <20260703020003.485436-6-inochiama@gmail.com> (raw)
In-Reply-To: <20260703020003.485436-1-inochiama@gmail.com>
Add binding support for the PCIe controller on the SpacemiT K3 SoC.
This controller is almost a standard Synopsys DesignWare PCIe IP,
with some extra link and reset state control.
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
---
.../bindings/pci/spacemit,k1-pcie-host.yaml | 46 ++++++++++++++++---
1 file changed, 39 insertions(+), 7 deletions(-)
diff --git a/Documentation/devicetree/bindings/pci/spacemit,k1-pcie-host.yaml b/Documentation/devicetree/bindings/pci/spacemit,k1-pcie-host.yaml
index c4c00b5fcdc0..720951b4ba77 100644
--- a/Documentation/devicetree/bindings/pci/spacemit,k1-pcie-host.yaml
+++ b/Documentation/devicetree/bindings/pci/spacemit,k1-pcie-host.yaml
@@ -14,26 +14,29 @@ description: >
PCIe IP. The controller uses the DesignWare built-in MSI interrupt
controller, and supports 256 MSIs.
-allOf:
- - $ref: /schemas/pci/snps,dw-pcie.yaml#
-
properties:
compatible:
- const: spacemit,k1-pcie
+ enum:
+ - spacemit,k1-pcie
+ - spacemit,k3-pcie
reg:
+ minItems: 4
items:
- description: DesignWare PCIe registers
- description: ATU address space
- description: PCIe configuration space
- description: Link control registers
+ - description: Data Bus Interface (DBI) shadow registers.
reg-names:
+ minItems: 4
items:
- const: dbi
- const: atu
- const: config
- const: link
+ - const: dbi2
clocks:
items:
@@ -66,6 +69,8 @@ properties:
interrupt-names:
const: msi
+ msi-parent: true
+
spacemit,apmu:
$ref: /schemas/types.yaml#/definitions/phandle-array
description:
@@ -84,7 +89,8 @@ patternProperties:
properties:
phys:
- maxItems: 1
+ minItems: 1
+ maxItems: 6
vpcie3v3-supply:
description:
@@ -96,13 +102,39 @@ patternProperties:
unevaluatedProperties: false
+allOf:
+ - $ref: /schemas/pci/snps,dw-pcie.yaml#
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: spacemit,k1-pcie
+ then:
+ properties:
+ reg:
+ maxItems: 4
+
+ reg-names:
+ maxItems: 4
+
+ patternProperties:
+ '^pcie@':
+ properties:
+ phys:
+ maxItems: 1
+ else:
+ properties:
+ reg:
+ minItems: 5
+
+ reg-names:
+ minItems: 5
+
required:
- clocks
- clock-names
- resets
- reset-names
- - interrupts
- - interrupt-names
- spacemit,apmu
unevaluatedProperties: false
--
2.55.0
WARNING: multiple messages have this Message-ID (diff)
From: Inochi Amaoto <inochiama@gmail.com>
To: "Jingoo Han" <jingoohan1@gmail.com>,
"Manivannan Sadhasivam" <mani@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Yixun Lan" <dlan@kernel.org>, "Paul Walmsley" <pjw@kernel.org>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Alexandre Ghiti" <alex@ghiti.fr>,
"Christian Bruel" <christian.bruel@foss.st.com>,
"Inochi Amaoto" <inochiama@gmail.com>,
"Frank Li" <Frank.Li@nxp.com>,
"Neil Armstrong" <neil.armstrong@linaro.org>,
"Andy Shevchenko" <andriy.shevchenko@linux.intel.com>,
"Sascha Hauer" <s.hauer@pengutronix.de>,
"Xincheng Zhang" <zhangxincheng@ultrarisc.com>,
"Alex Elder" <elder@riscstar.com>,
"Randolph Lin" <randolph@andestech.com>,
"Siddharth Vadapalli" <s-vadapalli@ti.com>,
"Vidya Sagar" <vidyas@nvidia.com>,
"Gustavo Pimentel" <gustavo.pimentel@synopsys.com>
Cc: linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
spacemit@lists.linux.dev, Yixun Lan <dlan@gentoo.org>,
Longbin Li <looong.bin@gmail.com>
Subject: [PATCH v3 5/6] dt-bindings: PCI: spacemit: Introduce Spacemit K3 PCIe host controller
Date: Fri, 3 Jul 2026 10:00:01 +0800 [thread overview]
Message-ID: <20260703020003.485436-6-inochiama@gmail.com> (raw)
In-Reply-To: <20260703020003.485436-1-inochiama@gmail.com>
Add binding support for the PCIe controller on the SpacemiT K3 SoC.
This controller is almost a standard Synopsys DesignWare PCIe IP,
with some extra link and reset state control.
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
---
.../bindings/pci/spacemit,k1-pcie-host.yaml | 46 ++++++++++++++++---
1 file changed, 39 insertions(+), 7 deletions(-)
diff --git a/Documentation/devicetree/bindings/pci/spacemit,k1-pcie-host.yaml b/Documentation/devicetree/bindings/pci/spacemit,k1-pcie-host.yaml
index c4c00b5fcdc0..720951b4ba77 100644
--- a/Documentation/devicetree/bindings/pci/spacemit,k1-pcie-host.yaml
+++ b/Documentation/devicetree/bindings/pci/spacemit,k1-pcie-host.yaml
@@ -14,26 +14,29 @@ description: >
PCIe IP. The controller uses the DesignWare built-in MSI interrupt
controller, and supports 256 MSIs.
-allOf:
- - $ref: /schemas/pci/snps,dw-pcie.yaml#
-
properties:
compatible:
- const: spacemit,k1-pcie
+ enum:
+ - spacemit,k1-pcie
+ - spacemit,k3-pcie
reg:
+ minItems: 4
items:
- description: DesignWare PCIe registers
- description: ATU address space
- description: PCIe configuration space
- description: Link control registers
+ - description: Data Bus Interface (DBI) shadow registers.
reg-names:
+ minItems: 4
items:
- const: dbi
- const: atu
- const: config
- const: link
+ - const: dbi2
clocks:
items:
@@ -66,6 +69,8 @@ properties:
interrupt-names:
const: msi
+ msi-parent: true
+
spacemit,apmu:
$ref: /schemas/types.yaml#/definitions/phandle-array
description:
@@ -84,7 +89,8 @@ patternProperties:
properties:
phys:
- maxItems: 1
+ minItems: 1
+ maxItems: 6
vpcie3v3-supply:
description:
@@ -96,13 +102,39 @@ patternProperties:
unevaluatedProperties: false
+allOf:
+ - $ref: /schemas/pci/snps,dw-pcie.yaml#
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: spacemit,k1-pcie
+ then:
+ properties:
+ reg:
+ maxItems: 4
+
+ reg-names:
+ maxItems: 4
+
+ patternProperties:
+ '^pcie@':
+ properties:
+ phys:
+ maxItems: 1
+ else:
+ properties:
+ reg:
+ minItems: 5
+
+ reg-names:
+ minItems: 5
+
required:
- clocks
- clock-names
- resets
- reset-names
- - interrupts
- - interrupt-names
- spacemit,apmu
unevaluatedProperties: false
--
2.55.0
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2026-07-03 2:00 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-03 1:59 [PATCH v3 0/6] riscv: spacemit: Add PCIe RC controller support for K3 Inochi Amaoto
2026-07-03 1:59 ` Inochi Amaoto
2026-07-03 1:59 ` [PATCH v3 1/6] PCI: spacemit-k1: Add device data support Inochi Amaoto
2026-07-03 1:59 ` Inochi Amaoto
2026-07-03 2:15 ` sashiko-bot
2026-07-03 1:59 ` [PATCH v3 2/6] PCI: spacemit-k1: Add multiple PHY handles support Inochi Amaoto
2026-07-03 1:59 ` Inochi Amaoto
2026-07-03 2:15 ` sashiko-bot
2026-07-03 1:59 ` [PATCH v3 3/6] PCI: spacemit-k1: Add device id update helper Inochi Amaoto
2026-07-03 1:59 ` Inochi Amaoto
2026-07-03 2:13 ` sashiko-bot
2026-07-03 2:00 ` [PATCH v3 4/6] dt-bindings: PCI: snps,dw-pcie: Add msi-parent for MSI handle check Inochi Amaoto
2026-07-03 2:00 ` Inochi Amaoto
2026-07-03 2:13 ` sashiko-bot
2026-07-03 2:00 ` Inochi Amaoto [this message]
2026-07-03 2:00 ` [PATCH v3 5/6] dt-bindings: PCI: spacemit: Introduce Spacemit K3 PCIe host controller Inochi Amaoto
2026-07-03 2:15 ` sashiko-bot
2026-07-05 9:37 ` Krzysztof Kozlowski
2026-07-05 9:37 ` Krzysztof Kozlowski
2026-07-05 11:22 ` Inochi Amaoto
2026-07-05 11:22 ` Inochi Amaoto
2026-07-03 2:00 ` [PATCH v3 6/6] PCI: spacemit-k1: Add Spacemit K3 PCIe host controller support Inochi Amaoto
2026-07-03 2:00 ` Inochi Amaoto
2026-07-03 2:20 ` sashiko-bot
2026-07-05 1:52 ` Inochi Amaoto
2026-07-03 17:15 ` [PATCH v3 0/6] riscv: spacemit: Add PCIe RC controller support for K3 Aurelien Jarno
2026-07-03 17:15 ` Aurelien Jarno
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