All of lore.kernel.org
 help / color / mirror / Atom feed
From: "Philippe Mathieu-Daudé" <philmd@oss.qualcomm.com>
To: qemu-devel@nongnu.org
Cc: Chao Liu <chao.liu.zevorn@gmail.com>,
	alex.bennee@linaro.org, qemu-s390x@nongnu.org,
	Magnus Kulke <magnuskulke@linux.microsoft.com>,
	Zhao Liu <zhao1.liu@intel.com>,
	qemu-ppc@nongnu.org, Paolo Bonzini <pbonzini@redhat.com>,
	Xiaoyao Li <xiaoyao.li@intel.com>,
	Richard Henderson <richard.henderson@linaro.org>,
	Mohamed Mediouni <mohamed@unpredictable.fr>,
	Peter Maydell <peter.maydell@linaro.org>
Subject: [PATCH v3 29/32] cpu: Better name cpu_single_step() trace event
Date: Sun,  5 Jul 2026 23:57:25 +0200	[thread overview]
Message-ID: <20260705215729.62196-30-philmd@oss.qualcomm.com> (raw)
In-Reply-To: <20260705215729.62196-1-philmd@oss.qualcomm.com>

cpu_single_step() is not related to breakpoints. Rename the
trace event.

Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>
---
 cpu-target.c | 4 ++--
 trace-events | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/cpu-target.c b/cpu-target.c
index f030e2c642e..019906b32eb 100644
--- a/cpu-target.c
+++ b/cpu-target.c
@@ -31,6 +31,8 @@
 void cpu_single_step(CPUState *cpu, int enabled)
 {
     if (cpu->singlestep_enabled != enabled) {
+        trace_cpu_change_singlestep_flags(cpu->cpu_index,
+                                          cpu->singlestep_enabled, enabled);
         cpu->singlestep_enabled = enabled;
 
 #if !defined(CONFIG_USER_ONLY)
@@ -39,8 +41,6 @@ void cpu_single_step(CPUState *cpu, int enabled)
             ops->update_guest_debug(cpu);
         }
 #endif
-
-        trace_breakpoint_singlestep(cpu->cpu_index, enabled);
     }
 }
 
diff --git a/trace-events b/trace-events
index faeba6242fa..ea1d2b11a22 100644
--- a/trace-events
+++ b/trace-events
@@ -28,7 +28,7 @@
 # cpu.c
 breakpoint_insert(int cpu_index, uint64_t pc, int flags) "cpu=%d pc=0x%" PRIx64 " flags=0x%x"
 breakpoint_remove(int cpu_index, uint64_t pc, int flags) "cpu=%d pc=0x%" PRIx64 " flags=0x%x"
-breakpoint_singlestep(int cpu_index, int enabled) "cpu=%d enable=%d"
+cpu_change_singlestep_flags(int cpu_index, int old_flags, int new_flags) "cpu=%d flags=0x%x -> 0x%x"
 cpu_exec_start(int cpu_index) "cpu=%d"
 cpu_exec_end(int cpu_index) "cpu=%d"
 
-- 
2.53.0



  parent reply	other threads:[~2026-07-05 22:03 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-05 21:56 [PATCH v3 00/32] accel: Unassorted cleanups around debugging Philippe Mathieu-Daudé
2026-07-05 21:56 ` [PATCH v3 01/32] cpu: Constify CPUState::cc (cached CPUClass pointer) Philippe Mathieu-Daudé
2026-07-05 21:56 ` [PATCH v3 02/32] target/i386: Remove duplicate tlb_flush() call in cpu_post_load() Philippe Mathieu-Daudé
2026-07-05 21:56 ` [PATCH v3 03/32] accel/tcg: Restrict tlb_protect/unprotect_code() to TCG Philippe Mathieu-Daudé
2026-07-05 21:57 ` [PATCH v3 04/32] accel/hvf: Remove left-over comment Philippe Mathieu-Daudé
2026-07-05 21:57 ` [PATCH v3 05/32] accel/mshv: Replace @dirty field by generic CPUState::vcpu_dirty field Philippe Mathieu-Daudé
2026-07-05 21:57 ` [PATCH v3 06/32] gdbstub: Add trace event for STEP packet handler Philippe Mathieu-Daudé
2026-07-05 21:57 ` [PATCH v3 07/32] gdbstub: Only return E22 when reverse GDB is not supported Philippe Mathieu-Daudé
2026-07-05 21:57 ` [PATCH v3 08/32] accel/whpx: Implement missing AccelClass::gdbstub_supported_sstep_flags Philippe Mathieu-Daudé
2026-07-05 21:57 ` [PATCH v3 09/32] accel/kvm: Always define AccelOpsClass::supports_guest_debug Philippe Mathieu-Daudé
2026-07-05 21:57 ` [PATCH v3 10/32] accel/kvm: Simplify kvm_init() w.r.t. TARGET_KVM_HAVE_GUEST_DEBUG Philippe Mathieu-Daudé
2026-07-05 21:57 ` [PATCH v3 11/32] accel/kvm: Hold have_guest_debug in KVMState Philippe Mathieu-Daudé
2026-07-05 21:57 ` [PATCH v3 12/32] gdbstub: Reduce gdb_supports_guest_debug() scope Philippe Mathieu-Daudé
2026-07-05 21:57 ` [PATCH v3 13/32] gdbstub: Move supported_sstep_flags in AccelGdbConfig structure Philippe Mathieu-Daudé
2026-07-05 21:57 ` [PATCH v3 14/32] accel: Have each implementation return their AccelGdbConfig Philippe Mathieu-Daudé
2026-07-05 21:57 ` [PATCH v3 15/32] gdbstub: Make default replay_mode value explicit in stubs Philippe Mathieu-Daudé
2026-07-05 21:57 ` [PATCH v3 16/32] accel: Hold @can_reverse information in AccelGdbConfig Philippe Mathieu-Daudé
2026-07-06  8:59   ` Manos Pitsidianakis
2026-07-05 21:57 ` [PATCH v3 17/32] accel: Remove AccelOpsClass::supports_guest_debug Philippe Mathieu-Daudé
2026-07-05 21:57 ` [PATCH v3 18/32] cpu: Move cpu_breakpoint_test out of line Philippe Mathieu-Daudé
2026-07-05 21:57 ` [PATCH v3 19/32] cpu: Move BREAKPOINT definitions to 'exec/breakpoint.h' Philippe Mathieu-Daudé
2026-07-05 21:57 ` [PATCH v3 20/32] cpu: Define BreakpointFlags type Philippe Mathieu-Daudé
2026-07-05 21:57 ` [PATCH v3 21/32] accel: Remove unnecessary 'inline' qualifier in remove_all_breakpoints Philippe Mathieu-Daudé
2026-07-05 21:57 ` [PATCH v3 22/32] gdbstub/user: Directly call gdb_breakpoint_remove_all() in user mode Philippe Mathieu-Daudé
2026-07-05 21:57 ` [PATCH v3 23/32] gdbstub: Reduce @type variable scope Philippe Mathieu-Daudé
2026-07-05 21:57 ` [PATCH v3 24/32] gdbstub: Introduce GdbBreakpointType enumerator Philippe Mathieu-Daudé
2026-07-05 21:57 ` [PATCH v3 25/32] accel: Use GdbBreakpointType enum Philippe Mathieu-Daudé
2026-07-05 21:57 ` [PATCH v3 26/32] target/arm: Inline check_watchpoints() in arm_debug_check_watchpoint() Philippe Mathieu-Daudé
2026-07-05 21:57 ` [PATCH v3 27/32] target/ppc: Ensure TCG is used in ppc_update_daw() Philippe Mathieu-Daudé
2026-07-05 21:57 ` [PATCH v3 28/32] accel/tcg: Improve docstrings around TCGCPUOps::*watchpoint* handlers Philippe Mathieu-Daudé
2026-07-05 21:57 ` Philippe Mathieu-Daudé [this message]
2026-07-05 21:57 ` [PATCH v3 30/32] cpu: Introduce cpu_single_stepping() helper Philippe Mathieu-Daudé
2026-07-05 21:57 ` [PATCH v3 31/32] cpu: Rename CPUState @singlestep_enabled -> @singlestep_flags Philippe Mathieu-Daudé
2026-07-05 21:57 ` [PATCH v3 32/32] cpu: Only check SSTEP_ENABLE flag in cpu_single_stepping() Philippe Mathieu-Daudé

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20260705215729.62196-30-philmd@oss.qualcomm.com \
    --to=philmd@oss.qualcomm.com \
    --cc=alex.bennee@linaro.org \
    --cc=chao.liu.zevorn@gmail.com \
    --cc=magnuskulke@linux.microsoft.com \
    --cc=mohamed@unpredictable.fr \
    --cc=pbonzini@redhat.com \
    --cc=peter.maydell@linaro.org \
    --cc=qemu-devel@nongnu.org \
    --cc=qemu-ppc@nongnu.org \
    --cc=qemu-s390x@nongnu.org \
    --cc=richard.henderson@linaro.org \
    --cc=xiaoyao.li@intel.com \
    --cc=zhao1.liu@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.