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From: "Philippe Mathieu-Daudé" <philmd@oss.qualcomm.com>
To: qemu-devel@nongnu.org
Cc: Chao Liu <chao.liu.zevorn@gmail.com>,
	alex.bennee@linaro.org, qemu-s390x@nongnu.org,
	Magnus Kulke <magnuskulke@linux.microsoft.com>,
	Zhao Liu <zhao1.liu@intel.com>,
	qemu-ppc@nongnu.org, Paolo Bonzini <pbonzini@redhat.com>,
	Xiaoyao Li <xiaoyao.li@intel.com>,
	Richard Henderson <richard.henderson@linaro.org>,
	Mohamed Mediouni <mohamed@unpredictable.fr>,
	Peter Maydell <peter.maydell@linaro.org>
Subject: [PATCH v3 03/32] accel/tcg: Restrict tlb_protect/unprotect_code() to TCG
Date: Sun,  5 Jul 2026 23:56:59 +0200	[thread overview]
Message-ID: <20260705215729.62196-4-philmd@oss.qualcomm.com> (raw)
In-Reply-To: <20260705215729.62196-1-philmd@oss.qualcomm.com>

Both tlb_protect() and tlb_unprotect_code() are only used
within accel/tcg/. Avoid exposing them to the whole code base,
declare them in a new "system-page-protection.h" local header.

Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Chao Liu <chao.liu.zevorn@gmail.com>
---
 accel/tcg/system-page-protection.h | 17 +++++++++++++++++
 include/exec/cputlb.h              |  8 ++------
 accel/tcg/cputlb.c                 |  3 ++-
 accel/tcg/tb-maint.c               |  1 +
 4 files changed, 22 insertions(+), 7 deletions(-)
 create mode 100644 accel/tcg/system-page-protection.h

diff --git a/accel/tcg/system-page-protection.h b/accel/tcg/system-page-protection.h
new file mode 100644
index 00000000000..52896c6d24a
--- /dev/null
+++ b/accel/tcg/system-page-protection.h
@@ -0,0 +1,17 @@
+/*
+ * QEMU page protection (system emulation)
+ *
+ *  Copyright (c) 2003 Fabrice Bellard
+ *
+ * SPDX-License-Identifier: LGPL-2.1-or-later
+ */
+#ifndef SYSTEM_PAGE_PROTECTION_H
+#define SYSTEM_PAGE_PROTECTION_H
+
+#include "system/ram_addr.h"
+
+void tlb_protect_code(ram_addr_t ram_addr);
+void tlb_unprotect_code(ram_addr_t ram_addr);
+
+#endif
+
diff --git a/include/exec/cputlb.h b/include/exec/cputlb.h
index 3a9603a6965..f7f7020382d 100644
--- a/include/exec/cputlb.h
+++ b/include/exec/cputlb.h
@@ -24,14 +24,10 @@
 #include "exec/hwaddr.h"
 #include "exec/memattrs.h"
 #include "exec/vaddr.h"
-#include "system/ram_addr.h"
-
-#if defined(CONFIG_TCG) && !defined(CONFIG_USER_ONLY)
-void tlb_protect_code(ram_addr_t ram_addr);
-void tlb_unprotect_code(ram_addr_t ram_addr);
-#endif
 
 #ifndef CONFIG_USER_ONLY
+#include "system/ram_addr.h"
+
 void tlb_reset_dirty(CPUState *cpu, uintptr_t start, uintptr_t length);
 void tlb_reset_dirty_range_all(ram_addr_t start, ram_addr_t length);
 #endif
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index 6e66f3c6e93..7f7c208ba12 100644
--- a/accel/tcg/cputlb.c
+++ b/accel/tcg/cputlb.c
@@ -1,5 +1,5 @@
 /*
- *  Common CPU TLB handling
+ *  Common CPU TLB handling (system emulation)
  *
  *  Copyright (c) 2003 Fabrice Bellard
  *
@@ -47,6 +47,7 @@
 #include "tb-hash.h"
 #include "tlb-bounds.h"
 #include "internal-common.h"
+#include "system-page-protection.h"
 #ifdef CONFIG_PLUGIN
 #include "qemu/plugin-memory.h"
 #endif
diff --git a/accel/tcg/tb-maint.c b/accel/tcg/tb-maint.c
index c33dbf65e7f..4313864d2c5 100644
--- a/accel/tcg/tb-maint.c
+++ b/accel/tcg/tb-maint.c
@@ -38,6 +38,7 @@
 #include "user/page-protection.h"
 #define runstate_is_running()  true
 #else
+#include "system-page-protection.h"
 #include "system/runstate.h"
 #endif
 #include "trace.h"
-- 
2.53.0



  parent reply	other threads:[~2026-07-05 21:58 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-05 21:56 [PATCH v3 00/32] accel: Unassorted cleanups around debugging Philippe Mathieu-Daudé
2026-07-05 21:56 ` [PATCH v3 01/32] cpu: Constify CPUState::cc (cached CPUClass pointer) Philippe Mathieu-Daudé
2026-07-05 21:56 ` [PATCH v3 02/32] target/i386: Remove duplicate tlb_flush() call in cpu_post_load() Philippe Mathieu-Daudé
2026-07-05 21:56 ` Philippe Mathieu-Daudé [this message]
2026-07-05 21:57 ` [PATCH v3 04/32] accel/hvf: Remove left-over comment Philippe Mathieu-Daudé
2026-07-05 21:57 ` [PATCH v3 05/32] accel/mshv: Replace @dirty field by generic CPUState::vcpu_dirty field Philippe Mathieu-Daudé
2026-07-05 21:57 ` [PATCH v3 06/32] gdbstub: Add trace event for STEP packet handler Philippe Mathieu-Daudé
2026-07-05 21:57 ` [PATCH v3 07/32] gdbstub: Only return E22 when reverse GDB is not supported Philippe Mathieu-Daudé
2026-07-05 21:57 ` [PATCH v3 08/32] accel/whpx: Implement missing AccelClass::gdbstub_supported_sstep_flags Philippe Mathieu-Daudé
2026-07-05 21:57 ` [PATCH v3 09/32] accel/kvm: Always define AccelOpsClass::supports_guest_debug Philippe Mathieu-Daudé
2026-07-05 21:57 ` [PATCH v3 10/32] accel/kvm: Simplify kvm_init() w.r.t. TARGET_KVM_HAVE_GUEST_DEBUG Philippe Mathieu-Daudé
2026-07-05 21:57 ` [PATCH v3 11/32] accel/kvm: Hold have_guest_debug in KVMState Philippe Mathieu-Daudé
2026-07-05 21:57 ` [PATCH v3 12/32] gdbstub: Reduce gdb_supports_guest_debug() scope Philippe Mathieu-Daudé
2026-07-05 21:57 ` [PATCH v3 13/32] gdbstub: Move supported_sstep_flags in AccelGdbConfig structure Philippe Mathieu-Daudé
2026-07-05 21:57 ` [PATCH v3 14/32] accel: Have each implementation return their AccelGdbConfig Philippe Mathieu-Daudé
2026-07-05 21:57 ` [PATCH v3 15/32] gdbstub: Make default replay_mode value explicit in stubs Philippe Mathieu-Daudé
2026-07-05 21:57 ` [PATCH v3 16/32] accel: Hold @can_reverse information in AccelGdbConfig Philippe Mathieu-Daudé
2026-07-06  8:59   ` Manos Pitsidianakis
2026-07-05 21:57 ` [PATCH v3 17/32] accel: Remove AccelOpsClass::supports_guest_debug Philippe Mathieu-Daudé
2026-07-05 21:57 ` [PATCH v3 18/32] cpu: Move cpu_breakpoint_test out of line Philippe Mathieu-Daudé
2026-07-05 21:57 ` [PATCH v3 19/32] cpu: Move BREAKPOINT definitions to 'exec/breakpoint.h' Philippe Mathieu-Daudé
2026-07-05 21:57 ` [PATCH v3 20/32] cpu: Define BreakpointFlags type Philippe Mathieu-Daudé
2026-07-05 21:57 ` [PATCH v3 21/32] accel: Remove unnecessary 'inline' qualifier in remove_all_breakpoints Philippe Mathieu-Daudé
2026-07-05 21:57 ` [PATCH v3 22/32] gdbstub/user: Directly call gdb_breakpoint_remove_all() in user mode Philippe Mathieu-Daudé
2026-07-05 21:57 ` [PATCH v3 23/32] gdbstub: Reduce @type variable scope Philippe Mathieu-Daudé
2026-07-05 21:57 ` [PATCH v3 24/32] gdbstub: Introduce GdbBreakpointType enumerator Philippe Mathieu-Daudé
2026-07-05 21:57 ` [PATCH v3 25/32] accel: Use GdbBreakpointType enum Philippe Mathieu-Daudé
2026-07-05 21:57 ` [PATCH v3 26/32] target/arm: Inline check_watchpoints() in arm_debug_check_watchpoint() Philippe Mathieu-Daudé
2026-07-05 21:57 ` [PATCH v3 27/32] target/ppc: Ensure TCG is used in ppc_update_daw() Philippe Mathieu-Daudé
2026-07-05 21:57 ` [PATCH v3 28/32] accel/tcg: Improve docstrings around TCGCPUOps::*watchpoint* handlers Philippe Mathieu-Daudé
2026-07-05 21:57 ` [PATCH v3 29/32] cpu: Better name cpu_single_step() trace event Philippe Mathieu-Daudé
2026-07-05 21:57 ` [PATCH v3 30/32] cpu: Introduce cpu_single_stepping() helper Philippe Mathieu-Daudé
2026-07-05 21:57 ` [PATCH v3 31/32] cpu: Rename CPUState @singlestep_enabled -> @singlestep_flags Philippe Mathieu-Daudé
2026-07-05 21:57 ` [PATCH v3 32/32] cpu: Only check SSTEP_ENABLE flag in cpu_single_stepping() Philippe Mathieu-Daudé

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