From: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
To: Vinod Koul <vkoul@kernel.org>,
Neil Armstrong <neil.armstrong@linaro.org>,
Kathiravan T <quic_kathirav@quicinc.com>,
Baruch Siach <baruch@tkos.co.il>,
Dmitry Baryshkov <lumag@kernel.org>,
Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>,
Manu Gautam <mgautam@codeaurora.org>,
Kishon Vijay Abraham I <kishon@kernel.org>
Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: [PATCH v2 2/3] phy: qcom-qusb2: correst PHY description for IPQ6018
Date: Mon, 06 Jul 2026 16:53:15 +0300 [thread overview]
Message-ID: <20260706-fix-qusb2-v2-2-8d9cd73b1db7@oss.qualcomm.com> (raw)
In-Reply-To: <20260706-fix-qusb2-v2-0-8d9cd73b1db7@oss.qualcomm.com>
Qualcomm IPQ6018 doesn't need to reach power collapse or retention of
the USB voltage rails, so autoresume is not used on that platform.
Instead of programming a fake register bit (BIT(0) of TEST1, while the
QUSB2 platforms on that platform should use BIT(3) of TEST_CTRL),
explicitly disable autoresume programming on these devices via the flag
in the platform data.
Fixes: 2cfbe6765b7a ("phy: qcom-qusb2: add QUSB2 support for IPQ6018")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
---
drivers/phy/qualcomm/phy-qcom-qusb2.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/phy/qualcomm/phy-qcom-qusb2.c b/drivers/phy/qualcomm/phy-qcom-qusb2.c
index 15c36b594c09..b1d34b080cfd 100644
--- a/drivers/phy/qualcomm/phy-qcom-qusb2.c
+++ b/drivers/phy/qualcomm/phy-qcom-qusb2.c
@@ -294,6 +294,7 @@ struct qusb2_phy_cfg {
unsigned int mask_core_ready;
unsigned int disable_ctrl;
unsigned int autoresume_en;
+ bool autoresume_disable;
/* true if PHY has PLL_TEST register to select clk_scheme */
bool has_pll_test;
@@ -341,6 +342,7 @@ static const struct qusb2_phy_cfg ipq6018_phy_cfg = {
.disable_ctrl = POWER_DOWN,
.mask_core_ready = PLL_LOCKED,
/* autoresume not used */
+ .autoresume_disable = true,
.autoresume_en = BIT(0),
};
@@ -676,7 +678,7 @@ static int __maybe_unused qusb2_phy_runtime_suspend(struct device *dev)
}
/* enable phy auto-resume only if device is connected on bus */
- if (qphy->mode != PHY_MODE_INVALID) {
+ if (qphy->mode != PHY_MODE_INVALID && !cfg->autoresume_disable) {
qusb2_setbits(qphy->base, cfg->regs[QUSB2PHY_PORT_TEST1],
cfg->autoresume_en);
/* Autoresume bit has to be toggled in order to enable it */
--
2.47.3
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
WARNING: multiple messages have this Message-ID (diff)
From: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
To: Vinod Koul <vkoul@kernel.org>,
Neil Armstrong <neil.armstrong@linaro.org>,
Kathiravan T <quic_kathirav@quicinc.com>,
Baruch Siach <baruch@tkos.co.il>,
Dmitry Baryshkov <lumag@kernel.org>,
Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>,
Manu Gautam <mgautam@codeaurora.org>,
Kishon Vijay Abraham I <kishon@kernel.org>
Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: [PATCH v2 2/3] phy: qcom-qusb2: correst PHY description for IPQ6018
Date: Mon, 06 Jul 2026 16:53:15 +0300 [thread overview]
Message-ID: <20260706-fix-qusb2-v2-2-8d9cd73b1db7@oss.qualcomm.com> (raw)
In-Reply-To: <20260706-fix-qusb2-v2-0-8d9cd73b1db7@oss.qualcomm.com>
Qualcomm IPQ6018 doesn't need to reach power collapse or retention of
the USB voltage rails, so autoresume is not used on that platform.
Instead of programming a fake register bit (BIT(0) of TEST1, while the
QUSB2 platforms on that platform should use BIT(3) of TEST_CTRL),
explicitly disable autoresume programming on these devices via the flag
in the platform data.
Fixes: 2cfbe6765b7a ("phy: qcom-qusb2: add QUSB2 support for IPQ6018")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
---
drivers/phy/qualcomm/phy-qcom-qusb2.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/phy/qualcomm/phy-qcom-qusb2.c b/drivers/phy/qualcomm/phy-qcom-qusb2.c
index 15c36b594c09..b1d34b080cfd 100644
--- a/drivers/phy/qualcomm/phy-qcom-qusb2.c
+++ b/drivers/phy/qualcomm/phy-qcom-qusb2.c
@@ -294,6 +294,7 @@ struct qusb2_phy_cfg {
unsigned int mask_core_ready;
unsigned int disable_ctrl;
unsigned int autoresume_en;
+ bool autoresume_disable;
/* true if PHY has PLL_TEST register to select clk_scheme */
bool has_pll_test;
@@ -341,6 +342,7 @@ static const struct qusb2_phy_cfg ipq6018_phy_cfg = {
.disable_ctrl = POWER_DOWN,
.mask_core_ready = PLL_LOCKED,
/* autoresume not used */
+ .autoresume_disable = true,
.autoresume_en = BIT(0),
};
@@ -676,7 +678,7 @@ static int __maybe_unused qusb2_phy_runtime_suspend(struct device *dev)
}
/* enable phy auto-resume only if device is connected on bus */
- if (qphy->mode != PHY_MODE_INVALID) {
+ if (qphy->mode != PHY_MODE_INVALID && !cfg->autoresume_disable) {
qusb2_setbits(qphy->base, cfg->regs[QUSB2PHY_PORT_TEST1],
cfg->autoresume_en);
/* Autoresume bit has to be toggled in order to enable it */
--
2.47.3
next prev parent reply other threads:[~2026-07-06 13:53 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-06 13:53 [PATCH v2 0/3] phy: qcom-qusb2: sort out register layouts Dmitry Baryshkov
2026-07-06 13:53 ` Dmitry Baryshkov
2026-07-06 13:53 ` [PATCH v2 1/3] phy: qcom-qusb2: enable autoresume on Talos platforms Dmitry Baryshkov
2026-07-06 13:53 ` Dmitry Baryshkov
2026-07-06 15:37 ` Konrad Dybcio
2026-07-06 15:37 ` Konrad Dybcio
2026-07-06 13:53 ` Dmitry Baryshkov [this message]
2026-07-06 13:53 ` [PATCH v2 2/3] phy: qcom-qusb2: correst PHY description for IPQ6018 Dmitry Baryshkov
2026-07-07 7:39 ` Konrad Dybcio
2026-07-07 7:39 ` Konrad Dybcio
2026-07-06 13:53 ` [PATCH v2 3/3] phy: qcom-qusb2: describe autoresume bit Dmitry Baryshkov
2026-07-06 13:53 ` Dmitry Baryshkov
2026-07-07 8:43 ` [PATCH v2 0/3] phy: qcom-qusb2: sort out register layouts Konrad Dybcio
2026-07-07 8:43 ` Konrad Dybcio
2026-09-09 16:17 ` Manivannan Sadhasivam
2026-09-13 6:22 ` Vinod Koul
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