[PATCH v5 00/10] Add SSP/TSP power control and DRAM remap support for AST2700

[Jamin Lin <jamin_lin@aspeedtech.com>]

This series improves AST2700 platform support by aligning SSP/TSP
power and reset behavior with hardware, and enabling DRAM remapping
required for proper firmware boot flow.

This series depends on:
[v2,0/8] Refactor AST2700 SCU preparation for coprocessors
https://patchwork.kernel.org/project/qemu-devel/cover/20260707060919.350637-1-jamin_lin@aspeedtech.com/

v1:
  1. The changes move DRAM/SDMC initialization earlier to support memory
aliasing, add DRAM aliases for SSP/TSP SDRAM remap, and implement
SSP/TSP reset, power-on, and remap controls via SCU registers.
  2. With these updates, SSP and TSP can be booted via PSP and load their
binaries from DRAM. Functional tests and documentation are updated
accordingly.

v2:
  Fix "make check" failure caused by both AST2700 and AST1700 realizing the same
  TYPE_AST2700_SCU model.
  
v3:
 1. Drop "Move DRAM and SDMC initialization earlier to support memory aliasing"
 2. Support SPI/FMC FIFO Mode
 3. Add unimplemented devices

v4:
 1. Introduce Aspeed2700SCU subclass and separate from generic SCU.
 2. Add separate reset handler for AST2700 SCUIO
 3. Add AST2700 SCUIO RNG control and data registers
 4. Share single SCUIO instance across PSP, SSP, and TSP
 5. Fix AST2700 FC hardware strap settings

v5:
 1. To speed up the review process, move the following patches into a separate 
    patch series, as they are not directly related to the main topic of this series:
 
    [v4,01/21] hw/misc/aspeed_scu: Introduce Aspeed2700SCU subclass and separate from generic SCU
    [v4,02/21] hw/misc/aspeed_scu: Add separate reset handler for AST2700 SCUIO
    [v4,11/21] hw/arm/ast27x0: Share FMC controller with SSP and TSP
    [v4,12/21] hw/arm/aspeed_ast27x0: Add unimplemented Privilege Controller MMIO regions for SSP/TSP (Merged)
    [v4,13/21] hw/arm/aspeed_ast27x0: Add unimplemented OTP controller MMIO regions for SSP/TSP (Merged)
    [v4,14/21] hw/block/m25p80: Implement volatile status register write enable for Winbond
    [v4,15/21] hw/ssi/aspeed_smc: Add Data FIFO-based flash access support for AST2700
    [v4,16/21] hw/misc/aspeed_scu: Drop noisy unhandled read logs for AST2700 SCU/SCUIO (Merged)
    [v4,17/21] hw/misc/aspeed_scu: Add AST2700 SCUIO RNG control and data registers (Merged)
    [v4,18/21] hw/arm/ast27x0: Share single SCUIO instance across PSP, SSP, and TSP
    [v4,19/21] hw/arm/aspeed_ast27x0-fc: Fix hardware strap settings (Merged)
    
  2. Add memory_region_transaction_begin() and memory_region_transaction_commit()
     to protect the transaction.
    
Jamin Lin (10):
  hw/arm/ast27x0: Start SSP in powered-off state to match hardware
    behavior
  hw/arm/ast27x0: Start TSP in powered-off state to match hardware
    behavior
  hw/arm/ast27x0: Add DRAM alias for SSP SDRAM remap
  hw/arm/ast27x0: Add DRAM alias for TSP SDRAM remap
  hw/misc/aspeed_scu: Implement SSP reset and power-on control via SCU
    registers
  hw/misc/aspeed_scu: Implement TSP reset and power-on control via SCU
    registers
  hw/misc/aspeed_scu: Add SCU support for SSP SDRAM remap
  hw/misc/aspeed_scu: Add SCU support for TSP SDRAM remap
  tests/functional/aarch64/test_aspeed_ast2700fc: Boot SSP/TSP via PSP
    and load binaries from DRAM
  docs: Add support vbootrom and update Manual boot for ast2700fc

 docs/system/arm/aspeed.rst                    |  42 ++-
 include/hw/misc/aspeed_scu.h                  |   5 +
 hw/arm/aspeed_ast27x0-fc.c                    |   4 +
 hw/arm/aspeed_ast27x0-ssp.c                   |  13 +
 hw/arm/aspeed_ast27x0-tsp.c                   |  10 +
 hw/arm/aspeed_ast27x0.c                       |   6 +
 hw/misc/aspeed_scu.c                          | 285 ++++++++++++++++++
 .../aarch64/test_aspeed_ast2700fc.py          |  29 +-
 8 files changed, 374 insertions(+), 20 deletions(-)

-- 
2.43.0