From: sashiko-bot@kernel.org
To: "Alberto Robazza" <robazzalberto@gmail.com>
Cc: neil.armstrong@linaro.org, devicetree@vger.kernel.org,
robh@kernel.org, linux-amlogic@lists.infradead.org,
conor+dt@kernel.org
Subject: Re: [PATCH v2 3/3] arm64: dts: amlogic: add support for Orbbec Zora P1
Date: Sun, 26 Jul 2026 20:26:44 +0000 [thread overview]
Message-ID: <20260726202645.3B6DF1F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260726201647.264108-4-robazzalberto@gmail.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] Pin multiplexing conflict on GPIOX_16 between the Wi-Fi SDIO power sequence reset and the 32.768kHz PWM clock.
--
--- Patch [3]: [PATCH v2 3/3] arm64: dts: amlogic: add support for Orbbec Zora P1 ---
commit 4c25c22b59ef54a3b08d02aab848d6f6aa6af1ef
Author: Alberto Robazza <robazzalberto@gmail.com>
arm64: dts: amlogic: add support for Orbbec Zora P1
This commit adds device tree support for the Orbbec Zora P1 board, an A311D
based device. It builds upon the ODROID-N2 device tree, adding specific GPIO
wiring for Wi-Fi and Bluetooth over SDIO and UART_A. It also includes the
board's compatible string and LED configurations.
> diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-zora-p1.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-zora-p1.dts
> new file mode 100644
> --- /dev/null
> +++ b/arch/arm64/boot/dts/amlogic/meson-g12b-zora-p1.dts
[ ... ]
> + sdio_pwrseq: sdio-pwrseq {
> + compatible = "mmc-pwrseq-simple";
> + reset-gpios = <&gpio GPIOX_16 GPIO_ACTIVE_LOW>;
> + clocks = <&wifi32k>;
> + clock-names = "ext_clock";
> + };
> +
> + wifi32k: wifi32k {
> + compatible = "pwm-clock";
> + #clock-cells = <0>;
> + clock-frequency = <32768>;
> + pwms = <&pwm_ef 0 30518 0>;
> + };
[ ... ]
> +&pwm_ef {
> + status = "okay";
> + pinctrl-0 = <&pwm_e_pins>;
[Severity: High]
Will this create a pin multiplexing conflict on GPIOX_16?
The sdio_pwrseq node claims GPIOX_16 as a standard GPIO for the reset-gpios
line. However, the pwm_ef node requests the pwm_e_pins pinctrl group. On the
Amlogic G12B platform, pwm_e_pins maps exactly to GPIOX_16.
Since a single physical pin cannot concurrently output a 32kHz PWM clock signal
and function as a static GPIO reset signal for the Wi-Fi module, will the
pinctrl subsystem fail one of the requests and prevent the Wi-Fi module from
initializing?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260726201647.264108-1-robazzalberto@gmail.com?part=3
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WARNING: multiple messages have this Message-ID (diff)
From: sashiko-bot@kernel.org
To: "Alberto Robazza" <robazzalberto@gmail.com>
Cc: neil.armstrong@linaro.org, devicetree@vger.kernel.org,
robh@kernel.org, linux-amlogic@lists.infradead.org,
conor+dt@kernel.org
Subject: Re: [PATCH v2 3/3] arm64: dts: amlogic: add support for Orbbec Zora P1
Date: Sun, 26 Jul 2026 20:26:44 +0000 [thread overview]
Message-ID: <20260726202645.3B6DF1F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260726201647.264108-4-robazzalberto@gmail.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] Pin multiplexing conflict on GPIOX_16 between the Wi-Fi SDIO power sequence reset and the 32.768kHz PWM clock.
--
--- Patch [3]: [PATCH v2 3/3] arm64: dts: amlogic: add support for Orbbec Zora P1 ---
commit 4c25c22b59ef54a3b08d02aab848d6f6aa6af1ef
Author: Alberto Robazza <robazzalberto@gmail.com>
arm64: dts: amlogic: add support for Orbbec Zora P1
This commit adds device tree support for the Orbbec Zora P1 board, an A311D
based device. It builds upon the ODROID-N2 device tree, adding specific GPIO
wiring for Wi-Fi and Bluetooth over SDIO and UART_A. It also includes the
board's compatible string and LED configurations.
> diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-zora-p1.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-zora-p1.dts
> new file mode 100644
> --- /dev/null
> +++ b/arch/arm64/boot/dts/amlogic/meson-g12b-zora-p1.dts
[ ... ]
> + sdio_pwrseq: sdio-pwrseq {
> + compatible = "mmc-pwrseq-simple";
> + reset-gpios = <&gpio GPIOX_16 GPIO_ACTIVE_LOW>;
> + clocks = <&wifi32k>;
> + clock-names = "ext_clock";
> + };
> +
> + wifi32k: wifi32k {
> + compatible = "pwm-clock";
> + #clock-cells = <0>;
> + clock-frequency = <32768>;
> + pwms = <&pwm_ef 0 30518 0>;
> + };
[ ... ]
> +&pwm_ef {
> + status = "okay";
> + pinctrl-0 = <&pwm_e_pins>;
[Severity: High]
Will this create a pin multiplexing conflict on GPIOX_16?
The sdio_pwrseq node claims GPIOX_16 as a standard GPIO for the reset-gpios
line. However, the pwm_ef node requests the pwm_e_pins pinctrl group. On the
Amlogic G12B platform, pwm_e_pins maps exactly to GPIOX_16.
Since a single physical pin cannot concurrently output a 32kHz PWM clock signal
and function as a static GPIO reset signal for the Wi-Fi module, will the
pinctrl subsystem fail one of the requests and prevent the Wi-Fi module from
initializing?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260726201647.264108-1-robazzalberto@gmail.com?part=3
next prev parent reply other threads:[~2026-07-26 20:26 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-26 20:16 [PATCH v2 0/3] arm64: dts: amlogic: add support for Orbbec Zora P1 Alberto Robazza
2026-07-26 20:16 ` Alberto Robazza
2026-07-26 20:16 ` [PATCH v2 1/3] dt-bindings: vendor-prefixes: add Orbbec Alberto Robazza
2026-07-26 20:16 ` Alberto Robazza
2026-07-26 20:16 ` [PATCH v2 2/3] dt-bindings: arm: amlogic: document Orbbec Zora P1 board compatible Alberto Robazza
2026-07-26 20:16 ` Alberto Robazza
2026-07-26 20:16 ` [PATCH v2 3/3] arm64: dts: amlogic: add support for Orbbec Zora P1 Alberto Robazza
2026-07-26 20:16 ` Alberto Robazza
2026-07-26 20:26 ` sashiko-bot [this message]
2026-07-26 20:26 ` sashiko-bot
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