Re: [PATCH v7 04/34] pinctrl: airoha: an7581: fix misprint in bitfield name

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:

Pre-existing issues:
- [High] `an7583_mdio_func_group` incorrectly applies `GPIO_MDC_IO_MASTER_MODE_MASK` to the `REG_GPIO_SPI_CS1_MODE` register, causing hardware configuration corruption.
--

--- Patch [4]: [PATCH v7 04/34] pinctrl: airoha: an7581: fix misprint in bitfield name ---
commit 69c3ff6d2f6ded4cac1d3fa356dd0e46f67e9ed4
Author: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>

pinctrl: airoha: an7581: fix misprint in bitfield name

This commit fixes a typo in the bitfield name for the GPIO_2ND_I2C_MODE
register, renaming GPIO_MDC_IO_MASTER_MODE_MODE to
GPIO_MDC_IO_MASTER_MODE_MASK.

> diff --git a/drivers/pinctrl/airoha/pinctrl-airoha.c b/drivers/pinctrl/airoha/pinctrl-airoha.c
> index 04b4424c688b2..63c82268aa823 100644
> --- a/drivers/pinctrl/airoha/pinctrl-airoha.c
> +++ b/drivers/pinctrl/airoha/pinctrl-airoha.c

[ ... ]

> @@ -1051,8 +1051,8 @@ static const struct airoha_pinctrl_func_group an7583_mdio_func_group[] = {
>  		.regmap[1] = {
>  			AIROHA_FUNC_MUX,
>  			REG_GPIO_SPI_CS1_MODE,
> -			GPIO_MDC_IO_MASTER_MODE_MODE,
> -			GPIO_MDC_IO_MASTER_MODE_MODE
> +			GPIO_MDC_IO_MASTER_MODE_MASK,
> +			GPIO_MDC_IO_MASTER_MODE_MASK

[Severity: High]
This isn't a bug introduced by this patch, but is it intentional to use
GPIO_MDC_IO_MASTER_MODE_MASK with the REG_GPIO_SPI_CS1_MODE register here in
an7583_mdio_func_group?

It appears that BIT(14) in REG_GPIO_SPI_CS1_MODE maps to
GPIO_PCM_SPI_MODE_MASK rather than MDC IO master mode. Could this fail to
enable the MDC IO master mode for MDIO and unintentionally alter the PCM SPI
mode instead?

>  		},
>  		.regmap_size = 2,
>  	},

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260727074234.3761170-1-mikhail.kshevetskiy@iopsys.eu?part=4