From: Brian Cain <brian.cain@oss.qualcomm.com>
To: qemu-devel@nongnu.org
Cc: philmd@oss.qualcomm.com,
Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>,
Fabiano Rosas <farosas@suse.de>,
Laurent Vivier <lvivier@redhat.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Brian Cain <brian.cain@oss.qualcomm.com>,
matheus.bernardino@oss.qualcomm.com
Subject: [PATCH v4 01/18] hw/hexagon: add hex-subsys
Date: Wed, 29 Jul 2026 18:28:06 -0700 [thread overview]
Message-ID: <20260730012824.1135905-2-brian.cain@oss.qualcomm.com> (raw)
In-Reply-To: <20260730012824.1135905-1-brian.cain@oss.qualcomm.com>
The virt and DSP machine models build the same core subsystem, let's
abstract out that part. Start with the DDR and config table ROM setup.
Signed-off-by: Brian Cain <brian.cain@oss.qualcomm.com>
---
include/hw/hexagon/hex-subsys.h | 17 +++++++++++++++++
hw/hexagon/hex-subsys.c | 32 ++++++++++++++++++++++++++++++++
hw/hexagon/hexagon_dsp.c | 17 ++---------------
hw/hexagon/virt.c | 14 ++------------
hw/hexagon/meson.build | 1 +
5 files changed, 54 insertions(+), 27 deletions(-)
create mode 100644 include/hw/hexagon/hex-subsys.h
create mode 100644 hw/hexagon/hex-subsys.c
diff --git a/include/hw/hexagon/hex-subsys.h b/include/hw/hexagon/hex-subsys.h
new file mode 100644
index 00000000000..6bcde303f2e
--- /dev/null
+++ b/include/hw/hexagon/hex-subsys.h
@@ -0,0 +1,17 @@
+/*
+ * Hexagon subsystem helpers shared between the machine models.
+ *
+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#ifndef HW_HEXAGON_HEX_SUBSYS_H
+#define HW_HEXAGON_HEX_SUBSYS_H
+
+#include "hw/hexagon/hexagon.h"
+
+/* Create the subsystem shared by every Hexagon machine. */
+void hex_subsys_create(HexagonCommonMachineState *hms,
+ const struct hexagon_machine_config *m_cfg);
+
+#endif /* HW_HEXAGON_HEX_SUBSYS_H */
diff --git a/hw/hexagon/hex-subsys.c b/hw/hexagon/hex-subsys.c
new file mode 100644
index 00000000000..d146ee0c075
--- /dev/null
+++ b/hw/hexagon/hex-subsys.c
@@ -0,0 +1,32 @@
+/*
+ * Hexagon subsystem helpers shared between the machine models.
+ *
+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "hw/hexagon/hex-subsys.h"
+#include "hw/core/loader.h"
+#include "system/address-spaces.h"
+
+void hex_subsys_create(HexagonCommonMachineState *hms,
+ const struct hexagon_machine_config *m_cfg)
+{
+ MachineState *machine = MACHINE(hms);
+ MemoryRegion *sysmem = get_system_memory();
+
+ /* Main DDR at the reset vector. */
+ memory_region_init_ram(&hms->ram, NULL, "ddr.ram", machine->ram_size,
+ &error_fatal);
+ memory_region_add_subregion(sysmem, 0x0, &hms->ram);
+
+ /* Config-table ROM and the blob that backs it. */
+ memory_region_init_rom(&hms->cfgtable_rom, NULL, "config_table.rom",
+ sizeof(m_cfg->cfgtable), &error_fatal);
+ memory_region_add_subregion(sysmem, m_cfg->cfgbase, &hms->cfgtable_rom);
+ rom_add_blob_fixed_as("config_table.rom", &m_cfg->cfgtable,
+ sizeof(m_cfg->cfgtable), m_cfg->cfgbase,
+ &address_space_memory);
+}
diff --git a/hw/hexagon/hexagon_dsp.c b/hw/hexagon/hexagon_dsp.c
index aa493993229..f94f7fd4e11 100644
--- a/hw/hexagon/hexagon_dsp.c
+++ b/hw/hexagon/hexagon_dsp.c
@@ -14,6 +14,7 @@
#include "hw/core/boards.h"
#include "hw/core/qdev-properties.h"
#include "hw/hexagon/hexagon.h"
+#include "hw/hexagon/hex-subsys.h"
#include "hw/hexagon/hexagon_globalreg.h"
#include "hw/hexagon/hexagon_tlb.h"
#include "hw/core/loader.h"
@@ -108,7 +109,6 @@ static void hexagon_common_init(MachineState *machine, Rev_t rev,
{
HexagonCommonMachineState *hms = HEXAGON_COMMON_MACHINE(machine);
HexagonDspMachineState *dms = HEXAGON_DSP_MACHINE(machine);
- MemoryRegion *address_space;
DeviceState *glob_regs_dev;
DeviceState *tlb_dev;
@@ -120,16 +120,7 @@ static void hexagon_common_init(MachineState *machine, Rev_t rev,
machine->enable_graphics = 0;
- address_space = get_system_memory();
-
- memory_region_init_rom(&hms->cfgtable_rom, NULL, "config_table.rom",
- sizeof(m_cfg->cfgtable), &error_fatal);
- memory_region_add_subregion(address_space, m_cfg->cfgbase,
- &hms->cfgtable_rom);
-
- memory_region_init_ram(&hms->ram, NULL, "ddr.ram",
- machine->ram_size, &error_fatal);
- memory_region_add_subregion(address_space, 0x0, &hms->ram);
+ hex_subsys_create(hms, m_cfg);
glob_regs_dev = qdev_new(TYPE_HEXAGON_GLOBALREG);
object_property_add_child(OBJECT(machine), "global-regs",
@@ -162,10 +153,6 @@ static void hexagon_common_init(MachineState *machine, Rev_t rev,
OBJECT(tlb_dev), &error_fatal);
qdev_realize_and_unref(DEVICE(cpu), NULL, &error_fatal);
}
-
- rom_add_blob_fixed_as("config_table.rom", &m_cfg->cfgtable,
- sizeof(m_cfg->cfgtable), m_cfg->cfgbase,
- &address_space_memory);
}
static void init_mc(MachineClass *mc)
diff --git a/hw/hexagon/virt.c b/hw/hexagon/virt.c
index b7504725026..ad0bc4f1329 100644
--- a/hw/hexagon/virt.c
+++ b/hw/hexagon/virt.c
@@ -13,6 +13,7 @@
#include "hw/core/clock.h"
#include "hw/core/sysbus-fdt.h"
#include "hw/hexagon/hexagon.h"
+#include "hw/hexagon/hex-subsys.h"
#include "hw/hexagon/hexagon_globalreg.h"
#include "hw/hexagon/hexagon_tlb.h"
#include "hw/core/loader.h"
@@ -244,9 +245,7 @@ static void virt_init(MachineState *ms)
vms->apb_clk = clock_new(OBJECT(ms), "apb-pclk");
clock_set_hz(vms->apb_clk, 24000000);
- memory_region_init_ram(&vms->parent_obj.ram, NULL, "ddr.ram",
- ms->ram_size, &error_fatal);
- memory_region_add_subregion(vms->sys, 0x0, &vms->parent_obj.ram);
+ hex_subsys_create(&vms->parent_obj, m_cfg);
if (m_cfg->l2tcm_size) {
memory_region_init_ram(&vms->tcm, NULL, "tcm.ram", m_cfg->l2tcm_size,
@@ -255,11 +254,6 @@ static void virt_init(MachineState *ms)
&vms->tcm);
}
- memory_region_init_rom(&vms->parent_obj.cfgtable_rom, NULL,
- "config_table.rom", sizeof(m_cfg->cfgtable),
- &error_fatal);
- memory_region_add_subregion(vms->sys, m_cfg->cfgbase,
- &vms->parent_obj.cfgtable_rom);
fdt_add_hvx(vms, m_cfg);
gsregs_dev = qdev_new(TYPE_HEXAGON_GLOBALREG);
@@ -302,10 +296,6 @@ static void virt_init(MachineState *ms)
clk_phandle = fdt_add_clocks(vms);
fdt_add_uart(vms, VIRT_UART0, clk_phandle);
- rom_add_blob_fixed_as("config_table.rom", &m_cfg->cfgtable,
- sizeof(m_cfg->cfgtable), m_cfg->cfgbase,
- &address_space_memory);
-
hexagon_load_fdt(vms);
}
diff --git a/hw/hexagon/meson.build b/hw/hexagon/meson.build
index bade3a32921..720a5d54dcc 100644
--- a/hw/hexagon/meson.build
+++ b/hw/hexagon/meson.build
@@ -1,6 +1,7 @@
hexagon_ss = ss.source_set()
hexagon_ss.add(files('hexagon_tlb.c'))
hexagon_ss.add(files('hexagon_globalreg.c'))
+hexagon_ss.add(when: 'CONFIG_HEX_DSP', if_true: files('hex-subsys.c'))
hexagon_ss.add(when: 'CONFIG_HEX_DSP', if_true: files('hexagon_dsp.c'))
hexagon_ss.add(when: 'CONFIG_HEX_VIRT', if_true: files('virt.c'))
--
2.34.1
next prev parent reply other threads:[~2026-07-30 1:31 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-30 1:28 [PATCH v4 00/18] Add hexagon l2vic, qtimer devices Brian Cain
2026-07-30 1:28 ` Brian Cain [this message]
2026-07-31 17:28 ` [PATCH v4 01/18] hw/hexagon: add hex-subsys Pierrick Bouvier
2026-07-30 1:28 ` [PATCH v4 02/18] hw/hexagon: move VTCM to the common machine state Brian Cain
2026-07-31 17:29 ` Pierrick Bouvier
2026-07-30 1:28 ` [PATCH v4 03/18] hw/hexagon: move global registers to hex-subsys Brian Cain
2026-07-31 17:29 ` Pierrick Bouvier
2026-07-30 1:28 ` [PATCH v4 04/18] hw/hexagon: move the TLB " Brian Cain
2026-07-31 17:30 ` Pierrick Bouvier
2026-07-30 1:28 ` [PATCH v4 05/18] hw/hexagon: group the CPUs in a cluster Brian Cain
2026-07-31 17:34 ` Pierrick Bouvier
2026-07-30 1:28 ` [PATCH v4 06/18] bitops.h: Add find_first_bit32() Brian Cain
2026-07-30 1:28 ` [PATCH v4 07/18] hw/intc: Add l2vic interrupt controller Brian Cain
2026-07-30 1:28 ` [PATCH v4 08/18] hw/hexagon: extract get_reg_value/set_reg_value stubs in globalreg Brian Cain
2026-07-30 1:28 ` [PATCH v4 09/18] hw/hexagon: connect l2vic device Brian Cain
2026-07-30 1:28 ` [PATCH v4 10/18] hw/hexagon/virt: instantiate virtio-mmio transports Brian Cain
2026-07-30 1:28 ` [PATCH v4 11/18] hw/hexagon/virt: add l2vic interrupt-controller and virtio-mmio FDT nodes Brian Cain
2026-07-31 17:35 ` Pierrick Bouvier
2026-07-30 1:28 ` [PATCH v4 12/18] hw/hexagon/virt: connect pl011 UART interrupt Brian Cain
2026-07-30 1:28 ` [PATCH v4 13/18] tests/qtest: add L2VIC qtest Brian Cain
2026-07-30 1:28 ` [PATCH v4 14/18] tests/functional/hexagon: add arch_tests functional test Brian Cain
2026-07-30 1:28 ` [PATCH v4 15/18] hw/timer: Add QCT QTimer device model Brian Cain
2026-07-31 17:59 ` Pierrick Bouvier
2026-08-05 21:10 ` Brian Cain
2026-07-30 1:28 ` [PATCH v4 16/18] hw/hexagon: connect qtimer device Brian Cain
2026-07-31 17:36 ` Pierrick Bouvier
2026-07-30 1:28 ` [PATCH v4 17/18] tests/qtest: add qct-qtimer qtest Brian Cain
2026-07-31 17:38 ` Pierrick Bouvier
2026-07-30 1:28 ` [PATCH v4 18/18] tests/functional/hexagon: enable more arch_tests cases Brian Cain
2026-07-31 17:39 ` Pierrick Bouvier
2026-07-31 17:42 ` Pierrick Bouvier
2026-08-03 15:43 ` Brian Cain
2026-08-04 21:35 ` Pierrick Bouvier
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