Re: [PATCH 17/22] arm64: dts: qcom: monaco-evk-ifp-mezzanine: Fix the PCIe iommu-map entries

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:

Pre-existing issues:
- [Medium] The fix for 4-cell `iommu-map` entries is incomplete across the tree. Identical incorrect entries targeting IOMMUs with `#iommu-cells = <2>` remain in other related device trees (e.g., `lemans-evk-ifp-mezzanine.dtso` and `qcs6490-*.dts`).
--

--- Patch [17]: [PATCH 17/22] arm64: dts: qcom: monaco-evk-ifp-mezzanine: Fix the PCIe iommu-map entries ---
commit 24efdfda849da979474e77045094935d85b3ae7b
Author: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>

arm64: dts: qcom: monaco-evk-ifp-mezzanine: Fix the PCIe iommu-map entries

This commit fixes the iommu-map entries for the pcie0 node in the
monaco-evk-ifp-mezzanine device tree. It adds the missing SID mask cell to
each entry to match the 2-cell requirement of the pcie_smmu provider,
resolving a warning from the OF core during boot.

> diff --git a/arch/arm64/boot/dts/qcom/monaco-evk-ifp-mezzanine.dtso b/arch/arm64/boot/dts/qcom/monaco-evk-ifp-mezzanine.dtso
> index e6beb4393430b..a6e57ec8a1e14 100644
> --- a/arch/arm64/boot/dts/qcom/monaco-evk-ifp-mezzanine.dtso
> +++ b/arch/arm64/boot/dts/qcom/monaco-evk-ifp-mezzanine.dtso
> @@ -50,15 +50,15 @@ nvmem-layout {
>  };
>  
>  &pcie0 {
> -	iommu-map = <0x0   &pcie_smmu 0x0 0x1>,
> -		    <0x100 &pcie_smmu 0x1 0x1>,

[Severity: Medium]
This is a pre-existing issue, but this fix appears to be incomplete across
the tree.

Identical 4-cell iommu-map entries targeting 2-cell #iommu-cells providers
remain in other related device trees, such as:

arch/arm64/boot/dts/qcom/lemans-evk-ifp-mezzanine.dtso in pcie0:
    iommu-map = <0x0 &pcie_smmu 0x0 0x1>,

arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts in pcie1:
    iommu-map = <0x0 &apps_smmu 0x1c80 0x1>,

arch/arm64/boot/dts/qcom/qcs6490-radxa-dragon-q6a.dts in pcie1:
    iommu-map = <0x0 &apps_smmu 0x1c80 0x1>,

These will likely trigger the same OF core warning mentioned in the commit
message. Should these other files be updated in this patch or a follow-up
series?

> -		    <0x208 &pcie_smmu 0x2 0x1>,
> -		    <0x210 &pcie_smmu 0x3 0x1>,
> -		    <0x218 &pcie_smmu 0x4 0x1>,
> -		    <0x300 &pcie_smmu 0x5 0x1>,
> -		    <0x400 &pcie_smmu 0x6 0x1>,
> -		    <0x500 &pcie_smmu 0x7 0x1>,
> -		    <0x501 &pcie_smmu 0x8 0x1>;
> +	iommu-map = <0x0   &pcie_smmu 0x0 0x0 0x1>,
> +		    <0x100 &pcie_smmu 0x1 0x0 0x1>,
> +		    <0x208 &pcie_smmu 0x2 0x0 0x1>,
> +		    <0x210 &pcie_smmu 0x3 0x0 0x1>,
> +		    <0x218 &pcie_smmu 0x4 0x0 0x1>,
> +		    <0x300 &pcie_smmu 0x5 0x0 0x1>,
> +		    <0x400 &pcie_smmu 0x6 0x0 0x1>,
> +		    <0x500 &pcie_smmu 0x7 0x0 0x1>,
> +		    <0x501 &pcie_smmu 0x8 0x0 0x1>;
>  };
>  
>  &pcieport0 {

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260730-iommu-map-fix-v1-0-83405d37ba41@oss.qualcomm.com?part=17