* [PATCH v7 0/9] Add RZ/G3L USB2.0 host support
@ 2026-08-12 14:19 ` Biju
0 siblings, 0 replies; 14+ messages in thread
From: Biju @ 2026-08-12 14:19 UTC (permalink / raw)
To: Philipp Zabel, Vinod Koul, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Geert Uytterhoeven, Michael Turquette, Stephen Boyd,
Liam Girdwood, Bartosz Golaszewski, Mark Brown, Magnus Damm
Cc: Biju Das, Neil Armstrong, Yoshihiro Shimoda, linux-phy,
devicetree, linux-kernel, linux-clk, linux-renesas-soc,
Prabhakar Mahadev Lad, Biju Das
From: Biju Das <biju.das.jz@bp.renesas.com>
Hi All,
This patch series aims to add USB2.0 host support for the RZ/G3L SMARC
EVK. The RZ/G3L USB PHY block is similar to RZ/G3S, but each port
has an OTG controller, unlike RZ/G3S, which has an OTG controller only on
port 1. This series migrates regulator driver to use id-table so there
is hard dependency between reset driver and regulator driver.
Merge strategy:
An Ack/Rb tag from Regulator Maintainer for patch#1 and #5.
Patch #1,#2,#3,#4,#5 - Reset subsystem
Patch #6,#7,#8,#9 - Renesas SoC
This patch series has functional dependency on [1]
[1] https://lore.kernel.org/all/20260812115010.108322-1-biju.das.jz@bp.renesas.com/
v6->v7:
* Dropped PHY subsystem patches as it is accepted.
* Merged patch series [2] to here
* Collected the tags.
* Added additionalProperties: false in regulators node.
* Updated commit header of patch#6
* Moved the host enable patch.
* dr_mode changed to 'host' as function is not enabled yet.
* Updated commit description for patch#9
* Updated dr_mode = "host" to "otg" in {e,o}hci0 device nodes.
[2] https://lore.kernel.org/all/20260707145135.247565-1-biju.das.jz@bp.renesas.com/#t
v5->v6:
* To avoid breaking bisectability, prepared a single patch that
does the "rzg2l-usb-vbus-regulator" -> "rzg2l-vbus-regulator"
rename in both regulator and reset drivers and that could be
merged into both trees.
* Replaced dev_err->dev_err_probe() in error path of
rzg3l_usb_vbus_regulator_probe().
* Retained the tag as the change is trivial.
v4->v5:
* Collected Ack tag for regulator driver changes.
* Dropped renesas,sysc-pwrrdy for RZ/G3L as pwrrdy signal is modelled as
power sequence.
* Dropped the tag from Conor due to above change .
* Replaced the variable regulator_driver_name->regulator_name in struct
rzg2l_usbphy_ctrl_info
* Switched to power sequence consumer for controlling pwrrdy signal.
* Updated commit description for patch#3.
v3->v4:
* Updated cover letter with merge strategy
* Reorder the phy binding patch for easy merging.
* Updated the commit description for patch #2,#3, #4.
* Moved the handling of regulator_driver_name to patch #3
in preparation for id_table match.
* Migrated to id_table match using driver_name and reduced the length
< 24.
* Dropped rzg3l specific platform driver.
* Dropped the tag for regulator driver,
* Added id_table handling by introducing a common probe().
* Dropped renesas,sysc-pwrrdy property for usbphy-ctrl node.
v2->v3:
* Replaced items->enum in reset controller bindings.
* Collected the tag for reset binding patch.
* Dropped clock patch as it is accepted.
v1->v2:
* Dropped patch#6(Introduce helper for regulator registration)
* Passing pointer to an array of regulators to make it scalable.
* Dropped regulator1-vbus and added a regulators group node.
* Updated commit description for patch#1,#4,#6,#7,#8,#9 and #10.
* Added enum instead of const in the compatible section.
* Updated schema check.
* Collected tag for PHY binding patch.
in the regulator driver.
* Added regulators group node and its children in SoC dtsi.
Biju Das (9):
regulator: renesas-usb-vbus-regulator: Rename platform device to
rzg2l-vbus-regulator
dt-bindings: reset: renesas,rzg2l-usbphy-ctrl: Document RZ/G3L support
reset: rzg2l-usbphy-ctrl: Introduce info struct for match data
reset: rzg2l-usbphy-ctrl: Add RZ/G3L support
regulator: renesas-usb-vbus-regulator: Add RZ/G3L VBUS regulator
support
arm64: dts: renesas: r9a08g046: Add USB2.0 host/phy device nodes
arm64: dts: renesas: r9a08g046: Add USB2.0 function device nodes
arm64: dts: renesas: r9a08g046l48-smarc: Add USB2.0 Host support
arm64: dts: renesas: r9a08g046l48-smarc: Enable USB2.0 function
support
.../reset/renesas,rzg2l-usbphy-ctrl.yaml | 41 ++++-
arch/arm64/boot/dts/renesas/r9a08g046.dtsi | 142 ++++++++++++++++++
.../boot/dts/renesas/r9a08g046l48-smarc.dts | 54 +++++++
.../regulator/renesas-usb-vbus-regulator.c | 75 ++++++++-
drivers/reset/reset-rzg2l-usbphy-ctrl.c | 109 +++++++++++---
5 files changed, 399 insertions(+), 22 deletions(-)
--
2.43.0
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v7 0/9] Add RZ/G3L USB2.0 host support
@ 2026-08-12 14:19 ` Biju
0 siblings, 0 replies; 14+ messages in thread
From: Biju @ 2026-08-12 14:19 UTC (permalink / raw)
To: Philipp Zabel, Vinod Koul, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Geert Uytterhoeven, Michael Turquette, Stephen Boyd,
Liam Girdwood, Bartosz Golaszewski, Mark Brown, Magnus Damm
Cc: Biju Das, Neil Armstrong, Yoshihiro Shimoda, linux-phy,
devicetree, linux-kernel, linux-clk, linux-renesas-soc,
Prabhakar Mahadev Lad, Biju Das
From: Biju Das <biju.das.jz@bp.renesas.com>
Hi All,
This patch series aims to add USB2.0 host support for the RZ/G3L SMARC
EVK. The RZ/G3L USB PHY block is similar to RZ/G3S, but each port
has an OTG controller, unlike RZ/G3S, which has an OTG controller only on
port 1. This series migrates regulator driver to use id-table so there
is hard dependency between reset driver and regulator driver.
Merge strategy:
An Ack/Rb tag from Regulator Maintainer for patch#1 and #5.
Patch #1,#2,#3,#4,#5 - Reset subsystem
Patch #6,#7,#8,#9 - Renesas SoC
This patch series has functional dependency on [1]
[1] https://lore.kernel.org/all/20260812115010.108322-1-biju.das.jz@bp.renesas.com/
v6->v7:
* Dropped PHY subsystem patches as it is accepted.
* Merged patch series [2] to here
* Collected the tags.
* Added additionalProperties: false in regulators node.
* Updated commit header of patch#6
* Moved the host enable patch.
* dr_mode changed to 'host' as function is not enabled yet.
* Updated commit description for patch#9
* Updated dr_mode = "host" to "otg" in {e,o}hci0 device nodes.
[2] https://lore.kernel.org/all/20260707145135.247565-1-biju.das.jz@bp.renesas.com/#t
v5->v6:
* To avoid breaking bisectability, prepared a single patch that
does the "rzg2l-usb-vbus-regulator" -> "rzg2l-vbus-regulator"
rename in both regulator and reset drivers and that could be
merged into both trees.
* Replaced dev_err->dev_err_probe() in error path of
rzg3l_usb_vbus_regulator_probe().
* Retained the tag as the change is trivial.
v4->v5:
* Collected Ack tag for regulator driver changes.
* Dropped renesas,sysc-pwrrdy for RZ/G3L as pwrrdy signal is modelled as
power sequence.
* Dropped the tag from Conor due to above change .
* Replaced the variable regulator_driver_name->regulator_name in struct
rzg2l_usbphy_ctrl_info
* Switched to power sequence consumer for controlling pwrrdy signal.
* Updated commit description for patch#3.
v3->v4:
* Updated cover letter with merge strategy
* Reorder the phy binding patch for easy merging.
* Updated the commit description for patch #2,#3, #4.
* Moved the handling of regulator_driver_name to patch #3
in preparation for id_table match.
* Migrated to id_table match using driver_name and reduced the length
< 24.
* Dropped rzg3l specific platform driver.
* Dropped the tag for regulator driver,
* Added id_table handling by introducing a common probe().
* Dropped renesas,sysc-pwrrdy property for usbphy-ctrl node.
v2->v3:
* Replaced items->enum in reset controller bindings.
* Collected the tag for reset binding patch.
* Dropped clock patch as it is accepted.
v1->v2:
* Dropped patch#6(Introduce helper for regulator registration)
* Passing pointer to an array of regulators to make it scalable.
* Dropped regulator1-vbus and added a regulators group node.
* Updated commit description for patch#1,#4,#6,#7,#8,#9 and #10.
* Added enum instead of const in the compatible section.
* Updated schema check.
* Collected tag for PHY binding patch.
in the regulator driver.
* Added regulators group node and its children in SoC dtsi.
Biju Das (9):
regulator: renesas-usb-vbus-regulator: Rename platform device to
rzg2l-vbus-regulator
dt-bindings: reset: renesas,rzg2l-usbphy-ctrl: Document RZ/G3L support
reset: rzg2l-usbphy-ctrl: Introduce info struct for match data
reset: rzg2l-usbphy-ctrl: Add RZ/G3L support
regulator: renesas-usb-vbus-regulator: Add RZ/G3L VBUS regulator
support
arm64: dts: renesas: r9a08g046: Add USB2.0 host/phy device nodes
arm64: dts: renesas: r9a08g046: Add USB2.0 function device nodes
arm64: dts: renesas: r9a08g046l48-smarc: Add USB2.0 Host support
arm64: dts: renesas: r9a08g046l48-smarc: Enable USB2.0 function
support
.../reset/renesas,rzg2l-usbphy-ctrl.yaml | 41 ++++-
arch/arm64/boot/dts/renesas/r9a08g046.dtsi | 142 ++++++++++++++++++
.../boot/dts/renesas/r9a08g046l48-smarc.dts | 54 +++++++
.../regulator/renesas-usb-vbus-regulator.c | 75 ++++++++-
drivers/reset/reset-rzg2l-usbphy-ctrl.c | 109 +++++++++++---
5 files changed, 399 insertions(+), 22 deletions(-)
--
2.43.0
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v7 1/9] regulator: renesas-usb-vbus-regulator: Rename platform device to rzg2l-vbus-regulator
2026-08-12 14:19 ` Biju
(?)
@ 2026-08-12 14:19 ` Biju
-1 siblings, 0 replies; 14+ messages in thread
From: Biju @ 2026-08-12 14:19 UTC (permalink / raw)
To: Liam Girdwood, Mark Brown, Philipp Zabel
Cc: Biju Das, linux-kernel, Geert Uytterhoeven, Prabhakar Mahadev Lad,
Biju Das, linux-renesas-soc
From: Biju Das <biju.das.jz@bp.renesas.com>
Rename the platform device name from "rzg2l-usb-vbus-regulator" to
"rzg2l-vbus-regulator" so that it fits within the platform device ID
table's name size restriction, allowing the driver to be converted to
use ID table based matching (struct platform_device_id) instead of
matching purely on driver name string. Update both the driver name in
the regulator driver and the matching platform_device_alloc() call in
reset-rzg2l-usbphy-ctrl.c to keep the two in sync.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
v6->v7:
* No change.
v6:
* New patch
---
drivers/regulator/renesas-usb-vbus-regulator.c | 2 +-
drivers/reset/reset-rzg2l-usbphy-ctrl.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/regulator/renesas-usb-vbus-regulator.c b/drivers/regulator/renesas-usb-vbus-regulator.c
index 9ba791bd72ec..22fcf0d10c85 100644
--- a/drivers/regulator/renesas-usb-vbus-regulator.c
+++ b/drivers/regulator/renesas-usb-vbus-regulator.c
@@ -58,7 +58,7 @@ static int rzg2l_usb_vbus_regulator_probe(struct platform_device *pdev)
static struct platform_driver rzg2l_usb_vbus_regulator_driver = {
.probe = rzg2l_usb_vbus_regulator_probe,
.driver = {
- .name = "rzg2l-usb-vbus-regulator",
+ .name = "rzg2l-vbus-regulator",
.probe_type = PROBE_PREFER_ASYNCHRONOUS,
},
};
diff --git a/drivers/reset/reset-rzg2l-usbphy-ctrl.c b/drivers/reset/reset-rzg2l-usbphy-ctrl.c
index f003b360629c..f90fdb7e6ea4 100644
--- a/drivers/reset/reset-rzg2l-usbphy-ctrl.c
+++ b/drivers/reset/reset-rzg2l-usbphy-ctrl.c
@@ -241,7 +241,7 @@ static int rzg2l_usbphy_ctrl_probe(struct platform_device *pdev)
if (error)
goto err_pm_runtime_put;
- vdev = platform_device_alloc("rzg2l-usb-vbus-regulator", pdev->id);
+ vdev = platform_device_alloc("rzg2l-vbus-regulator", pdev->id);
if (!vdev) {
error = -ENOMEM;
goto err_pm_runtime_put;
--
2.43.0
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v7 2/9] dt-bindings: reset: renesas,rzg2l-usbphy-ctrl: Document RZ/G3L support
2026-08-12 14:19 ` Biju
(?)
(?)
@ 2026-08-12 14:19 ` Biju
-1 siblings, 0 replies; 14+ messages in thread
From: Biju @ 2026-08-12 14:19 UTC (permalink / raw)
To: Philipp Zabel, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Geert Uytterhoeven, Magnus Damm
Cc: Biju Das, devicetree, linux-kernel, linux-renesas-soc,
Prabhakar Mahadev Lad, Biju Das
From: Biju Das <biju.das.jz@bp.renesas.com>
Document Renesas RZ/G3L (r9a08g046) USB PHY controller bindings.
The RZ/G3L USB PHY block is similar to RZ/G3S but differs in that each
port has its own OTG controller, whereas RZ/G3S only has one on port 1.
To reflect this, RZ/G3L uses a regulators sub-node with per-port vbus0
and vbus1 entries instead of the single regulator-vbus property used
by other compatible SoCs.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
v6->v7:
* Added additionalProperties: false in regulators node.
v5->v6:
* No change.
v4->v5:
* Dropped renesas,sysc-pwrrdy for RZ/G3L as pwrrdy signal is modelled as
power sequence.
* Dropped the tag from Conor due to above change .
v3->v4:
* No change.
v2->v3:
* Replaced items->enum
* Collected tag.
v1->v2:
* Updated commit description.
* Added enum instead of const in the compatible section.
* Dropped regulator1-vbus and added a regulators group node.
* Updated schema check.
---
.../reset/renesas,rzg2l-usbphy-ctrl.yaml | 41 ++++++++++++++++++-
1 file changed, 40 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/reset/renesas,rzg2l-usbphy-ctrl.yaml b/Documentation/devicetree/bindings/reset/renesas,rzg2l-usbphy-ctrl.yaml
index c83469a1b379..75e034fa7ce7 100644
--- a/Documentation/devicetree/bindings/reset/renesas,rzg2l-usbphy-ctrl.yaml
+++ b/Documentation/devicetree/bindings/reset/renesas,rzg2l-usbphy-ctrl.yaml
@@ -23,6 +23,7 @@ properties:
- renesas,r9a07g054-usbphy-ctrl # RZ/V2L
- const: renesas,rzg2l-usbphy-ctrl
- const: renesas,r9a08g045-usbphy-ctrl # RZ/G3S
+ - const: renesas,r9a08g046-usbphy-ctrl # RZ/G3L
reg:
maxItems: 1
@@ -50,6 +51,29 @@ properties:
$ref: /schemas/regulator/regulator.yaml#
unevaluatedProperties: false
+ regulators:
+ type: object
+ additionalProperties: false
+ description:
+ list of vbus regulators provided by this controller.
+
+ properties:
+ vbus0:
+ type: object
+ description: Port 1 USB VBUS regulator
+ $ref: /schemas/regulator/regulator.yaml#
+ unevaluatedProperties: false
+
+ vbus1:
+ type: object
+ description: Port 2 USB VBUS regulator
+ $ref: /schemas/regulator/regulator.yaml#
+ unevaluatedProperties: false
+
+ required:
+ - vbus0
+ - vbus1
+
renesas,sysc-pwrrdy:
description:
The system controller PWRRDY indicates to the USB PHY if the power supply
@@ -71,7 +95,6 @@ required:
- resets
- power-domains
- '#reset-cells'
- - regulator-vbus
allOf:
- if:
@@ -86,6 +109,22 @@ allOf:
properties:
renesas,sysc-pwrrdy: false
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: renesas,r9a08g046-usbphy-ctrl
+ then:
+ properties:
+ regulator-vbus: false
+ required:
+ - regulators
+ else:
+ properties:
+ regulators: false
+ required:
+ - regulator-vbus
+
additionalProperties: false
examples:
--
2.43.0
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v7 3/9] reset: rzg2l-usbphy-ctrl: Introduce info struct for match data
2026-08-12 14:19 ` Biju
` (2 preceding siblings ...)
(?)
@ 2026-08-12 14:19 ` Biju
-1 siblings, 0 replies; 14+ messages in thread
From: Biju @ 2026-08-12 14:19 UTC (permalink / raw)
To: Philipp Zabel, Geert Uytterhoeven, Mark Brown, Magnus Damm
Cc: Biju Das, linux-kernel, linux-renesas-soc, Prabhakar Mahadev Lad,
Biju Das
From: Biju Das <biju.das.jz@bp.renesas.com>
Replace the integer flag RZG2L_USBPHY_CTRL_PWRRDY with a structured
rzg2l_usbphy_ctrl_info type to hold per-compatible configuration data.
The new struct currently carries a pwrrdy boolean. The probe function
now retrieves this struct via device_get_match_data() and
conditionally calls rzg2l_usbphy_ctrl_pwrrdy_init() based on the
pwrrdy flag, removing the previous integer cast approach.
This refactoring prepares the driver for RZ/G3L (r9a08g046) support,
which requires a different regulator configuration with two per-port
VBUS regulators.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
v6->v7:
* No change.
v5->v6:
* No change.
v4->v5:
* No change.
v3->v4:
* Updated the commit description.
* Moved the handling of regulator_driver_name to patch #3
in preparation for id_table match.
v2->v3:
* No change.
v1->v2:
* Updated commit description.
---
drivers/reset/reset-rzg2l-usbphy-ctrl.c | 32 ++++++++++++++-----------
1 file changed, 18 insertions(+), 14 deletions(-)
diff --git a/drivers/reset/reset-rzg2l-usbphy-ctrl.c b/drivers/reset/reset-rzg2l-usbphy-ctrl.c
index f90fdb7e6ea4..79503f6f4b23 100644
--- a/drivers/reset/reset-rzg2l-usbphy-ctrl.c
+++ b/drivers/reset/reset-rzg2l-usbphy-ctrl.c
@@ -41,6 +41,10 @@ struct rzg2l_usbphy_ctrl_priv {
spinlock_t lock;
};
+struct rzg2l_usbphy_ctrl_info {
+ bool pwrrdy;
+};
+
#define rcdev_to_priv(x) container_of(x, struct rzg2l_usbphy_ctrl_priv, rcdev)
static int rzg2l_usbphy_ctrl_assert(struct reset_controller_dev *rcdev,
@@ -106,14 +110,15 @@ static void rzg2l_usbphy_ctrl_init(struct rzg2l_usbphy_ctrl_priv *priv)
spin_unlock_irqrestore(&priv->lock, flags);
}
-#define RZG2L_USBPHY_CTRL_PWRRDY 1
+static const struct rzg2l_usbphy_ctrl_info rzg2l_info = {};
+
+static const struct rzg2l_usbphy_ctrl_info rzg3s_info = {
+ .pwrrdy = true,
+};
static const struct of_device_id rzg2l_usbphy_ctrl_match_table[] = {
- { .compatible = "renesas,rzg2l-usbphy-ctrl" },
- {
- .compatible = "renesas,r9a08g045-usbphy-ctrl",
- .data = (void *)RZG2L_USBPHY_CTRL_PWRRDY
- },
+ { .compatible = "renesas,rzg2l-usbphy-ctrl", .data = &rzg2l_info },
+ { .compatible = "renesas,r9a08g045-usbphy-ctrl", .data = &rzg3s_info },
{ /* Sentinel */ }
};
MODULE_DEVICE_TABLE(of, rzg2l_usbphy_ctrl_match_table);
@@ -153,14 +158,9 @@ static int rzg2l_usbphy_ctrl_pwrrdy_init(struct device *dev,
{
struct reg_field field;
struct regmap *regmap;
- const int *data;
u32 args[2];
int ret;
- data = device_get_match_data(dev);
- if ((uintptr_t)data != RZG2L_USBPHY_CTRL_PWRRDY)
- return 0;
-
regmap = syscon_regmap_lookup_by_phandle_args(dev->of_node,
"renesas,sysc-pwrrdy",
ARRAY_SIZE(args), args);
@@ -188,6 +188,7 @@ static int rzg2l_usbphy_ctrl_pwrrdy_init(struct device *dev,
static int rzg2l_usbphy_ctrl_probe(struct platform_device *pdev)
{
+ const struct rzg2l_usbphy_ctrl_info *info;
struct device *dev = &pdev->dev;
struct rzg2l_usbphy_ctrl_priv *priv;
struct platform_device *vdev;
@@ -206,9 +207,12 @@ static int rzg2l_usbphy_ctrl_probe(struct platform_device *pdev)
if (IS_ERR(regmap))
return PTR_ERR(regmap);
- error = rzg2l_usbphy_ctrl_pwrrdy_init(dev, priv);
- if (error)
- return error;
+ info = device_get_match_data(dev);
+ if (info->pwrrdy) {
+ error = rzg2l_usbphy_ctrl_pwrrdy_init(dev, priv);
+ if (error)
+ return error;
+ }
priv->rstc = devm_reset_control_get_exclusive(&pdev->dev, NULL);
if (IS_ERR(priv->rstc))
--
2.43.0
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v7 4/9] reset: rzg2l-usbphy-ctrl: Add RZ/G3L support
2026-08-12 14:19 ` Biju
` (3 preceding siblings ...)
(?)
@ 2026-08-12 14:19 ` Biju
-1 siblings, 0 replies; 14+ messages in thread
From: Biju @ 2026-08-12 14:19 UTC (permalink / raw)
To: Philipp Zabel, Geert Uytterhoeven, Mark Brown, Magnus Damm
Cc: Biju Das, linux-kernel, linux-renesas-soc, Prabhakar Mahadev Lad,
Biju Das
From: Biju Das <biju.das.jz@bp.renesas.com>
Add the renesas,r9a08g046-usbphy-ctrl compatible string to the OF match
table for the RZ/G3L (r9a08g046) SoC, using a dedicated rzg3l_info
struct with pwrrdy set, similar to RZ/G3S.
The RZ/G3L SoC has 2 OTG controllers compared to one on RZ/G3S, so it
uses a separate rzg3l-vbus-regulator driver to handle the additional
VBUSEN control for port 2. The regulator_name field is used as
the platform device name passed to platform_device_alloc(), and must
exactly match the name the corresponding regulator driver registers
via its id_table for platform bus matching to succeed.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
v6->v7:
* No change.
v5->v6:
* No change.
v4->v5:
* Replaced the variable regulator_driver_name->regulator_name in struct
rzg2l_usbphy_ctrl_info
* Switched to power sequence consumer for controlling pwrrdy signal.
* Updated commit description.
v3->v4:
* Updated the commit description.
* Migrated to id_table match using driver_name and reduced the length
< 24.
v2->v3:
* No change.
v1->v2:
* No change.
---
drivers/reset/reset-rzg2l-usbphy-ctrl.c | 79 +++++++++++++++++++++++--
1 file changed, 73 insertions(+), 6 deletions(-)
diff --git a/drivers/reset/reset-rzg2l-usbphy-ctrl.c b/drivers/reset/reset-rzg2l-usbphy-ctrl.c
index 79503f6f4b23..f332ef9ef3e5 100644
--- a/drivers/reset/reset-rzg2l-usbphy-ctrl.c
+++ b/drivers/reset/reset-rzg2l-usbphy-ctrl.c
@@ -10,6 +10,7 @@
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
+#include <linux/pwrseq/consumer.h>
#include <linux/regmap.h>
#include <linux/reset.h>
#include <linux/reset-controller.h>
@@ -37,11 +38,13 @@ struct rzg2l_usbphy_ctrl_priv {
void __iomem *base;
struct platform_device *vdev;
struct regmap_field *pwrrdy;
+ struct pwrseq_desc *pwrseq;
spinlock_t lock;
};
struct rzg2l_usbphy_ctrl_info {
+ const char *regulator_name;
bool pwrrdy;
};
@@ -110,15 +113,24 @@ static void rzg2l_usbphy_ctrl_init(struct rzg2l_usbphy_ctrl_priv *priv)
spin_unlock_irqrestore(&priv->lock, flags);
}
-static const struct rzg2l_usbphy_ctrl_info rzg2l_info = {};
+static const struct rzg2l_usbphy_ctrl_info rzg2l_info = {
+ .regulator_name = "rzg2l-vbus-regulator",
+};
static const struct rzg2l_usbphy_ctrl_info rzg3s_info = {
+ .regulator_name = "rzg2l-vbus-regulator",
+ .pwrrdy = true,
+};
+
+static const struct rzg2l_usbphy_ctrl_info rzg3l_info = {
+ .regulator_name = "rzg3l-vbus-regulator",
.pwrrdy = true,
};
static const struct of_device_id rzg2l_usbphy_ctrl_match_table[] = {
{ .compatible = "renesas,rzg2l-usbphy-ctrl", .data = &rzg2l_info },
{ .compatible = "renesas,r9a08g045-usbphy-ctrl", .data = &rzg3s_info },
+ { .compatible = "renesas,r9a08g046-usbphy-ctrl", .data = &rzg3l_info },
{ /* Sentinel */ }
};
MODULE_DEVICE_TABLE(of, rzg2l_usbphy_ctrl_match_table);
@@ -150,11 +162,16 @@ static int rzg2l_usbphy_ctrl_set_pwrrdy(struct regmap_field *pwrrdy,
static void rzg2l_usbphy_ctrl_pwrrdy_off(void *data)
{
- rzg2l_usbphy_ctrl_set_pwrrdy(data, false);
+ struct rzg2l_usbphy_ctrl_priv *priv = data;
+
+ if (priv->pwrrdy)
+ rzg2l_usbphy_ctrl_set_pwrrdy(priv->pwrrdy, false);
+ else
+ pwrseq_power_off(priv->pwrseq);
}
-static int rzg2l_usbphy_ctrl_pwrrdy_init(struct device *dev,
- struct rzg2l_usbphy_ctrl_priv *priv)
+static int rzg2l_usbphy_ctrl_pwrrdy_syscon_init(struct device *dev,
+ struct rzg2l_usbphy_ctrl_priv *priv)
{
struct reg_field field;
struct regmap *regmap;
@@ -183,7 +200,43 @@ static int rzg2l_usbphy_ctrl_pwrrdy_init(struct device *dev,
if (ret)
return ret;
- return devm_add_action_or_reset(dev, rzg2l_usbphy_ctrl_pwrrdy_off, priv->pwrrdy);
+ return devm_add_action_or_reset(dev, rzg2l_usbphy_ctrl_pwrrdy_off, priv);
+}
+
+static int rzg2l_usbphy_ctrl_pwrrdy_powerseq_init(struct device *dev,
+ struct rzg2l_usbphy_ctrl_priv *priv)
+{
+ int ret;
+
+ priv->pwrseq = devm_pwrseq_get(dev, "usb-pwrrdy");
+ if (IS_ERR(priv->pwrseq)) {
+ /*
+ * This platform requires a sequencer. If we can't get it, we
+ * must return the error (including -EPROBE_DEFER to wait for
+ * the provider to appear)
+ */
+ return dev_err_probe(dev, PTR_ERR(priv->pwrseq),
+ "Failed to get required power sequencer\n");
+ }
+
+ ret = pwrseq_power_on(priv->pwrseq);
+ if (ret)
+ return ret;
+
+ return devm_add_action_or_reset(dev, rzg2l_usbphy_ctrl_pwrrdy_off, priv);
+}
+
+static int rzg2l_usbphy_ctrl_pwrrdy_init(struct device *dev,
+ struct rzg2l_usbphy_ctrl_priv *priv)
+{
+ int ret;
+
+ if (of_property_present(dev->of_node, "renesas,sysc-pwrrdy"))
+ ret = rzg2l_usbphy_ctrl_pwrrdy_syscon_init(dev, priv);
+ else
+ ret = rzg2l_usbphy_ctrl_pwrrdy_powerseq_init(dev, priv);
+
+ return ret;
}
static int rzg2l_usbphy_ctrl_probe(struct platform_device *pdev)
@@ -245,7 +298,7 @@ static int rzg2l_usbphy_ctrl_probe(struct platform_device *pdev)
if (error)
goto err_pm_runtime_put;
- vdev = platform_device_alloc("rzg2l-vbus-regulator", pdev->id);
+ vdev = platform_device_alloc(info->regulator_name, pdev->id);
if (!vdev) {
error = -ENOMEM;
goto err_pm_runtime_put;
@@ -300,6 +353,12 @@ static int rzg2l_usbphy_ctrl_suspend(struct device *dev)
if (ret)
goto reset_deassert;
+ if (priv->pwrseq) {
+ ret = pwrseq_power_off(priv->pwrseq);
+ if (ret)
+ goto reset_deassert;
+ }
+
return 0;
reset_deassert:
@@ -314,6 +373,12 @@ static int rzg2l_usbphy_ctrl_resume(struct device *dev)
struct rzg2l_usbphy_ctrl_priv *priv = dev_get_drvdata(dev);
int ret;
+ if (priv->pwrseq) {
+ ret = pwrseq_power_on(priv->pwrseq);
+ if (ret)
+ return ret;
+ }
+
ret = rzg2l_usbphy_ctrl_set_pwrrdy(priv->pwrrdy, true);
if (ret)
return ret;
@@ -334,6 +399,8 @@ static int rzg2l_usbphy_ctrl_resume(struct device *dev)
reset_control_assert(priv->rstc);
pwrrdy_off:
rzg2l_usbphy_ctrl_set_pwrrdy(priv->pwrrdy, false);
+ if (priv->pwrseq)
+ pwrseq_power_off(priv->pwrseq);
return ret;
}
--
2.43.0
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v7 5/9] regulator: renesas-usb-vbus-regulator: Add RZ/G3L VBUS regulator support
2026-08-12 14:19 ` Biju
` (4 preceding siblings ...)
(?)
@ 2026-08-12 14:19 ` Biju
-1 siblings, 0 replies; 14+ messages in thread
From: Biju @ 2026-08-12 14:19 UTC (permalink / raw)
To: Liam Girdwood, Philipp Zabel, Mark Brown
Cc: Biju Das, linux-kernel, Geert Uytterhoeven, Prabhakar Mahadev Lad,
Biju Das, linux-renesas-soc
From: Biju Das <biju.das.jz@bp.renesas.com>
Add dual USB VBUS regulator support for the RZ/G3L (r9a08g046) SoC, which
has two OTG controllers (one per port), unlike RZ/G3S which has only one.
Introduce a RZG3L_USB_VBUS_REG macro and a rzg3l_usb_vbus_regulators
array with two descriptors: vbus0 (BIT(0)) and vbus1 (BIT(1)), both
sourced from a regulators sub-node as defined in the binding. Add a
dedicated rzg3l_usb_vbus_regulator_probe() that iterates over the array
and registers both regulators using devm_regulator_register().
Convert the existing platform driver to use an id_table, allowing it to
dispatch to either the RZ/G2L or RZ/G3L probe function based on the
matched platform device name.
Acked-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
v6->v7:
* No change.
v5->v6:
* Replaced dev_err->dev_err_probe() in error path of
rzg3l_usb_vbus_regulator_probe().
* Retained the tag as the change is trivial.
v4->v5:
* Collected the tag.
v3->v4:
* Dropped rzg3l specific platform driver.
* Dropped the tag as there are new changes.
* Added id_table handling by introducing a common probe().
v2->v3:
* No change.
v1->v2:
* Passing pointer to an array of regulators to make it scalable.
* Updated commit description.
---
.../regulator/renesas-usb-vbus-regulator.c | 73 ++++++++++++++++++-
1 file changed, 72 insertions(+), 1 deletion(-)
diff --git a/drivers/regulator/renesas-usb-vbus-regulator.c b/drivers/regulator/renesas-usb-vbus-regulator.c
index 22fcf0d10c85..050820a30efb 100644
--- a/drivers/regulator/renesas-usb-vbus-regulator.c
+++ b/drivers/regulator/renesas-usb-vbus-regulator.c
@@ -55,8 +55,79 @@ static int rzg2l_usb_vbus_regulator_probe(struct platform_device *pdev)
return 0;
}
+#define RZG3L_USB_VBUS_REG(rname, en_mask) \
+ { \
+ .name = #rname, \
+ .of_match = of_match_ptr(#rname), \
+ .regulators_node = of_match_ptr("regulators"), \
+ .type = REGULATOR_VOLTAGE, \
+ .owner = THIS_MODULE, \
+ .ops = &rzg2l_usb_vbus_reg_ops, \
+ .enable_reg = 0, \
+ .enable_mask = (en_mask), \
+ .enable_is_inverted = true, \
+ .fixed_uV = 5000000, \
+ .n_voltages = 1, \
+ }
+
+static const struct regulator_desc rzg3l_usb_vbus_regulators[] = {
+ RZG3L_USB_VBUS_REG(vbus0, BIT(0)),
+ RZG3L_USB_VBUS_REG(vbus1, BIT(1)),
+};
+
+static int rzg3l_usb_vbus_regulator_probe(struct platform_device *pdev)
+{
+ struct regulator_config config = { };
+ struct device *dev = &pdev->dev;
+ struct regulator_dev *rdev;
+
+ config.dev = pdev->dev.parent;
+ config.regmap = dev_get_regmap(dev->parent, NULL);
+ if (!config.regmap)
+ return dev_err_probe(dev, -ENOENT, "Failed to get regmap\n");
+
+ for (unsigned int i = 0; i < ARRAY_SIZE(rzg3l_usb_vbus_regulators); i++) {
+ rdev = devm_regulator_register(dev, &rzg3l_usb_vbus_regulators[i],
+ &config);
+ if (IS_ERR(rdev))
+ return dev_err_probe(dev, PTR_ERR(rdev),
+ "failed to register %s regulator\n",
+ rzg3l_usb_vbus_regulators[i].name);
+ }
+
+ return 0;
+}
+
+static int rzg2l_usb_vbus_regulator_common_probe(struct platform_device *pdev)
+{
+ int (*probe_func)(struct platform_device *pdev);
+ const struct platform_device_id *id;
+
+ id = platform_get_device_id(pdev);
+ if (!id)
+ return dev_err_probe(&pdev->dev, -ENODEV, "No ID match found\n");
+
+ probe_func = (int (*)(struct platform_device *))id->driver_data;
+
+ return probe_func(pdev);
+}
+
+static const struct platform_device_id rzg2l_usb_vbus_regulator_ids[] = {
+ {
+ .name = "rzg2l-vbus-regulator",
+ .driver_data = (kernel_ulong_t)rzg2l_usb_vbus_regulator_probe
+ },
+ {
+ .name = "rzg3l-vbus-regulator",
+ .driver_data = (kernel_ulong_t)rzg3l_usb_vbus_regulator_probe
+ },
+ { /* Sentinel */ }
+};
+MODULE_DEVICE_TABLE(platform, rzg2l_usb_vbus_regulator_ids);
+
static struct platform_driver rzg2l_usb_vbus_regulator_driver = {
- .probe = rzg2l_usb_vbus_regulator_probe,
+ .probe = rzg2l_usb_vbus_regulator_common_probe,
+ .id_table = rzg2l_usb_vbus_regulator_ids,
.driver = {
.name = "rzg2l-vbus-regulator",
.probe_type = PROBE_PREFER_ASYNCHRONOUS,
--
2.43.0
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v7 6/9] arm64: dts: renesas: r9a08g046: Add USB2.0 host/phy device nodes
2026-08-12 14:19 ` Biju
` (5 preceding siblings ...)
(?)
@ 2026-08-12 14:19 ` Biju
2026-08-12 15:44 ` sashiko-bot
-1 siblings, 1 reply; 14+ messages in thread
From: Biju @ 2026-08-12 14:19 UTC (permalink / raw)
To: Geert Uytterhoeven, Magnus Damm, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: Biju Das, linux-renesas-soc, devicetree, linux-kernel,
Prabhakar Mahadev Lad, Biju Das
From: Biju Das <biju.das.jz@bp.renesas.com>
Add USB2.0 device nodes to the RZ/G3L (r9a08g046) SoC DTSI, covering
the USB PHY controller, OHCI/EHCI host controllers, and USB2 PHYs for
both ports.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
v6->v7:
* Updated commit header
v5->v6:
* No change
v4->v5:
* Dropped renesas,sysc-pwrrdy property.
v3->v4:
* No change
v2->v3:
* No change
v1->v2:
* Updated commit description.
* Added regulators group node and its children.
---
arch/arm64/boot/dts/renesas/r9a08g046.dtsi | 104 +++++++++++++++++++++
1 file changed, 104 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r9a08g046.dtsi b/arch/arm64/boot/dts/renesas/r9a08g046.dtsi
index 85e409ac8d5c..bf0dbac66d14 100644
--- a/arch/arm64/boot/dts/renesas/r9a08g046.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a08g046.dtsi
@@ -1198,6 +1198,110 @@ queue3 {
};
};
+ phyrst: usbphy-ctrl@11e00000 {
+ compatible = "renesas,r9a08g046-usbphy-ctrl";
+ reg = <0 0x11e00000 0 0x10000>;
+ clocks = <&cpg CPG_MOD R9A08G046_USB_PCLK>;
+ resets = <&cpg R9A08G046_USB_PRESETN>;
+ power-domains = <&cpg>;
+ #reset-cells = <1>;
+ status = "disabled";
+
+ regulators {
+ usb0_vbus_otg: vbus0 {
+ regulator-name = "usb0_vbus";
+ };
+
+ usb1_vbus_otg: vbus1 {
+ regulator-name = "usb1_vbus";
+ };
+ };
+ };
+
+ ohci0: usb@11e10000 {
+ compatible = "generic-ohci";
+ reg = <0 0x11e10000 0 0x100>;
+ interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD R9A08G046_USB_PCLK>,
+ <&cpg CPG_MOD R9A08G046_USB_U2H0_HCLK>;
+ resets = <&phyrst 0>,
+ <&cpg R9A08G046_USB_U2H0_HRESETN>;
+ phys = <&usb2_phy0 1>;
+ phy-names = "usb";
+ power-domains = <&cpg>;
+ status = "disabled";
+ };
+
+ ohci1: usb@11e90000 {
+ compatible = "generic-ohci";
+ reg = <0 0x11e90000 0 0x100>;
+ interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD R9A08G046_USB_PCLK>,
+ <&cpg CPG_MOD R9A08G046_USB_U2H1_HCLK>;
+ resets = <&phyrst 1>,
+ <&cpg R9A08G046_USB_U2H1_HRESETN>;
+ phys = <&usb2_phy1 1>;
+ phy-names = "usb";
+ power-domains = <&cpg>;
+ status = "disabled";
+ };
+
+ ehci0: usb@11e10100 {
+ compatible = "generic-ehci";
+ reg = <0 0x11e10100 0 0x100>;
+ interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD R9A08G046_USB_PCLK>,
+ <&cpg CPG_MOD R9A08G046_USB_U2H0_HCLK>;
+ resets = <&phyrst 0>,
+ <&cpg R9A08G046_USB_U2H0_HRESETN>;
+ phys = <&usb2_phy0 2>;
+ phy-names = "usb";
+ companion = <&ohci0>;
+ power-domains = <&cpg>;
+ status = "disabled";
+ };
+
+ ehci1: usb@11e90100 {
+ compatible = "generic-ehci";
+ reg = <0 0x11e90100 0 0x100>;
+ interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD R9A08G046_USB_PCLK>,
+ <&cpg CPG_MOD R9A08G046_USB_U2H1_HCLK>;
+ resets = <&phyrst 1>,
+ <&cpg R9A08G046_USB_U2H1_HRESETN>;
+ phys = <&usb2_phy1 2>;
+ phy-names = "usb";
+ companion = <&ohci1>;
+ power-domains = <&cpg>;
+ status = "disabled";
+ };
+
+ usb2_phy0: usb-phy@11e10200 {
+ compatible = "renesas,usb2-phy-r9a08g046";
+ reg = <0 0x11e10200 0 0x700>;
+ interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD R9A08G046_USB_PCLK>,
+ <&cpg CPG_MOD R9A08G046_USB_U2H0_HCLK>;
+ resets = <&phyrst 0>,
+ <&cpg R9A08G046_USB_U2H0_HRESETN>;
+ #phy-cells = <1>;
+ power-domains = <&cpg>;
+ status = "disabled";
+ };
+
+ usb2_phy1: usb-phy@11e90200 {
+ compatible = "renesas,usb2-phy-r9a08g046";
+ reg = <0 0x11e90200 0 0x700>;
+ interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD R9A08G046_USB_PCLK>,
+ <&cpg CPG_MOD R9A08G046_USB_U2H1_HCLK>;
+ resets = <&phyrst 1>,
+ <&cpg R9A08G046_USB_U2H1_HRESETN>;
+ #phy-cells = <1>;
+ power-domains = <&cpg>;
+ status = "disabled";
+ };
+
pcie: pcie@11e40000 {
reg = <0 0x11e40000 0 0x10000>;
ranges = <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>;
--
2.43.0
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v7 7/9] arm64: dts: renesas: r9a08g046: Add USB2.0 function device nodes
2026-08-12 14:19 ` Biju
` (6 preceding siblings ...)
(?)
@ 2026-08-12 14:19 ` Biju
2026-08-12 15:56 ` sashiko-bot
-1 siblings, 1 reply; 14+ messages in thread
From: Biju @ 2026-08-12 14:19 UTC (permalink / raw)
To: Geert Uytterhoeven, Magnus Damm, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: Biju Das, linux-renesas-soc, devicetree, linux-kernel,
Prabhakar Mahadev Lad, Biju Das
From: Biju Das <biju.das.jz@bp.renesas.com>
Add USB2.0 function device nodes to the RZ/G3L (r9a08g046) SoC DTSI.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
v7:
* Moved the patch from [1]
* Collected the tag.
[1] https://lore.kernel.org/all/20260707145135.247565-3-biju.das.jz@bp.renesas.com/
---
arch/arm64/boot/dts/renesas/r9a08g046.dtsi | 38 ++++++++++++++++++++++
1 file changed, 38 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r9a08g046.dtsi b/arch/arm64/boot/dts/renesas/r9a08g046.dtsi
index bf0dbac66d14..08d919470830 100644
--- a/arch/arm64/boot/dts/renesas/r9a08g046.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a08g046.dtsi
@@ -1302,6 +1302,44 @@ usb2_phy1: usb-phy@11e90200 {
status = "disabled";
};
+ hsusb0: usb@11e30000 {
+ compatible = "renesas,usbhs-r9a08g046",
+ "renesas,rzg2l-usbhs";
+ reg = <0 0x11e30000 0 0x10000>;
+ interrupts = <GIC_SPI 123 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD R9A08G046_USB_PCLK>,
+ <&cpg CPG_MOD R9A08G046_USB_U2P0_EXR_CPUCLK>;
+ resets = <&phyrst 0>,
+ <&cpg R9A08G046_USB_U2P0_EXL_SYSRST>;
+ renesas,buswait = <7>;
+ phys = <&usb2_phy0 3>;
+ phy-names = "usb";
+ power-domains = <&cpg>;
+ status = "disabled";
+ };
+
+ hsusb1: usb@11eb0000 {
+ compatible = "renesas,usbhs-r9a08g046",
+ "renesas,rzg2l-usbhs";
+ reg = <0 0x11eb0000 0 0x10000>;
+ interrupts = <GIC_SPI 127 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD R9A08G046_USB_PCLK>,
+ <&cpg CPG_MOD R9A08G046_USB_U2P1_EXR_CPUCLK>;
+ resets = <&phyrst 1>,
+ <&cpg R9A08G046_USB_U2P1_EXL_SYSRST>;
+ renesas,buswait = <7>;
+ phys = <&usb2_phy1 3>;
+ phy-names = "usb";
+ power-domains = <&cpg>;
+ status = "disabled";
+ };
+
pcie: pcie@11e40000 {
reg = <0 0x11e40000 0 0x10000>;
ranges = <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>;
--
2.43.0
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v7 8/9] arm64: dts: renesas: r9a08g046l48-smarc: Add USB2.0 Host support
2026-08-12 14:19 ` Biju
` (7 preceding siblings ...)
(?)
@ 2026-08-12 14:19 ` Biju
2026-08-12 16:08 ` sashiko-bot
-1 siblings, 1 reply; 14+ messages in thread
From: Biju @ 2026-08-12 14:19 UTC (permalink / raw)
To: Geert Uytterhoeven, Magnus Damm, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: Biju Das, linux-renesas-soc, devicetree, linux-kernel,
Prabhakar Mahadev Lad, Biju Das
From: Biju Das <biju.das.jz@bp.renesas.com>
Enable USB2.0 Host on the RZ/G3L SMARC board (r9a08g046l48-smarc).
Port 0 (ehci0, ohci0, usb2_phy0) is configured as OTG with
usb0_pins pinmux (USB20_OVRCUR, USB20_VBUSEN) and usb0_vbus_otg
as the VBUS supply. Port 1 (ehci1, ohci1, usb2_phy1) is configured
as host-only with usb1_pins pinmux (USB21_OVRCUR, USB21_VBUSEN),
usb1_vbus_otg as the VBUS supply, and renesas,no-otg-pins set to
indicate no OTG pin routing. The phyrst USB PHY reset controller is
also enabled.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
v6->v7:
* Moved the patch.
* dr_mode changed to 'host' as function is not enabled yet.
v5->v6:
* No change.
v4->v5:
* No change.
v3->v4:
* No change.
v2->v3:
* No change.
v1->v2:
* Updated commit description.
---
.../boot/dts/renesas/r9a08g046l48-smarc.dts | 49 +++++++++++++++++++
1 file changed, 49 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r9a08g046l48-smarc.dts b/arch/arm64/boot/dts/renesas/r9a08g046l48-smarc.dts
index 96cc7ee46a6a..522cfde4b66a 100644
--- a/arch/arm64/boot/dts/renesas/r9a08g046l48-smarc.dts
+++ b/arch/arm64/boot/dts/renesas/r9a08g046l48-smarc.dts
@@ -87,6 +87,16 @@ vqmmc_sd1_pvdd: regulator-vqmmc-sd1-pvdd {
#endif
};
+&ehci0 {
+ dr_mode = "host";
+ status = "okay";
+};
+
+&ehci1 {
+ dr_mode = "host";
+ status = "okay";
+};
+
&i2c2 {
pinctrl-0 = <&i2c2_pins>;
pinctrl-names = "default";
@@ -138,6 +148,20 @@ &keys {
#endif
};
+&ohci0 {
+ dr_mode = "host";
+ status = "okay";
+};
+
+&ohci1 {
+ dr_mode = "host";
+ status = "okay";
+};
+
+&phyrst {
+ status = "okay";
+};
+
&pinctrl {
audio_clk_pins: audio-clock {
pinmux = <RZG3L_PORT_PINMUX(H, 4, 6)>, /* AUDIO_CLK_B */
@@ -259,6 +283,16 @@ ssi0_pins: ssi0 {
<RZG3L_PORT_PINMUX(H, 2, 9)>, /* SSIF0_RCK */
<RZG3L_PORT_PINMUX(H, 3, 9)>; /* SSIF0_TXD */
};
+
+ usb0_pins: usb0 {
+ pinmux = <RZG3L_PORT_PINMUX(3, 0, 12)>, /* USB20_OVRCUR */
+ <RZG3L_PORT_PINMUX(3, 1, 12)>; /* USB20_VBUSEN */
+ };
+
+ usb1_pins: usb1 {
+ pinmux = <RZG3L_PORT_PINMUX(3, 4, 12)>, /* USB21_OVRCUR */
+ <RZG3L_PORT_PINMUX(3, 5, 12)>; /* USB21_VBUSEN */
+ };
};
#if SW_SER0_PMOD
@@ -330,3 +364,18 @@ &ssi0 {
status = "okay";
};
#endif
+
+&usb2_phy0 {
+ pinctrl-0 = <&usb0_pins>;
+ pinctrl-names = "default";
+ vbus-supply = <&usb0_vbus_otg>;
+ status = "okay";
+};
+
+&usb2_phy1 {
+ pinctrl-0 = <&usb1_pins>;
+ pinctrl-names = "default";
+ vbus-supply = <&usb1_vbus_otg>;
+ renesas,no-otg-pins;
+ status = "okay";
+};
--
2.43.0
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v7 9/9] arm64: dts: renesas: r9a08g046l48-smarc: Enable USB2.0 function support
2026-08-12 14:19 ` Biju
` (8 preceding siblings ...)
(?)
@ 2026-08-12 14:19 ` Biju
-1 siblings, 0 replies; 14+ messages in thread
From: Biju @ 2026-08-12 14:19 UTC (permalink / raw)
To: Geert Uytterhoeven, Magnus Damm, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: Biju Das, linux-renesas-soc, devicetree, linux-kernel,
Prabhakar Mahadev Lad, Biju Das
From: Biju Das <biju.das.jz@bp.renesas.com>
Switch ehci0 and ohci0 from dr_mode = "host" to "otg", and enable
the hsusb0 USB2.0 function controller node with dr_mode = "otg" and
status = "okay", so USB2.0 device/OTG mode is supported on the
RZ/G3L SMARC (r9a08g046l48) board.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
v7:
* Moved the patch from [1]
* Updated commit description
* Updated dr_mode = "host" to "otg" in {e,o}hci0 device nodes.
* Retained the tag as change is trivial.
[1] https://lore.kernel.org/all/20260707145135.247565-4-biju.das.jz@bp.renesas.com/
---
arch/arm64/boot/dts/renesas/r9a08g046l48-smarc.dts | 9 +++++++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r9a08g046l48-smarc.dts b/arch/arm64/boot/dts/renesas/r9a08g046l48-smarc.dts
index 522cfde4b66a..a3c491778aba 100644
--- a/arch/arm64/boot/dts/renesas/r9a08g046l48-smarc.dts
+++ b/arch/arm64/boot/dts/renesas/r9a08g046l48-smarc.dts
@@ -88,7 +88,7 @@ vqmmc_sd1_pvdd: regulator-vqmmc-sd1-pvdd {
};
&ehci0 {
- dr_mode = "host";
+ dr_mode = "otg";
status = "okay";
};
@@ -97,6 +97,11 @@ &ehci1 {
status = "okay";
};
+&hsusb0 {
+ dr_mode = "otg";
+ status = "okay";
+};
+
&i2c2 {
pinctrl-0 = <&i2c2_pins>;
pinctrl-names = "default";
@@ -149,7 +154,7 @@ &keys {
};
&ohci0 {
- dr_mode = "host";
+ dr_mode = "otg";
status = "okay";
};
--
2.43.0
^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [PATCH v7 6/9] arm64: dts: renesas: r9a08g046: Add USB2.0 host/phy device nodes
2026-08-12 14:19 ` [PATCH v7 6/9] arm64: dts: renesas: r9a08g046: Add USB2.0 host/phy device nodes Biju
@ 2026-08-12 15:44 ` sashiko-bot
0 siblings, 0 replies; 14+ messages in thread
From: sashiko-bot @ 2026-08-12 15:44 UTC (permalink / raw)
To: Biju; +Cc: wsa+renesas, robh, conor+dt, devicetree
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [High] Missing Driver Support and DT Binding Documentation for 'renesas,usb2-phy-r9a08g046'
- [High] Unprobeable Device due to Missing Power Sequencer Provider
--
--- Patch [6]: [PATCH v7 6/9] arm64: dts: renesas: r9a08g046: Add USB2.0 host/phy device nodes ---
commit 0ab685ca95e56aea571685bc10fd9638d8846f8d
Author: Biju Das <biju.das.jz@bp.renesas.com>
arm64: dts: renesas: r9a08g046: Add USB2.0 host/phy device nodes
Add USB2.0 device nodes to the RZ/G3L (r9a08g046) SoC DTSI, covering
the USB PHY controller, OHCI/EHCI host controllers, and USB2 PHYs for
both ports.
> diff --git a/arch/arm64/boot/dts/renesas/r9a08g046.dtsi b/arch/arm64/boot/dts/renesas/r9a08g046.dtsi
> index c63a857f0e5b0..2d8c8fd8a01cd 100644
> --- a/arch/arm64/boot/dts/renesas/r9a08g046.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r9a08g046.dtsi
> @@ -1001,6 +1001,110 @@ queue3 {
> };
> };
>
> + phyrst: usbphy-ctrl@11e00000 {
> + compatible = "renesas,r9a08g046-usbphy-ctrl";
[Severity: High]
Does omitting the renesas,sysc-pwrrdy property here cause the driver to fail
to probe?
In drivers/reset/reset-rzg2l-usbphy-ctrl.c, when the driver sees that the
renesas,sysc-pwrrdy property is missing, it falls back to requesting a power
sequencer:
priv->pwrseq = devm_pwrseq_get(dev, "usb-pwrrdy");
if (IS_ERR(priv->pwrseq)) {
...
Since there is no power sequencer provider in the kernel exposing a "usb-pwrrdy"
target, devm_pwrseq_get() will return -EPROBE_DEFER. This would leave the USB
PHY and dependent host controllers permanently uninitialized.
> + reg = <0 0x11e00000 0 0x10000>;
> + clocks = <&cpg CPG_MOD R9A08G046_USB_PCLK>;
[ ... ]
> + ohci0: usb@11e10000 {
> + compatible = "generic-ohci";
[ ... ]
> + phys = <&usb2_phy0 1>;
> + phy-names = "usb";
> + power-domains = <&cpg>;
> + status = "disabled";
> + };
[ ... ]
> + usb2_phy0: usb-phy@11e10200 {
> + compatible = "renesas,usb2-phy-r9a08g046";
[Severity: High]
Will this node fail to bind to a driver?
The "renesas,usb2-phy-r9a08g046" compatible string doesn't appear to be
supported by the Renesas USB PHY driver (drivers/phy/renesas/phy-rcar-gen3-usb2.c),
and there is no fallback compatible string (such as "renesas,rzg2l-usb2-phy")
provided here.
Without a match in the driver's of_match_table, the PHY won't probe. Because
the OHCI and EHCI controllers depend on this PHY via their phys property, they
will also permanently fail to probe with -EPROBE_DEFER, rendering the USB ports
non-functional.
> + reg = <0 0x11e10200 0 0x700>;
> + interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
[ ... ]
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260812141940.246223-1-biju.das.jz@bp.renesas.com?part=6
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v7 7/9] arm64: dts: renesas: r9a08g046: Add USB2.0 function device nodes
2026-08-12 14:19 ` [PATCH v7 7/9] arm64: dts: renesas: r9a08g046: Add USB2.0 function " Biju
@ 2026-08-12 15:56 ` sashiko-bot
0 siblings, 0 replies; 14+ messages in thread
From: sashiko-bot @ 2026-08-12 15:56 UTC (permalink / raw)
To: Biju; +Cc: wsa+renesas, devicetree, robh, conor+dt
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [High] Unprobeable Hardware Dependency causing USB controllers to fail
- [Low] Missing Device Tree Binding Documentation for new compatible string
--
--- Patch [7]: [PATCH v7 7/9] arm64: dts: renesas: r9a08g046: Add USB2.0 function device nodes ---
commit 300a9b2b9e754dfa39a649f78e39731613f70c2b
Author: Biju Das <biju.das.jz@bp.renesas.com>
arm64: dts: renesas: r9a08g046: Add USB2.0 function device nodes
Add USB2.0 function device nodes to the RZ/G3L (r9a08g046) SoC DTSI.
Link: https://lore.kernel.org/all/20260707145135.247565-3-biju.das.jz@bp.renesas.com/
> diff --git a/arch/arm64/boot/dts/renesas/r9a08g046.dtsi b/arch/arm64/boot/dts/renesas/r9a08g046.dtsi
> index 2d8c8fd8a01cd..7cf29aed52110 100644
> --- a/arch/arm64/boot/dts/renesas/r9a08g046.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r9a08g046.dtsi
> @@ -1105,6 +1105,44 @@ usb2_phy1: usb-phy@11e90200 {
> status = "disabled";
> };
>
> + hsusb0: usb@11e30000 {
> + compatible = "renesas,usbhs-r9a08g046",
> + "renesas,rzg2l-usbhs";
[Severity: Low]
Is the renesas,usbhs-r9a08g046 compatible string documented in the device
tree bindings?
It appears this might cause dtbs_check to fail with a warning since it
is not defined in the valid enumerations within
Documentation/devicetree/bindings/usb/renesas,usbhs.yaml.
> + reg = <0 0x11e30000 0 0x10000>;
> + interrupts = <GIC_SPI 123 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD R9A08G046_USB_PCLK>,
> + <&cpg CPG_MOD R9A08G046_USB_U2P0_EXR_CPUCLK>;
> + resets = <&phyrst 0>,
> + <&cpg R9A08G046_USB_U2P0_EXL_SYSRST>;
> + renesas,buswait = <7>;
> + phys = <&usb2_phy0 3>;
[Severity: High]
Will this create an unresolvable probe deferral?
The renesas_usbhs driver calls phy_get() during probe, depending on
usb2_phy0 here. However, the usb2_phy0 node only specifies
compatible = "renesas,usb2-phy-r9a08g046" without a generic fallback like
"renesas,rzg2l-usb2-phy".
Since the phy-rcar-gen3-usb2.c PHY driver does not match
"renesas,usb2-phy-r9a08g046", the PHY device might not probe, causing
phy_get() to continually return -EPROBE_DEFER.
[ ... ]
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260812141940.246223-1-biju.das.jz@bp.renesas.com?part=7
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v7 8/9] arm64: dts: renesas: r9a08g046l48-smarc: Add USB2.0 Host support
2026-08-12 14:19 ` [PATCH v7 8/9] arm64: dts: renesas: r9a08g046l48-smarc: Add USB2.0 Host support Biju
@ 2026-08-12 16:08 ` sashiko-bot
0 siblings, 0 replies; 14+ messages in thread
From: sashiko-bot @ 2026-08-12 16:08 UTC (permalink / raw)
To: Biju; +Cc: robh, wsa+renesas, conor+dt, devicetree
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
New issues:
- [Medium] Commit message and code mismatch regarding Port 0 OTG configuration
Pre-existing issues:
- [High] Missing driver support and fallback compatible string for USB2 PHY nodes
--
--- Patch [8]: [PATCH v7 8/9] arm64: dts: renesas: r9a08g046l48-smarc: Add USB2.0 Host support ---
commit c3aecaee03c204651cbf54effdb9c6095c67ace8
Author: Biju Das <biju.das.jz@bp.renesas.com>
arm64: dts: renesas: r9a08g046l48-smarc: Add USB2.0 Host support
Enable USB2.0 Host on the RZ/G3L SMARC board (r9a08g046l48-smarc).
> Port 0 (ehci0, ohci0, usb2_phy0) is configured as OTG with
> usb0_pins pinmux (USB20_OVRCUR, USB20_VBUSEN) and usb0_vbus_otg
> as the VBUS supply. Port 1 (ehci1, ohci1, usb2_phy1) is configured
> as host-only with usb1_pins pinmux (USB21_OVRCUR, USB21_VBUSEN),
> usb1_vbus_otg as the VBUS supply, and renesas,no-otg-pins set to
> indicate no OTG pin routing. The phyrst USB PHY reset controller is
> also enabled.
[Severity: Medium]
The commit description states Port 0 is configured as OTG, but the patch
configures ehci0 and ohci0 with dr_mode = "host".
I noticed the patch changelog mentions dr_mode was changed to 'host' because
the function is not enabled yet. Could the main commit description be
updated to reflect the current code?
[ ... ]
> diff --git a/arch/arm64/boot/dts/renesas/r9a08g046l48-smarc.dts b/arch/arm64/boot/dts/renesas/r9a08g046l48-smarc.dts
> --- a/arch/arm64/boot/dts/renesas/r9a08g046l48-smarc.dts
> +++ b/arch/arm64/boot/dts/renesas/r9a08g046l48-smarc.dts
[ ... ]
> @@ -241,3 +275,18 @@ &ssi0 {
> status = "okay";
> };
> #endif
> +
> +&usb2_phy0 {
> + pinctrl-0 = <&usb0_pins>;
> + pinctrl-names = "default";
> + vbus-supply = <&usb0_vbus_otg>;
> + status = "okay";
> +};
[Severity: High]
This is a pre-existing issue, but will enabling this node result in a probe
failure that causes the EHCI and OHCI host controllers to defer indefinitely?
The usb2_phy0 node defined in arch/arm64/boot/dts/renesas/r9a08g046.dtsi
uses the single compatible string "renesas,usb2-phy-r9a08g046":
usb2_phy0: usb-phy@11e10200 {
compatible = "renesas,usb2-phy-r9a08g046";
This string is missing from the rcar_gen3_phy_usb2_match_table in
drivers/phy/renesas/phy-rcar-gen3-usb2.c, and the device tree lacks a
fallback string like "renesas,rzg2l-usb2-phy".
Does this node require a fallback compatible string or driver updates before
it can be successfully enabled?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260812141940.246223-1-biju.das.jz@bp.renesas.com?part=8
^ permalink raw reply [flat|nested] 14+ messages in thread
end of thread, other threads:[~2026-08-12 16:08 UTC | newest]
Thread overview: 14+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-08-12 14:19 [PATCH v7 0/9] Add RZ/G3L USB2.0 host support Biju
2026-08-12 14:19 ` Biju
2026-08-12 14:19 ` [PATCH v7 1/9] regulator: renesas-usb-vbus-regulator: Rename platform device to rzg2l-vbus-regulator Biju
2026-08-12 14:19 ` [PATCH v7 2/9] dt-bindings: reset: renesas,rzg2l-usbphy-ctrl: Document RZ/G3L support Biju
2026-08-12 14:19 ` [PATCH v7 3/9] reset: rzg2l-usbphy-ctrl: Introduce info struct for match data Biju
2026-08-12 14:19 ` [PATCH v7 4/9] reset: rzg2l-usbphy-ctrl: Add RZ/G3L support Biju
2026-08-12 14:19 ` [PATCH v7 5/9] regulator: renesas-usb-vbus-regulator: Add RZ/G3L VBUS regulator support Biju
2026-08-12 14:19 ` [PATCH v7 6/9] arm64: dts: renesas: r9a08g046: Add USB2.0 host/phy device nodes Biju
2026-08-12 15:44 ` sashiko-bot
2026-08-12 14:19 ` [PATCH v7 7/9] arm64: dts: renesas: r9a08g046: Add USB2.0 function " Biju
2026-08-12 15:56 ` sashiko-bot
2026-08-12 14:19 ` [PATCH v7 8/9] arm64: dts: renesas: r9a08g046l48-smarc: Add USB2.0 Host support Biju
2026-08-12 16:08 ` sashiko-bot
2026-08-12 14:19 ` [PATCH v7 9/9] arm64: dts: renesas: r9a08g046l48-smarc: Enable USB2.0 function support Biju
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