[PATCH v3 0/4] ARM: dts: vf: Iris carrier board for the Colibri VF50 and VF61

[PATCH v3 0/4] ARM: dts: vf: Iris carrier board for the Colibri VF50 and VF61

[Mehmet Fide]

From: Mehmet Fide <mehmet.fide@screeningeagle.com>

This adds a device tree for the Toradex Iris carrier board carrying the
Vybrid Colibri modules, plus two small preparatory patches for the
module-level dtsi that the i.MX Colibri variants already had.

Everything was tested on a Colibri VF50 on an Iris V1.1 running 6.18:
Ethernet, USB host and OTG, all three UARTs, i2c with the carrier RTC,
SPI, the microSD slot and the RS232 transceiver hogs.

Changes in v3, following Krzysztof's review:
- fold the Iris compatibles into the existing -on-eval enum entries
  instead of adding standalone entries
- use hyphens in the newly introduced compatibles
  (toradex,vf500-colibri-vf50-on-iris, toradex,vf610-colibri-vf61-on-iris)
- drop the fixed 5V regulator that only fed the VBUS regulator
- sent as a fresh thread instead of in reply to v2

Changes in v2:
- add the dt-bindings patch for the new compatibles
- describe the USB host VBUS regulator instead of hogging USBH_PEN

Mehmet Fide (4):
  ARM: dts: vf-colibri: apply the EXT_IO pin group
  ARM: dts: vf-colibri: name the SODIMM gpio lines
  dt-bindings: arm: fsl: add the Colibri VF50 and VF61 on Iris
  ARM: dts: vf: add Iris carrier board support for Colibri VF50 and VF61

 .../devicetree/bindings/arm/fsl.yaml          |  12 +-
 arch/arm/boot/dts/nxp/vf/Makefile             |   2 +
 arch/arm/boot/dts/nxp/vf/vf-colibri-iris.dtsi | 117 ++++++++++++++
 arch/arm/boot/dts/nxp/vf/vf-colibri.dtsi      | 153 ++++++++++++++++++
 .../boot/dts/nxp/vf/vf500-colibri-iris.dts    |  14 ++
 .../boot/dts/nxp/vf/vf610-colibri-iris.dts    |  14 ++
 6 files changed, 308 insertions(+), 4 deletions(-)
 create mode 100644 arch/arm/boot/dts/nxp/vf/vf-colibri-iris.dtsi
 create mode 100644 arch/arm/boot/dts/nxp/vf/vf500-colibri-iris.dts
 create mode 100644 arch/arm/boot/dts/nxp/vf/vf610-colibri-iris.dts


base-commit: 3d6d817622b0a9721e3cc404df3469171582be13
-- 
2.54.0

[PATCH v3 1/4] ARM: dts: vf-colibri: apply the EXT_IO pin group

[Mehmet Fide]

From: Mehmet Fide <mehmet.fide@screeningeagle.com>

pinctrl_gpio_ext describes the three Colibri EXT_IO pins, but no node
references it, so the pin controller never applies it and the pads keep
whatever mux and bias they came up with. It is the only pin group in the
Vybrid Colibri device trees that is defined and never used.

The three pins are GPIOs on gpio2 and belong to no device, so hog the
group on that controller. Referencing it from &iomuxc would work too, but
the pin controller would then depend on one of its own children, which
fw_devlink reports as a dependency cycle.

Signed-off-by: Mehmet Fide <mehmet.fide@screeningeagle.com>
---
 arch/arm/boot/dts/nxp/vf/vf-colibri.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm/boot/dts/nxp/vf/vf-colibri.dtsi b/arch/arm/boot/dts/nxp/vf/vf-colibri.dtsi
index 98f9ee1b0030..74afc7b0d74b 100644
--- a/arch/arm/boot/dts/nxp/vf/vf-colibri.dtsi
+++ b/arch/arm/boot/dts/nxp/vf/vf-colibri.dtsi
@@ -170,6 +170,15 @@ &usbphy1 {
 	status = "okay";
 };
 
+&gpio2 {
+	/*
+	 * EXT_IO_0..2 belong to no device, so hog the pin group here rather
+	 * than on the pin controller, which would depend on its own child.
+	 */
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_gpio_ext>;
+};
+
 &iomuxc {
 	pinctrl_flexcan0: can0grp {
 		fsl,pins = <
-- 
2.54.0

[PATCH v3 2/4] ARM: dts: vf-colibri: name the SODIMM gpio lines

[Mehmet Fide]

From: Mehmet Fide <mehmet.fide@screeningeagle.com>

The Colibri modules expose most of their GPIOs on numbered SODIMM pins,
and the i.MX ones already carry those numbers as gpio-line-names, so the
gpiod tools print SODIMM_43 rather than a bank and an offset. Do the same
for the Vybrid modules.

The 99 names come from the pinout table of the Colibri VFxx datasheet
(Toradex 101355). Verified on a Colibri VF50, where gpioinfo now names
every pin the datasheet lists.

Signed-off-by: Mehmet Fide <mehmet.fide@screeningeagle.com>
---
 arch/arm/boot/dts/nxp/vf/vf-colibri.dtsi | 144 +++++++++++++++++++++++
 1 file changed, 144 insertions(+)

diff --git a/arch/arm/boot/dts/nxp/vf/vf-colibri.dtsi b/arch/arm/boot/dts/nxp/vf/vf-colibri.dtsi
index 74afc7b0d74b..04b5d532b2c5 100644
--- a/arch/arm/boot/dts/nxp/vf/vf-colibri.dtsi
+++ b/arch/arm/boot/dts/nxp/vf/vf-colibri.dtsi
@@ -170,6 +170,120 @@ &usbphy1 {
 	status = "okay";
 };
 
+&gpio0 {
+	gpio-line-names = "",
+			  "",
+			  "SODIMM_89",
+			  "",
+			  "",
+			  "SODIMM_102",
+			  "SODIMM_18",
+			  "SODIMM_134",
+			  "SODIMM_16",
+			  "SODIMM_14",
+			  "SODIMM_23",
+			  "",
+			  "",
+			  "",
+			  "SODIMM_47",
+			  "SODIMM_190",
+			  "SODIMM_192",
+			  "SODIMM_49",
+			  "SODIMM_51",
+			  "SODIMM_53",
+			  "SODIMM_37",
+			  "SODIMM_29",
+			  "",
+			  "SODIMM_30",
+			  "SODIMM_20",
+			  "SODIMM_24",
+			  "SODIMM_21",
+			  "SODIMM_19",
+			  "SODIMM_94",
+			  "SODIMM_81",
+			  "SODIMM_28";
+};
+
+&gpio1 {
+	gpio-line-names = "SODIMM_35",
+			  "SODIMM_33",
+			  "SODIMM_27",
+			  "SODIMM_25",
+			  "SODIMM_196",
+			  "SODIMM_194",
+			  "SODIMM_63",
+			  "SODIMM_55",
+			  "SODIMM_65",
+			  "SODIMM_45",
+			  "SODIMM_43",
+			  "SODIMM_73",
+			  "SODIMM_77",
+			  "SODIMM_71",
+			  "SODIMM_98",
+			  "SODIMM_101",
+			  "SODIMM_103",
+			  "SODIMM_79",
+			  "SODIMM_97",
+			  "",
+			  "",
+			  "SODIMM_85",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "SODIMM_106";
+};
+
+&gpio3 {
+	gpio-line-names = "SODIMM_105",
+			  "",
+			  "SODIMM_93",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "SODIMM_95",
+			  "SODIMM_22",
+			  "SODIMM_68",
+			  "SODIMM_82",
+			  "SODIMM_56",
+			  "SODIMM_131",
+			  "SODIMM_44",
+			  "SODIMM_144",
+			  "SODIMM_146",
+			  "SODIMM_52",
+			  "SODIMM_54",
+			  "SODIMM_66",
+			  "SODIMM_64",
+			  "SODIMM_57",
+			  "SODIMM_61",
+			  "SODIMM_140",
+			  "SODIMM_142",
+			  "SODIMM_80",
+			  "SODIMM_46",
+			  "SODIMM_62",
+			  "SODIMM_48",
+			  "SODIMM_74",
+			  "SODIMM_50",
+			  "SODIMM_136",
+			  "SODIMM_138";
+};
+
+&gpio4 {
+	gpio-line-names = "SODIMM_76",
+			  "SODIMM_70",
+			  "SODIMM_60",
+			  "SODIMM_58",
+			  "SODIMM_78",
+			  "SODIMM_72",
+			  "SODIMM_96";
+};
+
 &gpio2 {
 	/*
 	 * EXT_IO_0..2 belong to no device, so hog the pin group here rather
@@ -177,6 +291,36 @@ &gpio2 {
 	 */
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_gpio_ext>;
+
+	gpio-line-names = "SODIMM_69",
+			  "SODIMM_99",
+			  "SODIMM_104",
+			  "SODIMM_107",
+			  "SODIMM_127",
+			  "SODIMM_184",
+			  "SODIMM_186",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "SODIMM_38",
+			  "SODIMM_36",
+			  "SODIMM_34",
+			  "SODIMM_32",
+			  "SODIMM_129",
+			  "SODIMM_86",
+			  "SODIMM_90",
+			  "SODIMM_92",
+			  "SODIMM_88",
+			  "SODIMM_133",
+			  "SODIMM_135",
+			  "SODIMM_188",
+			  "SODIMM_75",
+			  "SODIMM_100";
 };
 
 &iomuxc {
-- 
2.54.0

Re: [PATCH v3 2/4] ARM: dts: vf-colibri: name the SODIMM gpio lines

[Frank Li]

On Thu, Aug 13, 2026 at 04:05:58PM +0200, Mehmet Fide wrote:
> From: Mehmet Fide <mehmet.fide@screeningeagle.com>
>
> The Colibri modules expose most of their GPIOs on numbered SODIMM pins,
> and the i.MX ones already carry those numbers as gpio-line-names, so the
> gpiod tools print SODIMM_43 rather than a bank and an offset. Do the same
> for the Vybrid modules.
>
> The 99 names come from the pinout table of the Colibri VFxx datasheet
> (Toradex 101355). Verified on a Colibri VF50, where gpioinfo now names
> every pin the datasheet lists.
>
> Signed-off-by: Mehmet Fide <mehmet.fide@screeningeagle.com>
> ---
>  arch/arm/boot/dts/nxp/vf/vf-colibri.dtsi | 144 +++++++++++++++++++++++
>  1 file changed, 144 insertions(+)
>
> diff --git a/arch/arm/boot/dts/nxp/vf/vf-colibri.dtsi b/arch/arm/boot/dts/nxp/vf/vf-colibri.dtsi
> index 74afc7b0d74b..04b5d532b2c5 100644
> --- a/arch/arm/boot/dts/nxp/vf/vf-colibri.dtsi
> +++ b/arch/arm/boot/dts/nxp/vf/vf-colibri.dtsi
> @@ -170,6 +170,120 @@ &usbphy1 {
>  	status = "okay";
>  };
>
> +&gpio0 {
> +	gpio-line-names = "",
> +			  "",
> +			  "SODIMM_89",
> +			  "",
> +			  "",

Can you move 4 pins to one line to file compact?

Frank

> +			  "SODIMM_102",
> +			  "SODIMM_18",
> +			  "SODIMM_134",
> +			  "SODIMM_16",
> +			  "SODIMM_14",
> +			  "SODIMM_23",
> +			  "",
> +			  "",
> +			  "",
> +			  "SODIMM_47",
> +			  "SODIMM_190",
> +			  "SODIMM_192",
> +			  "SODIMM_49",
> +			  "SODIMM_51",
> +			  "SODIMM_53",
> +			  "SODIMM_37",
> +			  "SODIMM_29",
> +			  "",
> +			  "SODIMM_30",
> +			  "SODIMM_20",
> +			  "SODIMM_24",
> +			  "SODIMM_21",
> +			  "SODIMM_19",
> +			  "SODIMM_94",
> +			  "SODIMM_81",
> +			  "SODIMM_28";
> +};
> +
> +&gpio1 {
> +	gpio-line-names = "SODIMM_35",
> +			  "SODIMM_33",
> +			  "SODIMM_27",
> +			  "SODIMM_25",
> +			  "SODIMM_196",
> +			  "SODIMM_194",
> +			  "SODIMM_63",
> +			  "SODIMM_55",
> +			  "SODIMM_65",
> +			  "SODIMM_45",
> +			  "SODIMM_43",
> +			  "SODIMM_73",
> +			  "SODIMM_77",
> +			  "SODIMM_71",
> +			  "SODIMM_98",
> +			  "SODIMM_101",
> +			  "SODIMM_103",
> +			  "SODIMM_79",
> +			  "SODIMM_97",
> +			  "",
> +			  "",
> +			  "SODIMM_85",
> +			  "",
> +			  "",
> +			  "",
> +			  "",
> +			  "",
> +			  "",
> +			  "",
> +			  "",
> +			  "",
> +			  "SODIMM_106";
> +};
> +
> +&gpio3 {
> +	gpio-line-names = "SODIMM_105",
> +			  "",
> +			  "SODIMM_93",
> +			  "",
> +			  "",
> +			  "",
> +			  "",
> +			  "SODIMM_95",
> +			  "SODIMM_22",
> +			  "SODIMM_68",
> +			  "SODIMM_82",
> +			  "SODIMM_56",
> +			  "SODIMM_131",
> +			  "SODIMM_44",
> +			  "SODIMM_144",
> +			  "SODIMM_146",
> +			  "SODIMM_52",
> +			  "SODIMM_54",
> +			  "SODIMM_66",
> +			  "SODIMM_64",
> +			  "SODIMM_57",
> +			  "SODIMM_61",
> +			  "SODIMM_140",
> +			  "SODIMM_142",
> +			  "SODIMM_80",
> +			  "SODIMM_46",
> +			  "SODIMM_62",
> +			  "SODIMM_48",
> +			  "SODIMM_74",
> +			  "SODIMM_50",
> +			  "SODIMM_136",
> +			  "SODIMM_138";
> +};
> +
> +&gpio4 {
> +	gpio-line-names = "SODIMM_76",
> +			  "SODIMM_70",
> +			  "SODIMM_60",
> +			  "SODIMM_58",
> +			  "SODIMM_78",
> +			  "SODIMM_72",
> +			  "SODIMM_96";
> +};
> +
>  &gpio2 {
>  	/*
>  	 * EXT_IO_0..2 belong to no device, so hog the pin group here rather
> @@ -177,6 +291,36 @@ &gpio2 {
>  	 */
>  	pinctrl-names = "default";
>  	pinctrl-0 = <&pinctrl_gpio_ext>;
> +
> +	gpio-line-names = "SODIMM_69",
> +			  "SODIMM_99",
> +			  "SODIMM_104",
> +			  "SODIMM_107",
> +			  "SODIMM_127",
> +			  "SODIMM_184",
> +			  "SODIMM_186",
> +			  "",
> +			  "",
> +			  "",
> +			  "",
> +			  "",
> +			  "",
> +			  "",
> +			  "",
> +			  "SODIMM_38",
> +			  "SODIMM_36",
> +			  "SODIMM_34",
> +			  "SODIMM_32",
> +			  "SODIMM_129",
> +			  "SODIMM_86",
> +			  "SODIMM_90",
> +			  "SODIMM_92",
> +			  "SODIMM_88",
> +			  "SODIMM_133",
> +			  "SODIMM_135",
> +			  "SODIMM_188",
> +			  "SODIMM_75",
> +			  "SODIMM_100";
>  };
>
>  &iomuxc {
> --
> 2.54.0
>
>

[PATCH v3 3/4] dt-bindings: arm: fsl: add the Colibri VF50 and VF61 on Iris

[Mehmet Fide]

From: Mehmet Fide <mehmet.fide@screeningeagle.com>

The Iris is a small off-the-shelf carrier board for the Colibri
family. Extend the evaluation board entries with the compatibles for
a Colibri VF50 or VF61 sitting on it.

Signed-off-by: Mehmet Fide <mehmet.fide@screeningeagle.com>
---
 Documentation/devicetree/bindings/arm/fsl.yaml | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml
index 86876311ec59..6f95c17b363c 100644
--- a/Documentation/devicetree/bindings/arm/fsl.yaml
+++ b/Documentation/devicetree/bindings/arm/fsl.yaml
@@ -1705,9 +1705,11 @@ properties:
               - fsl,vf610
               - fsl,vf610m4
 
-      - description: Toradex Colibri VF50 Module on Colibri Evaluation Board
+      - description: Toradex Colibri VF50 Module on a carrier board
         items:
-          - const: toradex,vf500-colibri_vf50-on-eval
+          - enum:
+              - toradex,vf500-colibri_vf50-on-eval
+              - toradex,vf500-colibri-vf50-on-iris
           - const: toradex,vf500-colibri_vf50
           - const: fsl,vf500
 
@@ -1719,9 +1721,11 @@ properties:
               - phytec,vf610-cosmic       # PHYTEC Cosmic/Cosmic+ Board
           - const: fsl,vf610
 
-      - description: Toradex Colibri VF61 Module on Colibri Evaluation Board
+      - description: Toradex Colibri VF61 Module on a carrier board
         items:
-          - const: toradex,vf610-colibri_vf61-on-eval
+          - enum:
+              - toradex,vf610-colibri_vf61-on-eval
+              - toradex,vf610-colibri-vf61-on-iris
           - const: toradex,vf610-colibri_vf61
           - const: fsl,vf610
 
-- 
2.54.0

Re: [PATCH v3 3/4] dt-bindings: arm: fsl: add the Colibri VF50 and VF61 on Iris

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] Inconsistent compatible string naming due to mismatched hyphen.
--

--- Patch [3]: [PATCH v3 3/4] dt-bindings: arm: fsl: add the Colibri VF50 and VF61 on Iris ---
commit 04c8812c4587059c616ac3a5abaa28f6f14d974a
Author: Mehmet Fide <mehmet.fide@screeningeagle.com>

dt-bindings: arm: fsl: add the Colibri VF50 and VF61 on Iris

This commit extends the evaluation board entries to include compatible
strings for the Toradex Colibri VF50 and VF61 modules on the Iris carrier
board.

> diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml
> index 86876311ec59a..6f95c17b363c0 100644
> --- a/Documentation/devicetree/bindings/arm/fsl.yaml
> +++ b/Documentation/devicetree/bindings/arm/fsl.yaml
> @@ -1705,9 +1705,11 @@ properties:
>                - fsl,vf610
>                - fsl,vf610m4
>  
> -      - description: Toradex Colibri VF50 Module on Colibri Evaluation Board
> +      - description: Toradex Colibri VF50 Module on a carrier board
>          items:
> -          - const: toradex,vf500-colibri_vf50-on-eval
> +          - enum:
> +              - toradex,vf500-colibri_vf50-on-eval
> +              - toradex,vf500-colibri-vf50-on-iris

[Severity: Low]
This isn't a bug, but should this compatible string use an underscore for
colibri_vf50 to match the base module name?

The new string uses a hyphen, whereas the existing eval board compatible
uses toradex,vf500-colibri_vf50-on-eval. Could this inconsistency cause
confusion when parsing or authoring device trees?

>            - const: toradex,vf500-colibri_vf50
>            - const: fsl,vf500

[ ... ]

> -      - description: Toradex Colibri VF61 Module on Colibri Evaluation Board
> +      - description: Toradex Colibri VF61 Module on a carrier board
>          items:
> -          - const: toradex,vf610-colibri_vf61-on-eval
> +          - enum:
> +              - toradex,vf610-colibri_vf61-on-eval
> +              - toradex,vf610-colibri-vf61-on-iris

[Severity: Low]
Does this compatible string also have a mismatched hyphen instead of an
underscore for the colibri_vf61 base module?

Like the VF50 entry above, maintaining the exact base module string as a
prefix would stay consistent with toradex,vf610-colibri_vf61-on-eval.

>            - const: toradex,vf610-colibri_vf61
>            - const: fsl,vf610

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260813140600.1824949-1-mehmet.fide@gmail.com?part=3

[PATCH v3 4/4] ARM: dts: vf: add Iris carrier board support for Colibri VF50 and VF61

[Mehmet Fide]

From: Mehmet Fide <mehmet.fide@screeningeagle.com>

The Iris is a small off-the-shelf carrier board for the Colibri
family. Describe what the board itself provides: Ethernet, one USB
host and one OTG port, the pin header UARTs, i2c with the carrier
RTC on it, PWM, SPI and the microSD slot. The host port gets its
VBUS through a regulator on SODIMM 129, and the two GPIOs that turn
the RS232 transceivers on, SODIMM 102 and 104, are hogged. The
touchscreen is an add-on rather than part of the board, so it is
left out.

This describes an Iris V1.1. A V2.0 carries the same signals on the
same pins; what it adds, and what this does not describe, is the
regulator on SODIMM 100 that can cut power to the uSD slot.

Tested on a Colibri VF50 on an Iris V1.1 running 6.18: Ethernet at
100Mbps/Full, a USB dongle enumerating once the VBUS regulator is in
place, the RTC read back over i2c0, all three UARTs, the SPI
controller registering, the microSD slot, and both hogs holding
their pins.

Signed-off-by: Mehmet Fide <mehmet.fide@screeningeagle.com>
---
 arch/arm/boot/dts/nxp/vf/Makefile             |   2 +
 arch/arm/boot/dts/nxp/vf/vf-colibri-iris.dtsi | 117 ++++++++++++++++++
 .../boot/dts/nxp/vf/vf500-colibri-iris.dts    |  14 +++
 .../boot/dts/nxp/vf/vf610-colibri-iris.dts    |  14 +++
 4 files changed, 147 insertions(+)
 create mode 100644 arch/arm/boot/dts/nxp/vf/vf-colibri-iris.dtsi
 create mode 100644 arch/arm/boot/dts/nxp/vf/vf500-colibri-iris.dts
 create mode 100644 arch/arm/boot/dts/nxp/vf/vf610-colibri-iris.dts

diff --git a/arch/arm/boot/dts/nxp/vf/Makefile b/arch/arm/boot/dts/nxp/vf/Makefile
index 0a4a7f9dd43e..47be8bc318e2 100644
--- a/arch/arm/boot/dts/nxp/vf/Makefile
+++ b/arch/arm/boot/dts/nxp/vf/Makefile
@@ -1,8 +1,10 @@
 # SPDX-License-Identifier: GPL-2.0
 dtb-$(CONFIG_SOC_VF610) += \
 	vf500-colibri-eval-v3.dtb \
+	vf500-colibri-iris.dtb \
 	vf610-bk4.dtb \
 	vf610-colibri-eval-v3.dtb \
+	vf610-colibri-iris.dtb \
 	vf610m4-colibri.dtb \
 	vf610-cosmic.dtb \
 	vf610m4-cosmic.dtb \
diff --git a/arch/arm/boot/dts/nxp/vf/vf-colibri-iris.dtsi b/arch/arm/boot/dts/nxp/vf/vf-colibri-iris.dtsi
new file mode 100644
index 000000000000..bbd0dd76c33c
--- /dev/null
+++ b/arch/arm/boot/dts/nxp/vf/vf-colibri-iris.dtsi
@@ -0,0 +1,117 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Copyright 2026 Mehmet Fide
+ *
+ * Toradex Iris carrier board V1.1, common part for Colibri VF50 and VF61.
+ *
+ * The Colibri modules are pin compatible, so the carrier signals sit on the
+ * same SODIMM pins as they do for the i.MX modules, whose Iris device trees
+ * are already upstream. The two SODIMM pins below are taken from the Colibri
+ * VFxx datasheet (102 -> PTA12 -> PORT0[5], 104 -> PTD28 -> PORT2[2]).
+ *
+ * An Iris V2.0 carries the same signals on the same pins, so everything here
+ * works on it as well. What it adds is a regulator on SODIMM 100 that can cut
+ * power to the uSD slot, which this file does not describe.
+ */
+
+/ {
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	reg_usbh_vbus: regulator-usbh-vbus {
+		compatible = "regulator-fixed";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_usbh1_reg>;
+		regulator-name = "VCC_USB[1-4]";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		gpio = <&gpio2 19 GPIO_ACTIVE_LOW>;	/* SODIMM 129, USBH_PEN */
+	};
+};
+
+&gpio0 {
+	/*
+	 * The RS232 transceivers on the carrier are switched on by these two
+	 * lines. Delete the hog to turn a transceiver off from userspace.
+	 * The pin group belongs to the gpio controller rather than to iomuxc,
+	 * which would depend on its own child and log a dependency cycle.
+	 */
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_iris_uart1_tx_on>;
+
+	uart1-tx-on-hog {
+		gpio-hog;
+		gpios = <5 GPIO_ACTIVE_HIGH>;	/* SODIMM 102 */
+		output-high;
+	};
+};
+
+&gpio2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_iris_uart25_tx_on>;
+
+	uart25-tx-on-hog {
+		gpio-hog;
+		gpios = <2 GPIO_ACTIVE_HIGH>;	/* SODIMM 104 */
+		output-high;
+	};
+};
+
+&iomuxc {
+	pinctrl_iris_uart1_tx_on: irisuart1txongrp {
+		fsl,pins = <
+			VF610_PAD_PTA12__GPIO_5		0x22ef
+		>;
+	};
+
+	pinctrl_iris_uart25_tx_on: irisuart25txongrp {
+		fsl,pins = <
+			VF610_PAD_PTD28__GPIO_66	0x22ef
+		>;
+	};
+};
+
+/* Colibri SSP, on the extension connector */
+&dspi1 {
+	status = "okay";
+};
+
+&esdhc1 {
+	status = "okay";
+};
+
+&fec1 {
+	status = "okay";
+};
+
+&i2c0 {
+	status = "okay";
+
+	/* M41T0M6 real time clock on the carrier */
+	rtc@68 {
+		compatible = "st,m41t0";
+		reg = <0x68>;
+	};
+};
+
+&uart0 {
+	status = "okay";
+};
+
+&uart1 {
+	status = "okay";
+};
+
+&uart2 {
+	status = "okay";
+};
+
+&usbdev0 {
+	status = "okay";
+};
+
+&usbh1 {
+	vbus-supply = <&reg_usbh_vbus>;
+	status = "okay";
+};
diff --git a/arch/arm/boot/dts/nxp/vf/vf500-colibri-iris.dts b/arch/arm/boot/dts/nxp/vf/vf500-colibri-iris.dts
new file mode 100644
index 000000000000..aa91537cab37
--- /dev/null
+++ b/arch/arm/boot/dts/nxp/vf/vf500-colibri-iris.dts
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Copyright 2026 Mehmet Fide
+ */
+
+/dts-v1/;
+#include "vf500-colibri.dtsi"
+#include "vf-colibri-iris.dtsi"
+
+/ {
+	model = "Toradex Colibri VF50 on Iris Carrier Board";
+	compatible = "toradex,vf500-colibri-vf50-on-iris", "toradex,vf500-colibri_vf50",
+		     "fsl,vf500";
+};
diff --git a/arch/arm/boot/dts/nxp/vf/vf610-colibri-iris.dts b/arch/arm/boot/dts/nxp/vf/vf610-colibri-iris.dts
new file mode 100644
index 000000000000..7db5aa490966
--- /dev/null
+++ b/arch/arm/boot/dts/nxp/vf/vf610-colibri-iris.dts
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Copyright 2026 Mehmet Fide
+ */
+
+/dts-v1/;
+#include "vf610-colibri.dtsi"
+#include "vf-colibri-iris.dtsi"
+
+/ {
+	model = "Toradex Colibri VF61 on Iris Carrier Board";
+	compatible = "toradex,vf610-colibri-vf61-on-iris", "toradex,vf610-colibri_vf61",
+		     "fsl,vf610";
+};
-- 
2.54.0

Re: [PATCH v3 4/4] ARM: dts: vf: add Iris carrier board support for Colibri VF50 and VF61

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [Medium] The `&gpio2` node unconditionally overwrites `pinctrl-0`, destroying the base GPIO configuration inherited from `vf-colibri.dtsi`.
- [Medium] The commit message claims to describe PWM support for the carrier board, but the PWM nodes are completely missing from the device tree additions.
--

--- Patch [4]: [PATCH v3 4/4] ARM: dts: vf: add Iris carrier board support for Colibri VF50 and VF61 ---
commit 30782cd9b9ebbf78c0851af32f14e744e591610e
Author: Mehmet Fide <mehmet.fide@screeningeagle.com>

ARM: dts: vf: add Iris carrier board support for Colibri VF50 and VF61

The Iris is a small off-the-shelf carrier board for the Colibri family. This 
adds the device tree descriptions for the board's peripherals.

> The Iris is a small off-the-shelf carrier board for the Colibri
> family. Describe what the board itself provides: Ethernet, one USB
> host and one OTG port, the pin header UARTs, i2c with the carrier
> RTC on it, PWM, SPI and the microSD slot. The host port gets its

[Severity: Medium]
The commit message mentions adding support for PWM, but it appears the &pwm0
and &pwm1 nodes were not enabled in the device tree additions. Are the PWM
controller nodes missing from this patch?

> diff --git a/arch/arm/boot/dts/nxp/vf/vf-colibri-iris.dtsi b/arch/arm/boot/dts/nxp/vf/vf-colibri-iris.dtsi
> new file mode 100644
> index 0000000000000..bbd0dd76c33c0
> --- /dev/null
> +++ b/arch/arm/boot/dts/nxp/vf/vf-colibri-iris.dtsi

[ ... ]

> +&gpio2 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_iris_uart25_tx_on>;

[Severity: Medium]
Does this unconditionally overwrite the pinctrl-0 configuration inherited from
vf-colibri.dtsi?

It seems this would drop the base configuration (like pinctrl_gpio_ext) instead
of appending to it, which might leave the EXT_IO_0..2 pins in an indeterminate 
mux and bias state. Could this be changed to append to the existing pinctrl-0 
list?

> +
> +	uart25-tx-on-hog {
> +		gpio-hog;
> +		gpios = <2 GPIO_ACTIVE_HIGH>;	/* SODIMM 104 */
> +		output-high;
> +	};
> +};

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260813140600.1824949-1-mehmet.fide@gmail.com?part=4