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* [PATCH] iommu/generic_pt: Fix the RISC-V supported feature mask
@ 2026-08-18  9:24 ` Andrew Jones
  0 siblings, 0 replies; 8+ messages in thread
From: Andrew Jones @ 2026-08-18  9:24 UTC (permalink / raw)
  To: iommu, linux-riscv, linux-kernel
  Cc: fangyu.yu, tomasz.jeznach, jgg, oro, will, robin.murphy, pjw,
	palmer

The RISC-V format advertises Svpbmt to its users, but omits the feature
from PT_SUPPORTED_FEATURES. Add it there so configurations which enable
Svpbmt pass generic page-table feature validation.

Fixes: f196a8668797 ("iommu/riscv: Advertise Svpbmt support to generic page table")
Signed-off-by: Andrew Jones <andrew.jones@oss.qualcomm.com>
---
 drivers/iommu/generic_pt/fmt/iommu_riscv64.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/iommu/generic_pt/fmt/iommu_riscv64.c b/drivers/iommu/generic_pt/fmt/iommu_riscv64.c
index b18fc4d109f5..1bb74114fb02 100644
--- a/drivers/iommu/generic_pt/fmt/iommu_riscv64.c
+++ b/drivers/iommu/generic_pt/fmt/iommu_riscv64.c
@@ -7,7 +7,8 @@
 #define PT_SUPPORTED_FEATURES                                  \
 	(BIT(PT_FEAT_SIGN_EXTEND) | BIT(PT_FEAT_FLUSH_RANGE) | \
 	 BIT(PT_FEAT_RISCV_SVNAPOT_64K) |                      \
-	 BIT(PT_FEAT_DETAILED_GATHER))
+	 BIT(PT_FEAT_DETAILED_GATHER) |                        \
+	 BIT(PT_FEAT_RISCV_SVPBMT))
 #define PT_FORCE_ENABLED_FEATURES BIT(PT_FEAT_DETAILED_GATHER)
 
 #include "iommu_template.h"
-- 
2.43.0


^ permalink raw reply related	[flat|nested] 8+ messages in thread
* [PATCH] iommu/generic_pt: Fix the RISC-V supported feature mask
@ 2026-08-18  9:24 ` Andrew Jones
  0 siblings, 0 replies; 8+ messages in thread
From: Andrew Jones @ 2026-08-18  9:24 UTC (permalink / raw)
  To: iommu, linux-riscv, linux-kernel
  Cc: fangyu.yu, tomasz.jeznach, jgg, oro, will, robin.murphy, pjw,
	palmer

The RISC-V format advertises Svpbmt to its users, but omits the feature
from PT_SUPPORTED_FEATURES. Add it there so configurations which enable
Svpbmt pass generic page-table feature validation.

Fixes: f196a8668797 ("iommu/riscv: Advertise Svpbmt support to generic page table")
Signed-off-by: Andrew Jones <andrew.jones@oss.qualcomm.com>
---
 drivers/iommu/generic_pt/fmt/iommu_riscv64.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/iommu/generic_pt/fmt/iommu_riscv64.c b/drivers/iommu/generic_pt/fmt/iommu_riscv64.c
index b18fc4d109f5..1bb74114fb02 100644
--- a/drivers/iommu/generic_pt/fmt/iommu_riscv64.c
+++ b/drivers/iommu/generic_pt/fmt/iommu_riscv64.c
@@ -7,7 +7,8 @@
 #define PT_SUPPORTED_FEATURES                                  \
 	(BIT(PT_FEAT_SIGN_EXTEND) | BIT(PT_FEAT_FLUSH_RANGE) | \
 	 BIT(PT_FEAT_RISCV_SVNAPOT_64K) |                      \
-	 BIT(PT_FEAT_DETAILED_GATHER))
+	 BIT(PT_FEAT_DETAILED_GATHER) |                        \
+	 BIT(PT_FEAT_RISCV_SVPBMT))
 #define PT_FORCE_ENABLED_FEATURES BIT(PT_FEAT_DETAILED_GATHER)
 
 #include "iommu_template.h"
-- 
2.43.0


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linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

^ permalink raw reply related	[flat|nested] 8+ messages in thread
* Re: [PATCH] iommu/generic_pt: Fix the RISC-V supported feature mask
  2026-08-18  9:24 ` Andrew Jones
@ 2026-08-18 12:29   ` fangyu.yu
  -1 siblings, 0 replies; 8+ messages in thread
From: fangyu.yu @ 2026-08-18 12:29 UTC (permalink / raw)
  To: andrew.jones
  Cc: fangyu.yu, iommu, jgg, linux-kernel, linux-riscv, oro, palmer,
	pjw, robin.murphy, tomasz.jeznach, will

>The RISC-V format advertises Svpbmt to its users, but omits the feature
>from PT_SUPPORTED_FEATURES. Add it there so configurations which enable
>Svpbmt pass generic page-table feature validation.
>
>Fixes: f196a8668797 ("iommu/riscv: Advertise Svpbmt support to generic page table")
>Signed-off-by: Andrew Jones <andrew.jones@oss.qualcomm.com>
>---
> drivers/iommu/generic_pt/fmt/iommu_riscv64.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
>diff --git a/drivers/iommu/generic_pt/fmt/iommu_riscv64.c b/drivers/iommu/generic_pt/fmt/iommu_riscv64.c
>index b18fc4d109f5..1bb74114fb02 100644
>--- a/drivers/iommu/generic_pt/fmt/iommu_riscv64.c
>+++ b/drivers/iommu/generic_pt/fmt/iommu_riscv64.c
>@@ -7,7 +7,8 @@
> #define PT_SUPPORTED_FEATURES                                  \
> 	(BIT(PT_FEAT_SIGN_EXTEND) | BIT(PT_FEAT_FLUSH_RANGE) | \
> 	 BIT(PT_FEAT_RISCV_SVNAPOT_64K) |                      \
>-	 BIT(PT_FEAT_DETAILED_GATHER))
>+	 BIT(PT_FEAT_DETAILED_GATHER) |                        \
>+	 BIT(PT_FEAT_RISCV_SVPBMT))
> #define PT_FORCE_ENABLED_FEATURES BIT(PT_FEAT_DETAILED_GATHER)
> 
> #include "iommu_template.h"
>-- 
>2.43.0
>

Thanks for fixing this.

When I originally tested the Svpbmt support, I had CONFIG_DEBUG_GENERIC_PT
enabled by default, so this issue was hidden by the debug supported-feature
mask and did not show up in my testing.

Tested-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>

^ permalink raw reply	[flat|nested] 8+ messages in thread
* Re: [PATCH] iommu/generic_pt: Fix the RISC-V supported feature mask
@ 2026-08-18 12:29   ` fangyu.yu
  0 siblings, 0 replies; 8+ messages in thread
From: fangyu.yu @ 2026-08-18 12:29 UTC (permalink / raw)
  To: andrew.jones
  Cc: fangyu.yu, iommu, jgg, linux-kernel, linux-riscv, oro, palmer,
	pjw, robin.murphy, tomasz.jeznach, will

>The RISC-V format advertises Svpbmt to its users, but omits the feature
>from PT_SUPPORTED_FEATURES. Add it there so configurations which enable
>Svpbmt pass generic page-table feature validation.
>
>Fixes: f196a8668797 ("iommu/riscv: Advertise Svpbmt support to generic page table")
>Signed-off-by: Andrew Jones <andrew.jones@oss.qualcomm.com>
>---
> drivers/iommu/generic_pt/fmt/iommu_riscv64.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
>diff --git a/drivers/iommu/generic_pt/fmt/iommu_riscv64.c b/drivers/iommu/generic_pt/fmt/iommu_riscv64.c
>index b18fc4d109f5..1bb74114fb02 100644
>--- a/drivers/iommu/generic_pt/fmt/iommu_riscv64.c
>+++ b/drivers/iommu/generic_pt/fmt/iommu_riscv64.c
>@@ -7,7 +7,8 @@
> #define PT_SUPPORTED_FEATURES                                  \
> 	(BIT(PT_FEAT_SIGN_EXTEND) | BIT(PT_FEAT_FLUSH_RANGE) | \
> 	 BIT(PT_FEAT_RISCV_SVNAPOT_64K) |                      \
>-	 BIT(PT_FEAT_DETAILED_GATHER))
>+	 BIT(PT_FEAT_DETAILED_GATHER) |                        \
>+	 BIT(PT_FEAT_RISCV_SVPBMT))
> #define PT_FORCE_ENABLED_FEATURES BIT(PT_FEAT_DETAILED_GATHER)
> 
> #include "iommu_template.h"
>-- 
>2.43.0
>

Thanks for fixing this.

When I originally tested the Svpbmt support, I had CONFIG_DEBUG_GENERIC_PT
enabled by default, so this issue was hidden by the debug supported-feature
mask and did not show up in my testing.

Tested-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

^ permalink raw reply	[flat|nested] 8+ messages in thread
* Re: [PATCH] iommu/generic_pt: Fix the RISC-V supported feature mask
  2026-08-18  9:24 ` Andrew Jones
@ 2026-08-18 13:14   ` Jason Gunthorpe
  -1 siblings, 0 replies; 8+ messages in thread
From: Jason Gunthorpe @ 2026-08-18 13:14 UTC (permalink / raw)
  To: Andrew Jones
  Cc: iommu, linux-riscv, linux-kernel, fangyu.yu, tomasz.jeznach, oro,
	will, robin.murphy, pjw, palmer

On Tue, Aug 18, 2026 at 11:24:44AM +0200, Andrew Jones wrote:
> The RISC-V format advertises Svpbmt to its users, but omits the feature
> from PT_SUPPORTED_FEATURES. Add it there so configurations which enable
> Svpbmt pass generic page-table feature validation.
> 
> Fixes: f196a8668797 ("iommu/riscv: Advertise Svpbmt support to generic page table")
> Signed-off-by: Andrew Jones <andrew.jones@oss.qualcomm.com>
> ---
>  drivers/iommu/generic_pt/fmt/iommu_riscv64.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)

Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>

Jason

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

^ permalink raw reply	[flat|nested] 8+ messages in thread
* Re: [PATCH] iommu/generic_pt: Fix the RISC-V supported feature mask
@ 2026-08-18 13:14   ` Jason Gunthorpe
  0 siblings, 0 replies; 8+ messages in thread
From: Jason Gunthorpe @ 2026-08-18 13:14 UTC (permalink / raw)
  To: Andrew Jones
  Cc: iommu, linux-riscv, linux-kernel, fangyu.yu, tomasz.jeznach, oro,
	will, robin.murphy, pjw, palmer

On Tue, Aug 18, 2026 at 11:24:44AM +0200, Andrew Jones wrote:
> The RISC-V format advertises Svpbmt to its users, but omits the feature
> from PT_SUPPORTED_FEATURES. Add it there so configurations which enable
> Svpbmt pass generic page-table feature validation.
> 
> Fixes: f196a8668797 ("iommu/riscv: Advertise Svpbmt support to generic page table")
> Signed-off-by: Andrew Jones <andrew.jones@oss.qualcomm.com>
> ---
>  drivers/iommu/generic_pt/fmt/iommu_riscv64.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)

Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>

Jason

^ permalink raw reply	[flat|nested] 8+ messages in thread
* Re: [PATCH] iommu/generic_pt: Fix the RISC-V supported feature mask
  2026-08-18  9:24 ` Andrew Jones
@ 2026-08-19  3:55   ` Nutty.Liu
  -1 siblings, 0 replies; 8+ messages in thread
From: Nutty.Liu @ 2026-08-19  3:55 UTC (permalink / raw)
  To: Andrew Jones, iommu, linux-riscv, linux-kernel
  Cc: fangyu.yu, tomasz.jeznach, jgg, oro, will, robin.murphy, pjw,
	palmer


On 8/18/2026 5:24 PM, Andrew Jones wrote:
> The RISC-V format advertises Svpbmt to its users, but omits the feature
> from PT_SUPPORTED_FEATURES. Add it there so configurations which enable
> Svpbmt pass generic page-table feature validation.
>
> Fixes: f196a8668797 ("iommu/riscv: Advertise Svpbmt support to generic page table")
> Signed-off-by: Andrew Jones <andrew.jones@oss.qualcomm.com>
Reviewed-by: Nutty Liu <nutty.liu@hotmail.com>

Thanks,
Nutty
> ---
>   drivers/iommu/generic_pt/fmt/iommu_riscv64.c | 3 ++-
>   1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/iommu/generic_pt/fmt/iommu_riscv64.c b/drivers/iommu/generic_pt/fmt/iommu_riscv64.c
> index b18fc4d109f5..1bb74114fb02 100644
> --- a/drivers/iommu/generic_pt/fmt/iommu_riscv64.c
> +++ b/drivers/iommu/generic_pt/fmt/iommu_riscv64.c
> @@ -7,7 +7,8 @@
>   #define PT_SUPPORTED_FEATURES                                  \
>   	(BIT(PT_FEAT_SIGN_EXTEND) | BIT(PT_FEAT_FLUSH_RANGE) | \
>   	 BIT(PT_FEAT_RISCV_SVNAPOT_64K) |                      \
> -	 BIT(PT_FEAT_DETAILED_GATHER))
> +	 BIT(PT_FEAT_DETAILED_GATHER) |                        \
> +	 BIT(PT_FEAT_RISCV_SVPBMT))
>   #define PT_FORCE_ENABLED_FEATURES BIT(PT_FEAT_DETAILED_GATHER)
>   
>   #include "iommu_template.h"

^ permalink raw reply	[flat|nested] 8+ messages in thread
* Re: [PATCH] iommu/generic_pt: Fix the RISC-V supported feature mask
@ 2026-08-19  3:55   ` Nutty.Liu
  0 siblings, 0 replies; 8+ messages in thread
From: Nutty.Liu @ 2026-08-19  3:55 UTC (permalink / raw)
  To: Andrew Jones, iommu, linux-riscv, linux-kernel
  Cc: fangyu.yu, tomasz.jeznach, jgg, oro, will, robin.murphy, pjw,
	palmer


On 8/18/2026 5:24 PM, Andrew Jones wrote:
> The RISC-V format advertises Svpbmt to its users, but omits the feature
> from PT_SUPPORTED_FEATURES. Add it there so configurations which enable
> Svpbmt pass generic page-table feature validation.
>
> Fixes: f196a8668797 ("iommu/riscv: Advertise Svpbmt support to generic page table")
> Signed-off-by: Andrew Jones <andrew.jones@oss.qualcomm.com>
Reviewed-by: Nutty Liu <nutty.liu@hotmail.com>

Thanks,
Nutty
> ---
>   drivers/iommu/generic_pt/fmt/iommu_riscv64.c | 3 ++-
>   1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/iommu/generic_pt/fmt/iommu_riscv64.c b/drivers/iommu/generic_pt/fmt/iommu_riscv64.c
> index b18fc4d109f5..1bb74114fb02 100644
> --- a/drivers/iommu/generic_pt/fmt/iommu_riscv64.c
> +++ b/drivers/iommu/generic_pt/fmt/iommu_riscv64.c
> @@ -7,7 +7,8 @@
>   #define PT_SUPPORTED_FEATURES                                  \
>   	(BIT(PT_FEAT_SIGN_EXTEND) | BIT(PT_FEAT_FLUSH_RANGE) | \
>   	 BIT(PT_FEAT_RISCV_SVNAPOT_64K) |                      \
> -	 BIT(PT_FEAT_DETAILED_GATHER))
> +	 BIT(PT_FEAT_DETAILED_GATHER) |                        \
> +	 BIT(PT_FEAT_RISCV_SVPBMT))
>   #define PT_FORCE_ENABLED_FEATURES BIT(PT_FEAT_DETAILED_GATHER)
>   
>   #include "iommu_template.h"

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

^ permalink raw reply	[flat|nested] 8+ messages in thread
end of thread, other threads:[~2026-08-19  3:56 UTC | newest]

Thread overview: 8+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-08-18  9:24 [PATCH] iommu/generic_pt: Fix the RISC-V supported feature mask Andrew Jones
2026-08-18  9:24 ` Andrew Jones
2026-08-18 12:29 ` fangyu.yu
2026-08-18 12:29   ` fangyu.yu
2026-08-18 13:14 ` Jason Gunthorpe
2026-08-18 13:14   ` Jason Gunthorpe
2026-08-19  3:55 ` Nutty.Liu
2026-08-19  3:55   ` Nutty.Liu

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