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From: "Richard Genoud (TI)" <richard.genoud@bootlin.com>
To: Tom Rini <trini@konsulko.com>,
	Manorit Chawdhry <m-chawdhry@ti.com>,
	Apurva Nandan <a-nandan@ti.com>, "Andrew F . Davis" <afd@ti.com>,
	Vignesh Raghavendra <vigneshr@ti.com>, Bryan Brattlof <bb@ti.com>,
	Vaishnav Achath <vaishnav.a@ti.com>,
	Jayesh Choudhary <j-choudhary@ti.com>,
	Simon Glass <sjg@chromium.org>,
	Alper Nebi Yasak <alpernebiyasak@gmail.com>
Cc: Markus Schneider-Pargmann <msp@baylibre.com>,
	Kendall Willis <k-willis@ti.com>, Udit Kumar <u-kumar1@ti.com>,
	Abhash Kumar <a-kumar2@ti.com>,
	Thomas Richard <thomas.richard@bootlin.com>,
	Gregory CLEMENT <gregory.clement@bootlin.com>,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	Richard Genoud <richard.genoud@bootlin.com>,
	u-boot@lists.u-boot-project.org
Subject: [PATCH v5 10/21] board: mach-k3: r5: common: Store wakeup reason on scratchpad memory
Date: Fri, 28 Aug 2026 15:57:19 +0200	[thread overview]
Message-ID: <20260828135730.1565643-11-richard.genoud@bootlin.com> (raw)
In-Reply-To: <20260828135730.1565643-1-richard.genoud@bootlin.com>

From: Abhash Kumar Jha <a-kumar2@ti.com>

While resuming from suspend, the wakeup reason need to be stored
and this will be used by the Linux kernel once its up.

Use the 32 bytes of MCU_PSRAM0_RAM area (addr = 0x40280000) to
store the wakeup reason.

Read the value as soon as it starts and store it internally.

Signed-off-by: Abhash Kumar Jha <a-kumar2@ti.com>
Co-developed-by: Richard Genoud (TI) <richard.genoud@bootlin.com>
Signed-off-by: Richard Genoud (TI) <richard.genoud@bootlin.com>
---
 arch/arm/mach-k3/Kconfig         | 10 ++++++++++
 arch/arm/mach-k3/r5/lpm-common.c | 24 ++++++++++++++++++++++++
 2 files changed, 34 insertions(+)

diff --git a/arch/arm/mach-k3/Kconfig b/arch/arm/mach-k3/Kconfig
index a32ed3a9683f..bbb62fa617fc 100644
--- a/arch/arm/mach-k3/Kconfig
+++ b/arch/arm/mach-k3/Kconfig
@@ -101,6 +101,16 @@ config SYS_K3_BOOT_CORE_ID
 	int
 	default 16
 
+config SYS_K3_SCRATCH_LPM_ADDR
+	hex
+	default 0x40280000 if SOC_K3_J721E || SOC_K3_J7200 || SOC_K3_J784S4
+	default 0x0
+	help
+	  Address where the wake-up reason is stored at resume (32 bits).
+	  It will be read by the Linux kernel once its up.
+	  On J7200/J784s4 the MCU_PSRAM0_RAM is used by default.
+	  Set it to 0 if unused.
+
 config K3_EARLY_CONS
 	bool "Activate to allow for an early console during SPL"
 	depends on SPL
diff --git a/arch/arm/mach-k3/r5/lpm-common.c b/arch/arm/mach-k3/r5/lpm-common.c
index 559e1b5f681a..0e5feae6d12d 100644
--- a/arch/arm/mach-k3/r5/lpm-common.c
+++ b/arch/arm/mach-k3/r5/lpm-common.c
@@ -29,6 +29,11 @@
 /* PMIC register where the magic value resides */
 #define K3_LPM_SCRATCH_PAD_REG_3 0xcb
 
+/* Wake-up source IDs */
+#define K3_LPM_WAKE_SOURCE_MAIN_IO 0x80
+#define K3_LPM_WAKE_SOURCE_MCU_IO 0x81
+#define K3_LPM_WAKE_SOURCE_PMIC_GPIO 0xB0
+
 #define IO_ISO_STATUS BIT(25)
 #define FW_IMAGE_SIZE 0x80000
 
@@ -40,6 +45,11 @@ struct lpm_addr_info {
 	u32 size;
 };
 
+struct lpm_scratch_space {
+	u16 wake_src;
+	u16 reserved;
+} __packed;
+
 __weak void clear_isolation(void) { }
 
 /* This is used by J722s */
@@ -75,6 +85,7 @@ void k3_deassert_ddr_ret(const char *pmic_name, unsigned int ddr_ret_val,
 /* in board_init_f(), there's no BSS, so we can't use global/static variables */
 bool j7xx_board_is_resuming(void)
 {
+	struct lpm_scratch_space *lpm_scratch;
 	struct udevice *pmic, *i2c;
 	u32 pmctrl_val = 0;
 	int ret, magic;
@@ -85,7 +96,18 @@ bool j7xx_board_is_resuming(void)
 #ifdef PMCTRL_IO_LPM
 	pmctrl_val = readl(PMCTRL_IO_LPM);
 #endif
+	lpm_scratch = (struct lpm_scratch_space *)CONFIG_SYS_K3_SCRATCH_LPM_ADDR;
+	if (lpm_scratch) {
+		lpm_scratch->wake_src = 0;
+		lpm_scratch->reserved = 0;
+	}
 	if ((pmctrl_val & IO_ISO_STATUS) == IO_ISO_STATUS) {
+		if (lpm_scratch) {
+			if (IS_ENABLED(CONFIG_SOC_K3_J784S4))
+				lpm_scratch->wake_src = K3_LPM_WAKE_SOURCE_MCU_IO;
+			else
+				lpm_scratch->wake_src = K3_LPM_WAKE_SOURCE_MAIN_IO;
+		}
 		clear_isolation();
 		gd_set_k3_resuming(K3_RESUME_STATE_RESUMING);
 		debug("board is resuming from IO_DDR mode\n");
@@ -127,6 +149,8 @@ bool j7xx_board_is_resuming(void)
 
 	if (magic == K3_LPM_MAGIC_SUSPEND) {
 		debug("%s: board is resuming\n", __func__);
+		if (lpm_scratch)
+			lpm_scratch->wake_src = K3_LPM_WAKE_SOURCE_PMIC_GPIO;
 		gd_set_k3_resuming(K3_RESUME_STATE_RESUMING);
 
 		/* clean magic suspend */

  parent reply	other threads:[~2026-08-28 13:58 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-28 13:57 [PATCH v5 00/21] Introduce resume for J7xx SoCs Richard Genoud (TI)
2026-08-28 13:57 ` [PATCH v5 01/21] ram: k3-ddrss: Add support for DDR in self-refresh Richard Genoud (TI)
2026-08-28 13:57 ` [PATCH v5 02/21] firmware: ti_sci: Add TI_SCI_MSG_MIN_CONTEXT_RESTORE Richard Genoud (TI)
2026-08-28 13:57 ` [PATCH v5 03/21] firmware: ti_sci: add low power mode operations Richard Genoud (TI)
2026-08-28 13:57 ` [PATCH v5 04/21] mach-k3: r5: common: add helper functions needed in LPM resume sequence Richard Genoud (TI)
2026-08-28 13:57 ` [PATCH v5 05/21] global: k3: use gd to store the resume state Richard Genoud (TI)
2026-08-28 13:57 ` [PATCH v5 06/21] mach-k3: r5: common: introduce j7xx_board_is_resuming() Richard Genoud (TI)
2026-08-28 13:57 ` [PATCH v5 07/21] mach-k3: r5: common: introduce k3_deassert_ddr_ret() Richard Genoud (TI)
2026-08-28 13:57 ` [PATCH v5 08/21] board: mach-k3: r5: common: enable GTC after core_resume Richard Genoud (TI)
2026-08-28 13:57 ` [PATCH v5 09/21] board: evm: Enable de-isolation of IOs at resume for j7200 and j784s4 Richard Genoud (TI)
2026-08-28 13:57 ` Richard Genoud (TI) [this message]
2026-08-28 13:57 ` [PATCH v5 11/21] board: mach-k3: r5: common: Set PMIC NSLEEP triggers bits at resume Richard Genoud (TI)
2026-08-28 13:57 ` [PATCH v5 12/21] ram: k3-ddrss: Add exit retention support Richard Genoud (TI)
2026-08-28 13:57 ` [PATCH v5 13/21] ram: k3-ddrss: Add j722s DDR resume sequence Richard Genoud (TI)
2026-08-28 13:57 ` [PATCH v5 14/21] ram: k3-ddrss: support j784s4/j721e/j721s2 DDR resume Richard Genoud (TI)
2026-08-28 13:57 ` [PATCH v5 15/21] arm: mach-k3: j721e: Enable LPM resume flow for J7200/J721e SOC Richard Genoud (TI)
2026-08-28 13:57 ` [PATCH v5 16/21] arm: mach-k3: j784s4: Enable LPM resume flow for J784s4/J742s2 SOCs Richard Genoud (TI)
2026-08-28 13:57 ` [PATCH v5 17/21] arm: mach-k3: j722s: Enable LPM resume flow Richard Genoud (TI)
2026-08-28 13:57 ` [PATCH v5 18/21] arm: mach-k3: j721s2: " Richard Genoud (TI)
2026-08-28 13:57 ` [PATCH v5 19/21] arm: mach-k3: Update pm-boardcfg for all k3 platforms Richard Genoud (TI)
2026-08-28 13:57 ` [PATCH v5 20/21] arm: dts: k3-j7200: Remove background firewall on DDR Richard Genoud (TI)
2026-08-28 13:57 ` [PATCH v5 21/21] arm: dts: k3-j7200: Extend firewall for ATF region to TIFS Richard Genoud (TI)

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