[PATCH v2 03/11] hw/intc: clear pending bit on l2vic de-assertion

[Brian Cain <brian.cain@oss.qualcomm.com>]

From: Sid Manning <sidneym@quicinc.com>

l2vic_set_irq() clears a level-triggered source's pending bit on
de-assertion, so a source that drops before it is latched into
int_status is not spuriously re-delivered on the next ciad.
Edge-triggered sources (int_type set) keep the pulse semantics they
already have via SOFT_INT/set_irq(level=1).

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Signed-off-by: Brian Cain <brian.cain@oss.qualcomm.com>
---
 hw/intc/hex-l2vic.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/hw/intc/hex-l2vic.c b/hw/intc/hex-l2vic.c
index f07ec850d49..a986f0bdf35 100644
--- a/hw/intc/hex-l2vic.c
+++ b/hw/intc/hex-l2vic.c
@@ -299,6 +299,8 @@ static void l2vic_set_irq(void *opaque, int irq, int level)
 
     if (level) {
         set_bit32(irq, s->int_pending);
+    } else if (!test_bit32(irq, s->int_type)) {
+        clear_bit32(irq, s->int_pending);
     }
     l2vic_update(s, irq);
 }
-- 
2.34.1