All of lore.kernel.org
 help / color / mirror / Atom feed
From: sashiko-bot@kernel.org
To: "Chang S. Bae" <chang.seok.bae@intel.com>
Cc: kvm@vger.kernel.org
Subject: Re: [PATCH v7 19/20] KVM: x86: selftests: Add APX state and ABI test
Date: Wed, 02 Sep 2026 03:07:34 +0000	[thread overview]
Message-ID: <20260902030735.019A31F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260902021804.718676-20-chang.seok.bae@intel.com>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] The inline assembly in `read_egpr()` lacks the `volatile` qualifier, allowing the compiler to optimize or hoist the register reads incorrectly.
--

commit 95fe69711afd71a902fad394278581f460dbab32
Author: Chang S. Bae <chang.seok.bae@intel.com>

KVM: x86: selftests: Add APX state and ABI test

This commit adds testing for APX-specific behavior and ABI interactions.
It verifies that EGPR state is correctly saved and retained across VM entry,
and tests its exposure via the XSAVE ABI.

> diff --git a/tools/testing/selftests/kvm/include/x86/processor.h b/tools/testing/selftests/kvm/include/x86/processor.h
> index 6e6f70035508a..6e3e7d96c571e 100644
> --- a/tools/testing/selftests/kvm/include/x86/processor.h
> +++ b/tools/testing/selftests/kvm/include/x86/processor.h

[ ... ]

> @@ -917,6 +919,124 @@ static inline void write_sse_reg(int reg, const sse128_t *data)
>  	}
>  }
>  
> +static inline unsigned long read_egpr(int reg)
> +{
> +	unsigned long data = 0;
> +
> +	/* mov %r16..%r31, %rax */
> +	switch (reg) {
> +	case 16:
> +		asm(".byte 0xd5, 0x48, 0x89, 0xc0" : "=a"(data));

[Severity: Medium]
Is it possible for the compiler to hoist these register reads outside of
their intended execution points?

According to GCC and Clang semantics, an asm statement with output operands
but no input operands and no volatile qualifier is treated as a pure
computation. 

Could the optimizer move these reads to execute before the GUEST_SYNC()
calls, causing the test to validate stale register states (from before the
VM exit) instead of the intended restored states upon VM entry? 

Adding the volatile qualifier would prevent the compiler from reordering
these hardware register reads.

[ ... ]

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260902021804.718676-1-chang.seok.bae@intel.com?part=19

  reply	other threads:[~2026-09-02  3:07 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-02  2:17 [PATCH v7 00/20] KVM: x86: Enable APX for guests Chang S. Bae
2026-09-02  2:17 ` [PATCH v7 01/20] KVM: x86: Extend VCPU registers for EGPRs Chang S. Bae
2026-09-02  2:17 ` [PATCH v7 02/20] KVM: VMX: Save guest EGPRs in VCPU cache Chang S. Bae
2026-09-02  3:26   ` sashiko-bot
2026-09-02  2:17 ` [PATCH v7 03/20] KVM: x86: Support APX state for XSAVE ABI Chang S. Bae
2026-09-02  3:08   ` sashiko-bot
2026-09-02  2:17 ` [PATCH v7 04/20] KVM: VMX: Refactor VMX instruction information access Chang S. Bae
2026-09-02  2:17 ` [PATCH v7 05/20] KVM: VMX: Refactor instruction information decoding Chang S. Bae
2026-09-02  2:17 ` [PATCH v7 06/20] KVM: VMX: Remove unused control-register access defines Chang S. Bae
2026-09-02  2:17 ` [PATCH v7 07/20] KVM: VMX: Refactor register index retrieval from exit qualification Chang S. Bae
2026-09-02  2:17 ` [PATCH v7 08/20] KVM: VMX: Support instruction information extension Chang S. Bae
2026-09-02  2:17 ` [PATCH v7 09/20] KVM: nVMX: Propagate extended instruction information Chang S. Bae
2026-09-02  3:07   ` sashiko-bot
2026-09-02  2:17 ` [PATCH v7 10/20] KVM: x86: Support EGPR accessing and tracking for emulator Chang S. Bae
2026-09-02  2:17 ` [PATCH v7 11/20] KVM: x86: Handle EGPR index and REX2-incompatible opcodes Chang S. Bae
2026-09-02  3:06   ` sashiko-bot
2026-09-02  2:17 ` [PATCH v7 12/20] KVM: x86: Support REX2-prefixed opcode decode Chang S. Bae
2026-09-02  2:17 ` [PATCH v7 13/20] KVM: x86: Reject EVEX-prefixed instructions Chang S. Bae
2026-09-02  2:59   ` sashiko-bot
2026-09-02  2:17 ` [PATCH v7 14/20] KVM: x86: Move KVM_SUPPORTED_{XCR0,XSS} into kvm_x86_vendor_init() Chang S. Bae
2026-09-02  2:17 ` [PATCH v7 15/20] KVM: x86: Guard valid XCR0.APX settings Chang S. Bae
2026-09-02  2:18 ` [PATCH v7 16/20] KVM: x86: Add APX to supported XCR0 Chang S. Bae
2026-09-02  3:07   ` sashiko-bot
2026-09-02  2:18 ` [PATCH v7 17/20] KVM: x86: Expose APX foundation feature to userspace Chang S. Bae
2026-09-02  2:18 ` [PATCH v7 18/20] KVM: x86: Expose APX sub-features " Chang S. Bae
2026-09-02  3:00   ` sashiko-bot
2026-09-02  2:18 ` [PATCH v7 19/20] KVM: x86: selftests: Add APX state and ABI test Chang S. Bae
2026-09-02  3:07   ` sashiko-bot [this message]
2026-09-02  2:18 ` [PATCH v7 20/20] KVM: x86: selftests: Add APX state handling and XCR0 sanity checks Chang S. Bae
2026-09-23 11:04 ` [PATCH v7 00/20] KVM: x86: Enable APX for guests Zhao Liu

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20260902030735.019A31F000E9@smtp.kernel.org \
    --to=sashiko-bot@kernel.org \
    --cc=chang.seok.bae@intel.com \
    --cc=kvm@vger.kernel.org \
    --cc=sashiko-reviews@lists.linux.dev \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.