From: Ray Wu <ray.wu@amd.com>
To: <amd-gfx@lists.freedesktop.org>
Cc: Harry Wentland <harry.wentland@amd.com>,
Leo Li <sunpeng.li@amd.com>,
Aurabindo Pillai <aurabindo.pillai@amd.com>,
Roman Li <roman.li@amd.com>, Wayne Lin <wayne.lin@amd.com>,
Tom Chung <chiahsuan.chung@amd.com>,
"Fangzhi Zuo" <jerry.zuo@amd.com>,
Dan Wheeler <daniel.wheeler@amd.com>, Ray Wu <Ray.Wu@amd.com>,
Ivan Lipski <ivan.lipski@amd.com>, Alex Hung <alex.hung@amd.com>,
James Lin <PingLei.Lin@amd.com>,
Chenyu Chen <Chen-Yu.Chen@amd.com>,
Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>,
Ray Wu <ray.wu@amd.com>
Subject: [PATCH 04/40] drm/amd/display: Test self refresh entry
Date: Wed, 2 Sep 2026 12:58:26 +0800 [thread overview]
Message-ID: <20260902050411.3473916-5-ray.wu@amd.com> (raw)
In-Reply-To: <20260902050411.3473916-1-ray.wu@amd.com>
From: Alex Hung <alex.hung@amd.com>
[Why]
Add KUnit tests for amdgpu_dm_enable_self_refresh(), covering the full
update and unsupported link blocks, the skip count gating, the damage
settle window, and a Replay capable link.
[How]
The power module stays NULL, which every mod_power entry point treats as
a no-op, so the event updates can be reached without a live power
module.
Assisted-by: Copilot:Claude-Opus-5 GPT-5.6 Sol
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Ray Wu <ray.wu@amd.com>
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 9 +-
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 3 +
.../display/amdgpu_dm/tests/amdgpu_dm_test.c | 148 ++++++++++++++++++
3 files changed, 156 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index e793dd0426b1..7a06486cec9e 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -3722,10 +3722,10 @@ STATIC_IFN_KUNIT void amdgpu_dm_update_cursor(struct drm_plane *plane,
}
EXPORT_IF_KUNIT(amdgpu_dm_update_cursor);
-static void amdgpu_dm_enable_self_refresh(struct amdgpu_display_manager *dm,
- struct amdgpu_crtc *acrtc_attach,
- const struct dm_crtc_state *acrtc_state,
- const u64 current_ts)
+STATIC_IFN_KUNIT void amdgpu_dm_enable_self_refresh(struct amdgpu_display_manager *dm,
+ struct amdgpu_crtc *acrtc_attach,
+ const struct dm_crtc_state *acrtc_state,
+ const u64 current_ts)
{
struct psr_settings *psr = &acrtc_state->stream->link->psr_settings;
struct replay_settings *pr = &acrtc_state->stream->link->replay_settings;
@@ -3761,6 +3761,7 @@ static void amdgpu_dm_enable_self_refresh(struct amdgpu_display_manager *dm,
acrtc_attach->dm_irq_params.allow_sr_entry = false;
}
}
+EXPORT_IF_KUNIT(amdgpu_dm_enable_self_refresh);
STATIC_IFN_KUNIT void dm_arm_vblank_event(struct amdgpu_crtc *acrtc,
struct dm_crtc_state *acrtc_state,
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
index ad72dc182e93..9399f71c528e 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
@@ -1266,6 +1266,9 @@ int dm_update_mst_vcpi_slots_for_dsc(struct drm_atomic_commit *state, struct dc_
struct dsc_mst_fairness_vars *vars);
void manage_dm_interrupts(struct amdgpu_device *adev, struct amdgpu_crtc *acrtc,
struct dm_crtc_state *acrtc_state);
+void amdgpu_dm_enable_self_refresh(struct amdgpu_display_manager *dm,
+ struct amdgpu_crtc *acrtc_attach,
+ const struct dm_crtc_state *acrtc_state, const u64 current_ts);
int load_dmcu_fw(struct amdgpu_device *adev);
int dm_sw_init(struct amdgpu_ip_block *ip_block);
int dm_late_init(struct amdgpu_ip_block *ip_block);
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_test.c b/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_test.c
index 4daa187fbd0a..3c975ca2710d 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_test.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_test.c
@@ -3803,6 +3803,147 @@ static void dm_test_plane_info_layer_and_blending(struct kunit *test)
KUNIT_EXPECT_EQ(test, ctx->plane_info.global_alpha_value, 0x7f);
}
+/* Tests for amdgpu_dm_enable_self_refresh() */
+
+struct dm_test_sr_ctx {
+ struct amdgpu_display_manager *dm;
+ struct amdgpu_crtc *acrtc;
+ struct dm_crtc_state *acrtc_state;
+ struct amdgpu_dm_connector *aconn;
+ struct dc_link *link;
+};
+
+/*
+ * A fast-update CRTC whose stream has a self-refresh capable link. The power
+ * module stays NULL, which every mod_power entry point treats as a no-op.
+ */
+static struct dm_test_sr_ctx *dm_test_sr_ctx_alloc(struct kunit *test)
+{
+ struct dm_test_sr_ctx *ctx;
+
+ ctx = kunit_kzalloc(test, sizeof(*ctx), GFP_KERNEL);
+ KUNIT_ASSERT_NOT_NULL(test, ctx);
+
+ ctx->dm = dm_kunit_alloc_dm(test);
+ ctx->acrtc = kunit_kzalloc(test, sizeof(*ctx->acrtc), GFP_KERNEL);
+ KUNIT_ASSERT_NOT_NULL(test, ctx->acrtc);
+ ctx->acrtc_state = kunit_kzalloc(test, sizeof(*ctx->acrtc_state), GFP_KERNEL);
+ KUNIT_ASSERT_NOT_NULL(test, ctx->acrtc_state);
+ ctx->aconn = kunit_kzalloc(test, sizeof(*ctx->aconn), GFP_KERNEL);
+ KUNIT_ASSERT_NOT_NULL(test, ctx->aconn);
+
+ ctx->link = dm_kunit_alloc_link(test);
+ ctx->acrtc_state->stream = dm_kunit_alloc_stream(test, ctx->link);
+ ctx->acrtc_state->stream->dm_stream_context = ctx->aconn;
+ ctx->acrtc_state->update_type = UPDATE_TYPE_FAST;
+
+ return ctx;
+}
+
+static void dm_test_enable_sr(struct dm_test_sr_ctx *ctx, u64 current_ts)
+{
+ amdgpu_dm_enable_self_refresh(ctx->dm, ctx->acrtc, ctx->acrtc_state,
+ current_ts);
+}
+
+/**
+ * dm_test_self_refresh_full_update - Test a full update blocks self refresh
+ * @test: The KUnit test context
+ */
+static void dm_test_self_refresh_full_update(struct kunit *test)
+{
+ struct dm_test_sr_ctx *ctx = dm_test_sr_ctx_alloc(test);
+
+ ctx->acrtc_state->update_type = UPDATE_TYPE_FULL;
+ ctx->link->psr_settings.psr_feature_enabled = true;
+ ctx->acrtc->dm_irq_params.allow_sr_entry = true;
+
+ dm_test_enable_sr(ctx, 0);
+
+ KUNIT_EXPECT_FALSE(test, ctx->acrtc->dm_irq_params.allow_sr_entry);
+}
+
+/**
+ * dm_test_self_refresh_unsupported_link - Test a link without PSR or Replay
+ * @test: The KUnit test context
+ */
+static void dm_test_self_refresh_unsupported_link(struct kunit *test)
+{
+ struct dm_test_sr_ctx *ctx = dm_test_sr_ctx_alloc(test);
+
+ ctx->acrtc->dm_irq_params.allow_sr_entry = true;
+
+ dm_test_enable_sr(ctx, 0);
+
+ KUNIT_EXPECT_FALSE(test, ctx->acrtc->dm_irq_params.allow_sr_entry);
+}
+
+/**
+ * dm_test_self_refresh_decrements_skip_count - Test the skip count gates entry
+ * @test: The KUnit test context
+ */
+static void dm_test_self_refresh_decrements_skip_count(struct kunit *test)
+{
+ struct dm_test_sr_ctx *ctx = dm_test_sr_ctx_alloc(test);
+
+ ctx->link->psr_settings.psr_feature_enabled = true;
+ ctx->aconn->sr_skip_count = 2;
+
+ dm_test_enable_sr(ctx, 0);
+
+ KUNIT_EXPECT_EQ(test, ctx->aconn->sr_skip_count, 1);
+ KUNIT_EXPECT_FALSE(test, ctx->acrtc->dm_irq_params.allow_sr_entry);
+}
+
+/**
+ * dm_test_self_refresh_allows_entry - Test a drained skip count allows entry
+ * @test: The KUnit test context
+ */
+static void dm_test_self_refresh_allows_entry(struct kunit *test)
+{
+ struct dm_test_sr_ctx *ctx = dm_test_sr_ctx_alloc(test);
+
+ ctx->link->psr_settings.psr_feature_enabled = true;
+ ctx->aconn->sr_skip_count = 1;
+
+ /* Well past the 500ms settle window, so the events are cleared. */
+ dm_test_enable_sr(ctx, 2ULL * NSEC_PER_SEC);
+
+ KUNIT_EXPECT_EQ(test, ctx->aconn->sr_skip_count, 0);
+ KUNIT_EXPECT_TRUE(test, ctx->acrtc->dm_irq_params.allow_sr_entry);
+}
+
+/**
+ * dm_test_self_refresh_within_settle_window - Test a recent damage change holds off
+ * @test: The KUnit test context
+ */
+static void dm_test_self_refresh_within_settle_window(struct kunit *test)
+{
+ struct dm_test_sr_ctx *ctx = dm_test_sr_ctx_alloc(test);
+
+ ctx->link->psr_settings.psr_feature_enabled = true;
+ ctx->link->psr_settings.psr_dirty_rects_change_timestamp_ns = 1;
+
+ dm_test_enable_sr(ctx, 2);
+
+ KUNIT_EXPECT_TRUE(test, ctx->acrtc->dm_irq_params.allow_sr_entry);
+}
+
+/**
+ * dm_test_self_refresh_replay_link - Test a Replay capable link takes the same path
+ * @test: The KUnit test context
+ */
+static void dm_test_self_refresh_replay_link(struct kunit *test)
+{
+ struct dm_test_sr_ctx *ctx = dm_test_sr_ctx_alloc(test);
+
+ ctx->link->replay_settings.replay_feature_enabled = true;
+
+ dm_test_enable_sr(ctx, 2ULL * NSEC_PER_SEC);
+
+ KUNIT_EXPECT_TRUE(test, ctx->acrtc->dm_irq_params.allow_sr_entry);
+}
+
/* Tests for manage_dm_interrupts() */
struct dm_test_irq_mgmt_ctx {
@@ -4836,6 +4977,13 @@ static struct kunit_case amdgpu_dm_tests[] = {
KUNIT_CASE(dm_test_plane_info_bad_color_encoding),
KUNIT_CASE(dm_test_plane_info_rotations),
KUNIT_CASE(dm_test_plane_info_layer_and_blending),
+ /* amdgpu_dm_enable_self_refresh */
+ KUNIT_CASE(dm_test_self_refresh_full_update),
+ KUNIT_CASE(dm_test_self_refresh_unsupported_link),
+ KUNIT_CASE(dm_test_self_refresh_decrements_skip_count),
+ KUNIT_CASE(dm_test_self_refresh_allows_entry),
+ KUNIT_CASE(dm_test_self_refresh_within_settle_window),
+ KUNIT_CASE(dm_test_self_refresh_replay_link),
/* manage_dm_interrupts */
KUNIT_CASE(dm_test_manage_interrupts_offdelay),
KUNIT_CASE(dm_test_manage_interrupts_offdelay_fallback),
--
2.43.0
next prev parent reply other threads:[~2026-09-02 5:05 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-02 4:58 [PATCH 00/40] DC Patches September 7, 2026 Ray Wu
2026-09-02 4:58 ` [PATCH 01/40] drm/amd/display: Ensure requested LSDMA BW is within the SOP bound Ray Wu
2026-09-02 4:58 ` [PATCH 02/40] drm/amd/display: Refactor DC_SEND_CURSOR_INFO_TO_DMU to drop pipe_ctx Ray Wu
2026-09-02 4:58 ` [PATCH 03/40] drm/amd/display: Test vblank IRQ handling Ray Wu
2026-09-02 4:58 ` Ray Wu [this message]
2026-09-02 4:58 ` [PATCH 05/40] drm/amd/display: Test GPU reset helpers Ray Wu
2026-09-02 4:58 ` [PATCH 06/40] drm/amd/display: Add override for LSDMA BW in QoS table Ray Wu
2026-09-02 4:58 ` [PATCH 07/40] drm/amd/display: Test plane update adapter Ray Wu
2026-09-02 4:58 ` [PATCH 08/40] drm/amd/display: Test MST resume guards Ray Wu
2026-09-02 4:58 ` [PATCH 09/40] drm/amd/display: Test cached suspend state Ray Wu
2026-09-02 4:58 ` [PATCH 10/40] drm/amd/display: Test writeback state transitions Ray Wu
2026-09-02 4:58 ` [PATCH 11/40] drm/amd/display: Test atomic validation guards Ray Wu
2026-09-02 4:58 ` [PATCH 12/40] drm/amd/display: Cover dm_restore_drm_connector_state Ray Wu
2026-09-02 4:58 ` [PATCH 13/40] drm/amd/display: Cover EDID CEA parsing helpers Ray Wu
2026-09-02 4:58 ` [PATCH 14/40] drm/amd/display: Make sure streamclk gating is off when enabling streamclk Ray Wu
2026-09-02 4:58 ` [PATCH 15/40] drm/amd/display: Remove unnecessary includes Ray Wu
2026-09-02 4:58 ` [PATCH 16/40] drm/amd/display: Set mpc_tree_params->opp_id during OPP resource construct Ray Wu
2026-09-02 4:58 ` [PATCH 17/40] drm/amd/display: Add override capability for UTM table params Ray Wu
2026-09-02 4:58 ` [PATCH 18/40] drm/amd/display: Add immediate restore to FAMS2 for DRR Ray Wu
2026-09-02 4:58 ` [PATCH 19/40] drm/amd/display: Fix missing APG regs for DCN60 HDMI Ray Wu
2026-09-02 4:58 ` [PATCH 20/40] drm/amd/display: Exit IPS before connector detection on resume Ray Wu
2026-09-02 4:58 ` [PATCH 21/40] drm/amd/display: Fix HF-VSDB DSC bpc detection to be cumulative Ray Wu
2026-09-02 4:58 ` [PATCH 22/40] drm/amd/display: Fix unused params in flip sched Ray Wu
2026-09-02 4:58 ` [PATCH 23/40] drm/amd/display: Enable FW locality check in DCN6 Ray Wu
2026-09-02 4:58 ` [PATCH 24/40] drm/amd/display: Fix DC Hub reference frequency assert range Ray Wu
2026-09-02 4:58 ` [PATCH 25/40] drm/amd/display: Dump clock registers in HW init instead of SW init Ray Wu
2026-09-02 4:58 ` [PATCH 26/40] drm/amd/display: Validate irq source in DM IRQ handler Ray Wu
2026-09-02 4:58 ` [PATCH 27/40] drm/amd/display: Test DM IRQ handler source guard Ray Wu
2026-09-02 4:58 ` [PATCH 28/40] Revert "drm/amd/display: Fix CalculateFlipSchedule Calculation" Ray Wu
2026-09-02 4:58 ` [PATCH 29/40] drm/amd/display: Set DISPCLK per surface in DML Ray Wu
2026-09-02 4:58 ` [PATCH 30/40] drm/amd/display: Update Urgent Burst Calculation To Account For Unbounded Requests Ray Wu
2026-09-02 4:58 ` [PATCH 31/40] drm/amd/display: Add stressed peak bandwidth probe with DMA contention Ray Wu
2026-09-02 4:58 ` [PATCH 32/40] Revert "drm/amd/display: Unify CalculateFlipSchedule Logic" Ray Wu
2026-09-02 4:58 ` [PATCH 33/40] drm/amd/display: Add dml2_core_dcn6_calcs function pointer table Ray Wu
2026-09-02 4:58 ` [PATCH 34/40] drm/amd/display: Route DCN6 mode support calcs through " Ray Wu
2026-09-02 4:58 ` [PATCH 35/40] drm/amd/display: Route DCN6 mode programming " Ray Wu
2026-09-02 4:58 ` [PATCH 36/40] drm/amd/display: Update DML fields used for mode support Ray Wu
2026-09-02 4:58 ` [PATCH 37/40] drm/amd/display: Fix NULL deref of new_stream->sink in VTEM guard Ray Wu
2026-09-02 4:59 ` [PATCH 38/40] drm/amd/display: Fix signedness mismatches in cm3 Ray Wu
2026-09-02 4:59 ` [PATCH 39/40] drm/amd/display: [FW Promotion] Release 0.1.74.0 Ray Wu
2026-09-02 4:59 ` [PATCH 40/40] drm/amd/display: Promote DC to 3.2.397 Ray Wu
2026-09-09 13:17 ` [PATCH 00/40] DC Patches September 7, 2026 Wheeler, Daniel
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