From: Joel Stanley <joel@jms.id.au>
To: Alistair Francis <alistair.francis@wdc.com>,
Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>
Cc: "Weiwei Li" <liwei1518@gmail.com>,
"Liu Zhiwei" <zhiwei_liu@linux.alibaba.com>,
"Chao Liu" <chao.liu@processmission.com>,
"Nicholas Piggin" <npiggin@gmail.com>,
"Anirudh Srinivasan" <asrinivasan@oss.tenstorrent.com>,
"Michael Ellerman" <mpe@kernel.org>,
"Portia Stephens" <portias@oss.tenstorrent.com>,
"Cédric Le Goater" <clg@kaod.org>,
qemu-riscv@nongnu.org, qemu-devel@nongnu.org,
"Philippe Mathieu-Daudé" <philmd@oss.qualcomm.com>
Subject: [PATCH v3 07/16] hw/riscv/atlantis: Make UART unimp region a SoC device
Date: Thu, 3 Sep 2026 15:21:21 +0930 [thread overview]
Message-ID: <20260903055131.257903-8-joel@jms.id.au> (raw)
In-Reply-To: <20260903055131.257903-1-joel@jms.id.au>
Make the unimplemented region covering the remainder of the console
UART's register space a SoC child device, mapped using a helper. This
makes it easier to map it into the SoC's memory container along with
the other devices in the future.
While here, rename the region from uart0 to uart1. The uart0 name was
a leftover from an earlier revision that used a different device for
the console.
Reviewed-by: Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
---
include/hw/riscv/tt_atlantis.h | 2 ++
hw/riscv/tt_atlantis.c | 19 ++++++++++++++++---
2 files changed, 18 insertions(+), 3 deletions(-)
diff --git a/include/hw/riscv/tt_atlantis.h b/include/hw/riscv/tt_atlantis.h
index 7f7d4a5a5905..c9308aa57017 100644
--- a/include/hw/riscv/tt_atlantis.h
+++ b/include/hw/riscv/tt_atlantis.h
@@ -13,6 +13,7 @@
#include "hw/core/sysbus.h"
#include "hw/i2c/designware_i2c.h"
#include "hw/intc/riscv_imsic.h"
+#include "hw/misc/unimp.h"
#include "hw/riscv/riscv_hart.h"
#define TYPE_TT_ATLANTIS_MACHINE MACHINE_TYPE_NAME("tt-atlantis")
@@ -31,6 +32,7 @@ struct TTAtlantisState {
RISCVHartArrayState soc;
DeviceState *irqchip;
DesignWareI2CState i2c[TT_ATL_NUM_I2C];
+ UnimplementedDeviceState uart1;
int fdt_size;
};
diff --git a/hw/riscv/tt_atlantis.c b/hw/riscv/tt_atlantis.c
index 373d4dabf3a4..a2fb83aab78e 100644
--- a/hw/riscv/tt_atlantis.c
+++ b/hw/riscv/tt_atlantis.c
@@ -411,6 +411,17 @@ static void load_fdt(TTAtlantisState *s)
create_fdt_memory(s);
}
+static void mmio_map_unimplemented(MemoryRegion *memory, SysBusDevice *dev,
+ const char *name, hwaddr addr, uint64_t size)
+{
+ qdev_prop_set_string(DEVICE(dev), "name", name);
+ qdev_prop_set_uint64(DEVICE(dev), "size", size);
+ sysbus_realize(dev, &error_abort);
+
+ memory_region_add_subregion_overlap(memory, addr,
+ sysbus_mmio_get_region(dev, 0), -1000);
+}
+
static void tt_atlantis_machine_done(Notifier *notifier, void *data)
{
TTAtlantisState *s = container_of(notifier, TTAtlantisState, machine_done);
@@ -562,9 +573,11 @@ static void tt_atlantis_machine_init(MachineState *machine)
* Create an unimplemented device region so writes don't fault
* and reads return zero, which keeps Linux happy.
*/
- create_unimplemented_device("tt-atlantis.uart0",
- s->memmap[TT_ATL_UART1].base,
- s->memmap[TT_ATL_UART1].size);
+ object_initialize_child(OBJECT(s), "uart1", &s->uart1,
+ TYPE_UNIMPLEMENTED_DEVICE);
+ mmio_map_unimplemented(system_memory, SYS_BUS_DEVICE(&s->uart1),
+ "tt-atlantis.uart1", s->memmap[TT_ATL_UART1].base,
+ s->memmap[TT_ATL_UART1].size);
/* I2C */
for (int i = 0; i < TT_ATL_NUM_I2C; i++) {
--
2.47.3
next prev parent reply other threads:[~2026-09-03 5:54 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-03 5:51 [PATCH v3 00/16] hw/riscv: Socify Atlantis Joel Stanley
2026-09-03 5:51 ` [PATCH v3 01/16] hw/riscv/aia: Take a MemoryRegion for the created devices Joel Stanley
2026-09-03 6:06 ` Chao Liu via
2026-09-03 6:06 ` Chao Liu via qemu development
2026-09-03 5:51 ` [PATCH v3 02/16] hw/intc/riscv_aclint: " Joel Stanley
2026-09-03 5:51 ` [PATCH v3 03/16] hw/intc/riscv_imsic: Take a MemoryRegion for the created device Joel Stanley
2026-09-03 5:51 ` [PATCH v3 04/16] hw/intc/riscv_aplic: " Joel Stanley
2026-09-03 5:51 ` [PATCH v3 05/16] hw/intc/sifive_plic: " Joel Stanley
2026-09-03 6:07 ` Chao Liu via qemu development
2026-09-03 6:07 ` Chao Liu via
2026-09-03 5:51 ` [PATCH v3 06/16] hw/riscv/cps: Map interrupt controllers in SoC container Joel Stanley
2026-09-03 5:51 ` Joel Stanley [this message]
2026-09-03 5:51 ` [PATCH v3 08/16] hw/riscv/atlantis: Remove unused fdt_size Joel Stanley
2026-09-03 5:51 ` [PATCH v3 09/16] hw/riscv/atlantis: Rename hart array 'soc' to 'cpus' Joel Stanley
2026-09-03 5:51 ` [PATCH v3 10/16] hw/riscv/atlantis: Rework device tree creation Joel Stanley
2026-09-03 5:51 ` [PATCH v3 11/16] hw/riscv/atlantis: Use local reference for system memory Joel Stanley
2026-09-03 5:51 ` [PATCH v3 12/16] hw/riscv/atlantis: Decouple RAM size from MachineState Joel Stanley
2026-09-03 5:51 ` [PATCH v3 13/16] hw/riscv/atlantis: Make TTAtlantisState own memory containers Joel Stanley
2026-09-03 5:51 ` [PATCH v3 14/16] hw/riscv: Add property to hart array to allow private memory Joel Stanley
2026-09-04 10:42 ` Philippe Mathieu-Daudé
2026-09-07 7:27 ` Joel Stanley
2026-09-03 5:51 ` [PATCH v3 15/16] hw/riscv/atlantis: Extract an Atlantis SoC device Joel Stanley
2026-09-04 10:47 ` Philippe Mathieu-Daudé
2026-09-04 10:48 ` Philippe Mathieu-Daudé
2026-09-07 7:16 ` Joel Stanley
2026-09-03 5:51 ` [PATCH v3 16/16] hw/riscv/atlantis: Map the SoC through a memory container Joel Stanley
2026-09-03 23:35 ` [PATCH v3 00/16] hw/riscv: Socify Atlantis Alistair Francis
2026-09-04 10:49 ` Philippe Mathieu-Daudé
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