From: Ruslan Ruslichenko <ruslichenko.r@gmail.com>
To: qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org, artem_mygaiev@epam.com,
volodymyr_babchuk@epam.com, peter.maydell@linaro.org,
francisco.iglesias@amd.com, edgar.iglesias@gmail.com,
berrange@redhat.com, eugene@nuvacore.ai,
Ruslan_Ruslichenko@epam.com, takahiro.nakata.wr@renesas.com,
"Edgar E . Iglesias" <edgar.iglesias@amd.com>
Subject: [PATCH v2 10/20] hw/core: Add Remote Port Memory Master object skeleton
Date: Tue, 15 Sep 2026 18:00:34 +0200 [thread overview]
Message-ID: <20260915160044.345788-11-ruslichenko.r@gmail.com> (raw)
In-Reply-To: <20260915160044.345788-1-ruslichenko.r@gmail.com>
From: Ruslan Ruslichenko <Ruslan_Ruslichenko@epam.com>
Introduce 'remote-port-memory-master' device skeleton.
This device exposes a MemoryRegion within QEMU that represents
resources located in the external simulator. When implemented
fully, read/write accesses to the region will be encapsulated
into Remote Port packets and transmitted to the peer.
This enables QEMU to map remote peripherals or memory into
its own address space.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
Signed-off-by: Takahiro Nakata <takahiro.nakata.wr@renesas.com>
Signed-off-by: Ruslan Ruslichenko <Ruslan_Ruslichenko@epam.com>
---
hw/core/remote-port-memory-master.c | 152 ++++++++++++++++++++
hw/core/remote-port.c | 19 +++
include/hw/core/remote-port-memory-master.h | 81 +++++++++++
include/hw/core/remote-port.h | 4 +
4 files changed, 256 insertions(+)
create mode 100644 hw/core/remote-port-memory-master.c
create mode 100644 include/hw/core/remote-port-memory-master.h
diff --git a/hw/core/remote-port-memory-master.c b/hw/core/remote-port-memory-master.c
new file mode 100644
index 0000000000..4b0283f9fe
--- /dev/null
+++ b/hw/core/remote-port-memory-master.c
@@ -0,0 +1,152 @@
+/*
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ *
+ * QEMU remote port memory master.
+ *
+ * Copyright (c) 2014 Xilinx Inc
+ * Written by Edgar E. Iglesias <edgar.iglesias@xilinx.com>
+ *
+ * This code is licensed under the GNU GPL.
+ */
+
+#include "qemu/osdep.h"
+#include "system/system.h"
+#include "qemu/log.h"
+#include "qapi/qmp/qerror.h"
+#include "qapi/error.h"
+#include "hw/core/sysbus.h"
+#include "migration/vmstate.h"
+#include "hw/core/qdev-properties.h"
+#include "trace.h"
+
+#include "hw/core/remote-port-proto.h"
+#include "hw/core/remote-port.h"
+#include "hw/core/remote-port-memory-master.h"
+
+#define REMOTE_PORT_MEMORY_MASTER_PARENT_CLASS \
+ object_class_get_parent( \
+ object_class_by_name(TYPE_REMOTE_PORT_MEMORY_MASTER))
+
+#define RP_MAX_ACCESS_SIZE 4096
+
+static MemTxResult rp_mm_read(void *opaque, hwaddr addr, uint64_t *data,
+ unsigned size, MemTxAttrs attrs)
+{
+ /* TBD */
+ return MEMTX_OK;
+}
+
+static MemTxResult rp_mm_write(void *opaque, hwaddr addr, uint64_t data,
+ unsigned size, MemTxAttrs attrs)
+{
+ /* TBD */
+ return MEMTX_OK;
+}
+
+static const MemoryRegionOps rp_ops_template = {
+ .read_with_attrs = rp_mm_read,
+ .write_with_attrs = rp_mm_write,
+ .valid.max_access_size = RP_MAX_ACCESS_SIZE,
+ .valid.unaligned = true,
+ .impl.max_access_size = RP_MAX_ACCESS_SIZE,
+ .impl.unaligned = false,
+ .endianness = DEVICE_LITTLE_ENDIAN,
+};
+
+static void rp_memory_master_realize(DeviceState *dev, Error **errp)
+{
+ RemotePortMemoryMaster *s = REMOTE_PORT_MEMORY_MASTER(dev);
+ RemotePortDevice *rpd = REMOTE_PORT_DEVICE(dev);
+ int i;
+
+ /* Sanity check max access size. */
+ if (s->max_access_size > RP_MAX_ACCESS_SIZE) {
+ error_setg(errp, "%s: max-access-size %d too large! MAX is %d",
+ TYPE_REMOTE_PORT_MEMORY_MASTER, s->max_access_size,
+ RP_MAX_ACCESS_SIZE);
+ return;
+ }
+
+ if (s->max_access_size < 4) {
+ error_setg(errp, "%s: max-access-size %d too small! MIN is 4",
+ TYPE_REMOTE_PORT_MEMORY_MASTER, s->max_access_size);
+ return;
+ }
+
+ assert(s->rp);
+
+ rp_register_dev(s->rp, rpd, s->rp_dev);
+
+ s->peer = rp_get_peer(s->rp);
+
+ /* Create a single static region if configuration says so. */
+ if (s->map_num) {
+ /* Initialize rp_ops from template. */
+ s->rp_ops = g_malloc(sizeof *s->rp_ops);
+ memcpy(s->rp_ops, &rp_ops_template, sizeof *s->rp_ops);
+ s->rp_ops->valid.max_access_size = s->max_access_size;
+ s->rp_ops->impl.max_access_size = s->max_access_size;
+
+ s->mmaps = g_new0(typeof(*s->mmaps), s->map_num);
+ for (i = 0; i < s->map_num; ++i) {
+ char *name = g_strdup_printf("rp-%d", i);
+
+ s->mmaps[i].offset = s->map_offset;
+ memory_region_init_io(&s->mmaps[i].iomem, OBJECT(dev), s->rp_ops,
+ &s->mmaps[i], name, s->map_size);
+ sysbus_init_mmio(SYS_BUS_DEVICE(dev), &s->mmaps[i].iomem);
+ s->mmaps[i].parent = s;
+ g_free(name);
+ }
+ }
+}
+
+static void rp_prop_allow_set_link(const Object *obj, const char *name,
+ Object *val, Error **errp)
+{
+}
+
+static void rp_memory_master_init(Object *obj)
+{
+ RemotePortMemoryMaster *rpms = REMOTE_PORT_MEMORY_MASTER(obj);
+ object_property_add_link(obj, "rp-adaptor0", "remote-port",
+ (Object **)&rpms->rp,
+ rp_prop_allow_set_link,
+ OBJ_PROP_LINK_STRONG);
+}
+
+static Property rp_properties[] = {
+ DEFINE_PROP_UINT32("map-num", RemotePortMemoryMaster, map_num, 0),
+ DEFINE_PROP_UINT64("map-offset", RemotePortMemoryMaster, map_offset, 0),
+ DEFINE_PROP_UINT64("map-size", RemotePortMemoryMaster, map_size, 0),
+ DEFINE_PROP_UINT32("rp-chan0", RemotePortMemoryMaster, rp_dev, 0),
+ DEFINE_PROP_BOOL("relative", RemotePortMemoryMaster, relative, false),
+ DEFINE_PROP_UINT32("max-access-size", RemotePortMemoryMaster,
+ max_access_size, RP_MAX_ACCESS_SIZE),
+};
+
+static void rp_memory_master_class_init(ObjectClass *oc, const void *data)
+{
+ DeviceClass *dc = DEVICE_CLASS(oc);
+ device_class_set_props_n(dc, rp_properties, ARRAY_SIZE(rp_properties));
+ dc->realize = rp_memory_master_realize;
+}
+
+static const TypeInfo rp_info = {
+ .name = TYPE_REMOTE_PORT_MEMORY_MASTER,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(RemotePortMemoryMaster),
+ .instance_init = rp_memory_master_init,
+ .class_init = rp_memory_master_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { TYPE_REMOTE_PORT_DEVICE },
+ { },
+ },
+};
+
+static void rp_register_types(void)
+{
+ type_register_static(&rp_info);
+}
+
+type_init(rp_register_types)
diff --git a/hw/core/remote-port.c b/hw/core/remote-port.c
index 4425ba1b08..b4c9fa1528 100644
--- a/hw/core/remote-port.c
+++ b/hw/core/remote-port.c
@@ -81,6 +81,20 @@ void rp_restart_sync_timer(RemotePort *s)
ptimer_transaction_commit(s->sync.ptimer);
}
+void rp_register_dev(RemotePort *s, RemotePortDevice *dev, uint32_t chan)
+{
+ assert(chan < REMOTE_PORT_MAX_DEVS);
+
+ /* Skip if device registered via 'remote-port-dev%d' property */
+ if (s->devs[chan] == dev) {
+ return;
+ }
+
+ assert(!s->devs[chan]);
+
+ s->devs[chan] = dev;
+}
+
static void rp_fatal_error(RemotePort *s, const char *reason)
{
int64_t clk = rp_normalized_vmclk(s);
@@ -721,6 +735,11 @@ static void rp_init(Object *obj)
}
}
+struct rp_peer_state *rp_get_peer(RemotePort *s)
+{
+ return &s->peer;
+}
+
static void rp_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
diff --git a/include/hw/core/remote-port-memory-master.h b/include/hw/core/remote-port-memory-master.h
new file mode 100644
index 0000000000..011867f366
--- /dev/null
+++ b/include/hw/core/remote-port-memory-master.h
@@ -0,0 +1,81 @@
+/*
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ *
+ * QEMU remote port memory master. Read and write transactions
+ * recieved from QEMU are transmitted over remote-port.
+ *
+ * Copyright (c) 2020 Xilinx Inc
+ * Written by Edgar E. Iglesias <edgar.iglesias@xilinx.com>
+ *
+ * This code is licensed under the GNU GPL.
+ */
+#ifndef REMOTE_PORT_MEMORY_MASTER_H
+#define REMOTE_PORT_MEMORY_MASTER_H
+
+#include "hw/core/remote-port.h"
+
+#define TYPE_REMOTE_PORT_MEMORY_MASTER "remote-port-memory-master"
+#define REMOTE_PORT_MEMORY_MASTER(obj) \
+ OBJECT_CHECK(RemotePortMemoryMaster, (obj), \
+ TYPE_REMOTE_PORT_MEMORY_MASTER)
+
+typedef struct RemotePortMemoryMaster RemotePortMemoryMaster;
+
+typedef struct RemotePortMap {
+ void *parent;
+ MemoryRegion iomem;
+ uint32_t rp_dev;
+ uint64_t offset;
+} RemotePortMap;
+
+struct RemotePortMemoryMaster {
+ /* private */
+ SysBusDevice parent;
+
+ MemoryRegionOps *rp_ops;
+ RemotePortMap *mmaps;
+
+ /* public */
+ uint32_t map_num;
+ uint64_t map_offset;
+ uint64_t map_size;
+ uint32_t rp_dev;
+ bool relative;
+ uint32_t max_access_size;
+ struct RemotePort *rp;
+ struct rp_peer_state *peer;
+ int rp_timeout;
+};
+
+typedef struct RPMemoryTransaction {
+ union {
+ /*
+ * Data is passed by values up to 64bit sizes. Beyond
+ * that, a pointer is passed in p8.
+ *
+ * Note that p8 has no alignment restrictions.
+ */
+ uint8_t *p8;
+ uint64_t u64;
+ uint32_t u32;
+ uint16_t u16;
+ uint8_t u8;
+ } data;
+ bool rw;
+ hwaddr addr;
+ unsigned int size;
+ MemTxAttrs attr;
+ void *opaque;
+} RPMemoryTransaction;
+
+MemTxResult rp_mm_access(RemotePort *rp, uint32_t rp_dev,
+ struct rp_peer_state *peer,
+ RPMemoryTransaction *tr,
+ bool relative, uint64_t offset);
+
+MemTxResult rp_mm_access_with_def_attr(RemotePort *rp, uint32_t rp_dev,
+ struct rp_peer_state *peer,
+ RPMemoryTransaction *tr,
+ bool relative, uint64_t offset,
+ uint32_t def_attr);
+#endif
diff --git a/include/hw/core/remote-port.h b/include/hw/core/remote-port.h
index e16661af03..cef7471a73 100644
--- a/include/hw/core/remote-port.h
+++ b/include/hw/core/remote-port.h
@@ -129,6 +129,8 @@ struct RemotePort {
RemotePortDevice *devs[REMOTE_PORT_MAX_DEVS];
};
+void rp_register_dev(RemotePort *s, RemotePortDevice *dev, uint32_t chan);
+
void rp_rsp_mutex_lock(RemotePort *s);
void rp_rsp_mutex_unlock(RemotePort *s);
@@ -146,4 +148,6 @@ void rp_process(RemotePort *s);
ssize_t rp_write(RemotePort *s, const void *buf, size_t count);
+struct rp_peer_state *rp_get_peer(RemotePort *s);
+
#endif
--
2.43.0
next prev parent reply other threads:[~2026-09-15 16:02 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-15 16:00 [PATCH v2 00/20] hw/core: Introduce Remote Port Co-simulation Protocol Ruslan Ruslichenko
2026-09-15 16:00 ` [PATCH v2 01/20] hw/core: Add Remote Port protocol packet definition Ruslan Ruslichenko
2026-09-15 16:00 ` [PATCH v2 02/20] hw/core: Add Remote Port header helpers Ruslan Ruslichenko
2026-09-15 16:00 ` [PATCH v2 03/20] hw/core: Add Remote Port session state and hello protocol Ruslan Ruslichenko
2026-09-15 16:00 ` [PATCH v2 04/20] hw/core: Implement Remote Port bus access helpers Ruslan Ruslichenko
2026-09-15 16:00 ` [PATCH v2 05/20] hw/core: Implement Remote Port irq, sync and ATS helpers Ruslan Ruslichenko
2026-09-15 16:00 ` [PATCH v2 06/20] hw/core: Add Remote Port object skeleton Ruslan Ruslichenko
2026-09-15 16:00 ` [PATCH v2 07/20] hw/core: Add Remote Port protocol thread and handshake Ruslan Ruslichenko
2026-09-15 16:00 ` [PATCH v2 08/20] hw/core: Implement Remote Port response handling Ruslan Ruslichenko
2026-09-15 16:00 ` [PATCH v2 09/20] hw/core: Implement Remote Port time synchronization Ruslan Ruslichenko
2026-09-15 16:00 ` Ruslan Ruslichenko [this message]
2026-09-15 16:00 ` [PATCH v2 11/20] hw/core: Implement Remote Port Memory Master bus transactions Ruslan Ruslichenko
2026-10-13 16:09 ` Philippe Mathieu-Daudé
2026-10-13 16:10 ` Philippe Mathieu-Daudé
2026-10-14 8:24 ` Ruslan Ruslichenko
2026-09-15 16:00 ` [PATCH v2 12/20] system/physmem: Add ats_do_translate helper Ruslan Ruslichenko
2026-10-13 14:27 ` Clément MATHIEU--DRIF
2026-10-14 8:21 ` Ruslan Ruslichenko
2026-09-15 16:00 ` [PATCH v2 13/20] hw/core: Add Remote Port ATS device skeleton Ruslan Ruslichenko
2026-09-15 16:00 ` [PATCH v2 14/20] hw/core: Implement Remote Port ATS logic and cache management Ruslan Ruslichenko
2026-09-15 16:00 ` [PATCH v2 15/20] hw/core: Add Remote Port memory slave device Ruslan Ruslichenko
2026-09-15 16:00 ` [PATCH v2 16/20] hw/core: Add Remote Port GPIO/Interrupt bridge Ruslan Ruslichenko
2026-09-15 16:00 ` [PATCH v2 17/20] hw/core: Add Remote Port Stream device Ruslan Ruslichenko
2026-09-15 16:00 ` [PATCH v2 18/20] hw/core: Add Remote Port files to build Ruslan Ruslichenko
2026-09-15 16:00 ` [PATCH v2 19/20] hw/core: Add FDT support to Remote Port GPIO Ruslan Ruslichenko
2026-09-15 16:00 ` [PATCH v2 20/20] hw/core: Add FDT support to Remote Port memory master Ruslan Ruslichenko
2026-09-28 7:30 ` [PATCH v2 00/20] hw/core: Introduce Remote Port Co-simulation Protocol Ruslan Ruslichenko
2026-10-13 16:17 ` Philippe Mathieu-Daudé
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