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From: Ruslan Ruslichenko <ruslichenko.r@gmail.com>
To: qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org, artem_mygaiev@epam.com,
	volodymyr_babchuk@epam.com, peter.maydell@linaro.org,
	francisco.iglesias@amd.com, edgar.iglesias@gmail.com,
	berrange@redhat.com, eugene@nuvacore.ai,
	Ruslan_Ruslichenko@epam.com, takahiro.nakata.wr@renesas.com,
	"Edgar E . Iglesias" <edgar.iglesias@amd.com>
Subject: [PATCH v2 16/20] hw/core: Add Remote Port GPIO/Interrupt bridge
Date: Tue, 15 Sep 2026 18:00:40 +0200	[thread overview]
Message-ID: <20260915160044.345788-17-ruslichenko.r@gmail.com> (raw)
In-Reply-To: <20260915160044.345788-1-ruslichenko.r@gmail.com>

From: Ruslan Ruslichenko <Ruslan_Ruslichenko@epam.com>

This patch adds the `remote-port-gpio` device, which enables
GPIO levels exchange between QEMU and the remote peer.

It maps QEMU's `qemu_irq` lines (GPIOs) to Remote Port `RP_CMD_interrupt`
packets, enabling the synchronization of interrupt lines and logic signals
across the simulation.

This is essential for wiring up interrupt controllers or discrete logic
signals (reset lines, enable pins).

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
Signed-off-by: Takahiro Nakata <takahiro.nakata.wr@renesas.com>
Signed-off-by: Ruslan Ruslichenko <Ruslan_Ruslichenko@epam.com>
---
 hw/core/remote-port-gpio.c         | 187 +++++++++++++++++++++++++++++
 hw/core/trace-events               |   4 +
 include/hw/core/remote-port-gpio.h |  34 ++++++
 3 files changed, 225 insertions(+)
 create mode 100644 hw/core/remote-port-gpio.c
 create mode 100644 include/hw/core/remote-port-gpio.h

diff --git a/hw/core/remote-port-gpio.c b/hw/core/remote-port-gpio.c
new file mode 100644
index 0000000000..43a40315c5
--- /dev/null
+++ b/hw/core/remote-port-gpio.c
@@ -0,0 +1,187 @@
+/*
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ *
+ * Copyright (c) 2013 Xilinx Inc
+ * Written by Edgar E. Iglesias <edgar.iglesias@xilinx.com>
+ * Written by Peter Crosthwaite <peter.crosthwaite@xilinx.com>
+ *
+ * This code is licensed under the GNU GPL.
+ */
+
+#include "qemu/osdep.h"
+#include "hw/core/sysbus.h"
+#include "system/system.h"
+#include "system/dma.h"
+#include "qemu/log.h"
+#include "qapi/qmp/qerror.h"
+#include "qapi/error.h"
+#include "migration/vmstate.h"
+#include "hw/core/qdev-properties.h"
+#include "hw/core/irq.h"
+#include "trace.h"
+
+#include "hw/core/remote-port.h"
+#include "hw/core/remote-port-proto.h"
+#include "hw/core/remote-port-gpio.h"
+
+#define CACHE_INVALID -1
+
+static void rp_gpio_handler(void *opaque, int irq, int level)
+{
+    RemotePortGPIO *s = opaque;
+    struct rp_pkt pkt;
+    size_t len;
+    int64_t clk;
+    uint32_t id = rp_new_id(s->rp);
+    uint32_t flags = s->posted_updates ? RP_PKT_FLAGS_posted : 0;
+
+    /* If we hit the cache, return early.  */
+    if (s->cache[irq] != CACHE_INVALID && s->cache[irq] == level) {
+        return;
+    }
+    /* Update the cache and update the remote peer.  */
+    s->cache[irq] = level;
+
+    clk = rp_normalized_vmclk(s->rp);
+    len = rp_encode_interrupt_f(id, s->rp_dev, &pkt.interrupt, clk,
+                              irq, 0, level, flags);
+
+    trace_remote_port_gpio_tx_interrupt(id, flags, s->rp_dev, 0, irq, level);
+
+    if (s->peer->caps.wire_posted_updates && !s->posted_updates) {
+        rp_rsp_mutex_lock(s->rp);
+    }
+
+    rp_write(s->rp, (void *)&pkt, len);
+
+    /*
+     * If peer supports posted updates it will respect our flag and
+     * not respond.
+     */
+    if (s->peer->caps.wire_posted_updates && !s->posted_updates) {
+        RemotePortRespSlot *rsp_slot;
+        struct rp_pkt_interrupt *intr;
+
+        rsp_slot = rp_dev_wait_resp(s->rp, s->rp_dev, id);
+        assert(rsp_slot->rsp.pkt->hdr.id == id);
+
+        intr = &rsp_slot->rsp.pkt->interrupt;
+        trace_remote_port_gpio_rx_interrupt(intr->hdr.id, intr->hdr.flags,
+            intr->hdr.dev, intr->vector, intr->line, intr->val);
+
+        rp_resp_slot_done(s->rp, rsp_slot);
+        rp_rsp_mutex_unlock(s->rp);
+    }
+}
+
+static void rp_gpio_interrupt(RemotePortDevice *rpdev, struct rp_pkt *pkt)
+{
+    RemotePortGPIO *s = REMOTE_PORT_GPIO(rpdev);
+
+    trace_remote_port_gpio_rx_interrupt(pkt->hdr.id, pkt->hdr.flags,
+        pkt->hdr.dev, pkt->interrupt.vector, pkt->interrupt.line,
+        pkt->interrupt.val);
+
+    qemu_set_irq(s->gpio_out[pkt->interrupt.line], pkt->interrupt.val);
+
+    if (s->peer->caps.wire_posted_updates
+        && !(pkt->hdr.flags & RP_PKT_FLAGS_posted)) {
+        RemotePortDynPkt rsp = {0};
+        size_t len;
+
+        /* Need to reply.  */
+        rp_dpkt_alloc(&rsp, sizeof(struct rp_pkt_interrupt));
+        len = rp_encode_interrupt_f(pkt->hdr.id, pkt->hdr.dev,
+                                    &rsp.pkt->interrupt,
+                                    pkt->interrupt.timestamp,
+                                    pkt->interrupt.line,
+                                    pkt->interrupt.vector,
+                                    pkt->interrupt.val,
+                                    pkt->hdr.flags | RP_PKT_FLAGS_response);
+
+        trace_remote_port_gpio_tx_interrupt(pkt->hdr.id,
+            pkt->hdr.flags | RP_PKT_FLAGS_response, pkt->hdr.dev,
+            pkt->interrupt.vector, pkt->interrupt.line, pkt->interrupt.val);
+
+        rp_write(s->rp, (void *)rsp.pkt, len);
+    }
+}
+
+static void rp_gpio_reset(DeviceState *dev)
+{
+    RemotePortGPIO *s = REMOTE_PORT_GPIO(dev);
+
+    /* Mark as invalid.  */
+    memset(s->cache, CACHE_INVALID, s->num_gpios);
+}
+
+static void rp_gpio_realize(DeviceState *dev, Error **errp)
+{
+    RemotePortGPIO *s = REMOTE_PORT_GPIO(dev);
+    RemotePortDevice *rpd = REMOTE_PORT_DEVICE(dev);
+    unsigned int i;
+
+    rp_register_dev(s->rp, rpd, s->rp_dev);
+
+    s->peer = rp_get_peer(s->rp);
+
+    s->gpio_out = g_new0(qemu_irq, s->num_gpios);
+    qdev_init_gpio_out(dev, s->gpio_out, s->num_gpios);
+    qdev_init_gpio_in(dev, rp_gpio_handler, s->num_gpios);
+
+    for (i = 0; i < s->num_gpios; i++) {
+        sysbus_init_irq(SYS_BUS_DEVICE(s), &s->gpio_out[i]);
+    }
+}
+
+static void rp_prop_allow_set_link(const Object *obj, const char *name,
+                                   Object *val, Error **errp)
+{
+}
+
+static void rp_gpio_init(Object *obj)
+{
+    RemotePortGPIO *rpms = REMOTE_PORT_GPIO(obj);
+
+    object_property_add_link(obj, "rp-adaptor0", "remote-port",
+                             (Object **)&rpms->rp,
+                             rp_prop_allow_set_link,
+                             OBJ_PROP_LINK_STRONG);
+}
+
+static Property rp_properties[] = {
+    DEFINE_PROP_UINT32("rp-chan0", RemotePortGPIO, rp_dev, 0),
+    DEFINE_PROP_UINT32("num-gpios", RemotePortGPIO, num_gpios, 16),
+    DEFINE_PROP_UINT16("cell-offset-irq-num", RemotePortGPIO,
+                       cell_offset_irq_num, 0),
+    DEFINE_PROP_BOOL("posted-updates", RemotePortGPIO, posted_updates, true),
+};
+
+static void rp_gpio_class_init(ObjectClass *oc, const void *data)
+{
+    RemotePortDeviceClass *rpdc = REMOTE_PORT_DEVICE_CLASS(oc);
+    DeviceClass *dc = DEVICE_CLASS(oc);
+    rpdc->ops[RP_CMD_interrupt] = rp_gpio_interrupt;
+    dc->legacy_reset = rp_gpio_reset;
+    dc->realize = rp_gpio_realize;
+    device_class_set_props_n(dc, rp_properties, ARRAY_SIZE(rp_properties));
+}
+
+static const TypeInfo rp_info = {
+    .name          = TYPE_REMOTE_PORT_GPIO,
+    .parent        = TYPE_SYS_BUS_DEVICE,
+    .instance_size = sizeof(RemotePortGPIO),
+    .instance_init = rp_gpio_init,
+    .class_init    = rp_gpio_class_init,
+    .interfaces    = (InterfaceInfo[]) {
+        { TYPE_REMOTE_PORT_DEVICE },
+        { },
+    },
+};
+
+static void rp_register_types(void)
+{
+    type_register_static(&rp_info);
+}
+
+type_init(rp_register_types)
diff --git a/hw/core/trace-events b/hw/core/trace-events
index 475c8439ba..cbf8de6da3 100644
--- a/hw/core/trace-events
+++ b/hw/core/trace-events
@@ -46,3 +46,7 @@ remote_port_memory_master_rx_busaccess(const char *cmd, uint32_t id, uint32_t fl
 # remote-port-memory-slave.c
 remote_port_memory_slave_tx_busaccess(const char *cmd, uint32_t id, uint32_t flags, uint32_t dev, uint64_t addr, uint32_t len, uint64_t attr) "cmd=%s, id=0x%"PRIx32", flags=0x%"PRIx32", dev=0x%"PRIx32", addr=0x%"PRIx64", len=0x%"PRIx32", attr=0x%"PRIx64
 remote_port_memory_slave_rx_busaccess(const char *cmd, uint32_t id, uint32_t flags, uint32_t dev, uint64_t addr, uint32_t len, uint64_t attr) "cmd=%s, id=0x%"PRIx32", flags=0x%"PRIx32", dev=0x%"PRIx32", addr=0x%"PRIx64", len=0x%"PRIx32", attr=0x%"PRIx64
+
+# remote-port-memory-gpio.c
+remote_port_gpio_tx_interrupt(uint32_t id, uint32_t flags, uint32_t dev, uint64_t vector, uint32_t irq, uint32_t val) "id=0x%"PRIx32", flags=0x%"PRIx32", dev=0x%"PRIx32", vector=0x%"PRIx64", irq=0x%"PRIx32", level=0x%"PRIx32
+remote_port_gpio_rx_interrupt(uint32_t id, uint32_t flags, uint32_t dev, uint64_t vector, uint32_t irq, uint32_t val) "id=0x%"PRIx32", flags=0x%"PRIx32", dev=0x%"PRIx32", vector=0x%"PRIx64", irq=0x%"PRIx32", level=0x%"PRIx32
diff --git a/include/hw/core/remote-port-gpio.h b/include/hw/core/remote-port-gpio.h
new file mode 100644
index 0000000000..0079ebfc73
--- /dev/null
+++ b/include/hw/core/remote-port-gpio.h
@@ -0,0 +1,34 @@
+/*
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ *
+ * Copyright (c) 2013 Xilinx Inc
+ * Written by Edgar E. Iglesias <edgar.iglesias@xilinx.com>
+ * Written by Peter Crosthwaite <peter.crosthwaite@xilinx.com>
+ *
+ * This code is licensed under the GNU GPL.
+ */
+#ifndef REMOTE_PORT_GPIO_H
+#define REMOTE_PORT_GPIO_H
+
+#define TYPE_REMOTE_PORT_GPIO "remote-port-gpio"
+#define REMOTE_PORT_GPIO(obj) \
+        OBJECT_CHECK(RemotePortGPIO, (obj), TYPE_REMOTE_PORT_GPIO)
+
+#define MAX_GPIOS 960
+
+typedef struct RemotePortGPIO {
+    /* private */
+    SysBusDevice parent;
+    /* public */
+
+    int8_t cache[MAX_GPIOS];
+    uint32_t num_gpios;
+    qemu_irq *gpio_out;
+    uint16_t cell_offset_irq_num;
+
+    bool posted_updates;
+    uint32_t rp_dev;
+    struct RemotePort *rp;
+    struct rp_peer_state *peer;
+} RemotePortGPIO;
+#endif
-- 
2.43.0



  parent reply	other threads:[~2026-09-15 16:03 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-15 16:00 [PATCH v2 00/20] hw/core: Introduce Remote Port Co-simulation Protocol Ruslan Ruslichenko
2026-09-15 16:00 ` [PATCH v2 01/20] hw/core: Add Remote Port protocol packet definition Ruslan Ruslichenko
2026-09-15 16:00 ` [PATCH v2 02/20] hw/core: Add Remote Port header helpers Ruslan Ruslichenko
2026-09-15 16:00 ` [PATCH v2 03/20] hw/core: Add Remote Port session state and hello protocol Ruslan Ruslichenko
2026-09-15 16:00 ` [PATCH v2 04/20] hw/core: Implement Remote Port bus access helpers Ruslan Ruslichenko
2026-09-15 16:00 ` [PATCH v2 05/20] hw/core: Implement Remote Port irq, sync and ATS helpers Ruslan Ruslichenko
2026-09-15 16:00 ` [PATCH v2 06/20] hw/core: Add Remote Port object skeleton Ruslan Ruslichenko
2026-09-15 16:00 ` [PATCH v2 07/20] hw/core: Add Remote Port protocol thread and handshake Ruslan Ruslichenko
2026-09-15 16:00 ` [PATCH v2 08/20] hw/core: Implement Remote Port response handling Ruslan Ruslichenko
2026-09-15 16:00 ` [PATCH v2 09/20] hw/core: Implement Remote Port time synchronization Ruslan Ruslichenko
2026-09-15 16:00 ` [PATCH v2 10/20] hw/core: Add Remote Port Memory Master object skeleton Ruslan Ruslichenko
2026-09-15 16:00 ` [PATCH v2 11/20] hw/core: Implement Remote Port Memory Master bus transactions Ruslan Ruslichenko
2026-10-13 16:09   ` Philippe Mathieu-Daudé
2026-10-13 16:10     ` Philippe Mathieu-Daudé
2026-10-14  8:24       ` Ruslan Ruslichenko
2026-09-15 16:00 ` [PATCH v2 12/20] system/physmem: Add ats_do_translate helper Ruslan Ruslichenko
2026-10-13 14:27   ` Clément MATHIEU--DRIF
2026-10-14  8:21     ` Ruslan Ruslichenko
2026-09-15 16:00 ` [PATCH v2 13/20] hw/core: Add Remote Port ATS device skeleton Ruslan Ruslichenko
2026-09-15 16:00 ` [PATCH v2 14/20] hw/core: Implement Remote Port ATS logic and cache management Ruslan Ruslichenko
2026-09-15 16:00 ` [PATCH v2 15/20] hw/core: Add Remote Port memory slave device Ruslan Ruslichenko
2026-09-15 16:00 ` Ruslan Ruslichenko [this message]
2026-09-15 16:00 ` [PATCH v2 17/20] hw/core: Add Remote Port Stream device Ruslan Ruslichenko
2026-09-15 16:00 ` [PATCH v2 18/20] hw/core: Add Remote Port files to build Ruslan Ruslichenko
2026-09-15 16:00 ` [PATCH v2 19/20] hw/core: Add FDT support to Remote Port GPIO Ruslan Ruslichenko
2026-09-15 16:00 ` [PATCH v2 20/20] hw/core: Add FDT support to Remote Port memory master Ruslan Ruslichenko
2026-09-28  7:30 ` [PATCH v2 00/20] hw/core: Introduce Remote Port Co-simulation Protocol Ruslan Ruslichenko
2026-10-13 16:17 ` Philippe Mathieu-Daudé

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