From: Eric Farman <farman@linux.ibm.com>
To: qemu-devel@nongnu.org
Cc: qemu-s390x@nongnu.org, Matthew Rosato <mjrosato@linux.ibm.com>,
Cornelia Huck <cohuck@redhat.com>,
Jared Rossi <jrossi@linux.ibm.com>,
Eric Farman <farman@linux.ibm.com>
Subject: [PULL 27/33] s390x/ipl: Add PCI and bus fields to IplBlockQemuScsi
Date: Mon, 21 Sep 2026 16:08:24 -0400 [thread overview]
Message-ID: <20260921200830.1302919-28-farman@linux.ibm.com> (raw)
In-Reply-To: <20260921200830.1302919-1-farman@linux.ibm.com>
From: Jared Rossi <jrossi@linux.ibm.com>
Rather than add a second non-architected IPLB type for scsi-pci devices,
let's add the relevant fields to the existing struct so that it can handle
both PCI and CCW scsi controllers.
The PCI and CCW fields of the IplBlockQemuScsi are aligned with same
offsets as the corresponding fields in IplBlockPci and IplBlockCcw for
potential union access.
Add comments for PCI/CCW specifics and also denote that the S390IplType
enum values must fit in uint8_t.
Reviewed-by: Eric Farman <farman@linux.ibm.com>
Signed-off-by: Jared Rossi <jrossi@linux.ibm.com>
Reviewed-by: Jason J. Herne <jjherne@linux.ibm.com>
Link: https://lore.kernel.org/qemu-devel/20260831194919.3830270-5-jrossi@linux.ibm.com
Signed-off-by: Eric Farman <farman@linux.ibm.com>
---
hw/s390x/ipl.c | 1 +
hw/s390x/ipl.h | 2 ++
include/hw/s390x/ipl/qipl.h | 13 +++++++++----
3 files changed, 12 insertions(+), 4 deletions(-)
diff --git a/hw/s390x/ipl.c b/hw/s390x/ipl.c
index b2b87beefd..4fa8124f92 100644
--- a/hw/s390x/ipl.c
+++ b/hw/s390x/ipl.c
@@ -563,6 +563,7 @@ static bool s390_build_iplb(DeviceState *dev_st, IplParameterBlock *iplb)
iplb->scsi.lun = cpu_to_be32(sd->lun);
iplb->scsi.target = cpu_to_be16(sd->id);
iplb->scsi.channel = cpu_to_be16(sd->channel);
+ iplb->scsi.bus = S390_IPL_TYPE_CCW;
iplb->scsi.devno = cpu_to_be16(ccw_dev->sch->devno);
iplb->scsi.ssid = ccw_dev->sch->ssid & 3;
break;
diff --git a/hw/s390x/ipl.h b/hw/s390x/ipl.h
index 772566bb11..580f42aa4a 100644
--- a/hw/s390x/ipl.h
+++ b/hw/s390x/ipl.h
@@ -86,6 +86,8 @@ struct S390IPLState {
uint16_t devno;
};
QEMU_BUILD_BUG_MSG(offsetof(S390IPLState, iplb) & 3, "alignment of iplb wrong");
+QEMU_BUILD_BUG_MSG(offsetof(IplBlockQemuScsi, fid) != offsetof(IplBlockPci, fid),
+ "iplb fields misaligned across bus types");
static inline bool iplb_valid_len(IplParameterBlock *iplb)
{
diff --git a/include/hw/s390x/ipl/qipl.h b/include/hw/s390x/ipl/qipl.h
index 69b0023ea3..e733c6ce31 100644
--- a/include/hw/s390x/ipl/qipl.h
+++ b/include/hw/s390x/ipl/qipl.h
@@ -29,7 +29,7 @@ enum S390IplType {
S390_IPL_TYPE_CCW = 0x02,
S390_IPL_TYPE_PCI = 0x04,
S390_IPL_TYPE_PV = 0x05,
- S390_IPL_TYPE_QEMU_SCSI = 0xff
+ S390_IPL_TYPE_QEMU_SCSI = 0xff /* Max value, must fit in uint8_t */
};
typedef enum S390IplType S390IplType;
@@ -123,9 +123,14 @@ struct IplBlockQemuScsi {
uint32_t lun;
uint16_t target;
uint16_t channel;
- uint8_t reserved0[77];
- uint8_t ssid;
- uint16_t devno;
+ uint8_t bus;
+ uint8_t reserved0[76];
+ uint8_t ssid; /* CCW only */
+ uint16_t devno; /* CCW only */
+ uint8_t reserved1[216];
+ uint8_t opt; /* PCI only */
+ uint8_t reserved2[3];
+ uint32_t fid; /* PCI only */
} QEMU_PACKED;
typedef struct IplBlockQemuScsi IplBlockQemuScsi;
--
2.55.0
next prev parent reply other threads:[~2026-09-21 20:10 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-21 20:07 [PULL 00/33] s390x queue for 11.2 Eric Farman
2026-09-21 20:07 ` [PULL 01/33] target/s390x: Fix missing privileged flag at PCKMO instruction Eric Farman
2026-09-21 20:07 ` [PULL 02/33] target/s390x: Rework s390 cpacf implementations Eric Farman
2026-09-21 20:08 ` [PULL 03/33] target/s390x: Move cpacf sha512 code into a new file Eric Farman
2026-09-21 20:08 ` [PULL 04/33] target/s390x: Support cpacf sha256 Eric Farman
2026-09-21 20:08 ` [PULL 05/33] target/s390x: Add helper functions for copy memory to and from guest Eric Farman
2026-09-21 20:08 ` [PULL 06/33] target/s390x: Adjust addressing mode checks for sha512 and sha256 Eric Farman
2026-09-21 20:08 ` [PULL 07/33] crypto: Add aes-helpers file to support some AES modes Eric Farman
2026-09-21 20:08 ` [PULL 08/33] target/s390x: Support AES ECB for cpacf km instruction Eric Farman
2026-09-21 20:08 ` [PULL 09/33] target/s390x: Support AES CBC for cpacf kmc instruction Eric Farman
2026-09-21 20:08 ` [PULL 10/33] target/s390x: Support AES CTR for cpacf kmctr instruction Eric Farman
2026-09-21 20:08 ` [PULL 11/33] target/s390x: Minimal AES XTS support for cpacf pcc instruction Eric Farman
2026-09-21 20:08 ` [PULL 12/33] target/s390x: Support AES XTS for cpacf km instruction Eric Farman
2026-09-21 20:08 ` [PULL 13/33] target/s390x: Base support for cpacf protected keys and pckmo Eric Farman
2026-09-21 20:08 ` [PULL 14/33] target/s390x: Support protected key AES ECB for cpacf km instruction Eric Farman
2026-09-21 20:08 ` [PULL 15/33] target/s390x: Support protected key AES CBC for cpacf kmc instruction Eric Farman
2026-09-21 20:08 ` [PULL 16/33] target/s390x: Support protected key AES CTR for cpacf kmctr instruction Eric Farman
2026-09-21 20:08 ` [PULL 17/33] target/s390x: Minimal protected key AES XTS support for cpacf pcc instruction Eric Farman
2026-09-21 20:08 ` [PULL 18/33] target/s390x: Support protected key AES XTS for cpacf km instruction Eric Farman
2026-09-21 20:08 ` [PULL 19/33] docs/s390: Document CPACF instructions support Eric Farman
2026-09-21 20:08 ` [PULL 20/33] tests/tcg/s390x: Add tests for CPACF instructions Eric Farman
2026-09-21 20:08 ` [PULL 21/33] hw/s390x/ipl: Add secure boot support to PCI dev IPLB builder Eric Farman
2026-09-21 20:08 ` [PULL 22/33] tests/functional/s390x/test_secure_ipl: Skip test if SIPL not supported by hypervisor Eric Farman
2026-09-21 20:08 ` [PULL 23/33] tests/functional/s390x/test_secure_ipl: Add virtio-blk-pci boot dev case Eric Farman
2026-09-21 20:08 ` [PULL 24/33] pc-bios/s390-ccw: Check if a PCI function is already enabled before trying to enable it Eric Farman
2026-09-21 20:08 ` [PULL 25/33] hw/s390x/ipl: Fix incorrect PCI IPL block lengths Eric Farman
2026-09-21 20:08 ` [PULL 26/33] pc-bios/s390-ccw: Use bus specific IPL_TYPE directly for scsi IPL Eric Farman
2026-09-21 20:08 ` Eric Farman [this message]
2026-09-21 20:08 ` [PULL 28/33] pc-bios/s390-ccw: Abstract virtio_run() for generic use Eric Farman
2026-09-21 20:08 ` [PULL 29/33] pc-bios/s390-ccw: Add support for virtio-scsi-pci IPL Eric Farman
2026-09-21 20:08 ` [PULL 30/33] s390x: Find scsi-pci boot device and build IPLB Eric Farman
2026-09-21 20:08 ` [PULL 31/33] tests/qtest: Add s390x PCI SCSI fallback test to cdrom-test.c Eric Farman
2026-09-21 20:08 ` [PULL 32/33] s390x/pci: fix DMA slot leak on I/O TLB entry replacement Eric Farman
2026-09-21 20:08 ` [PULL 33/33] pc-bios/s390-ccw.img: update s390x bios Eric Farman
2026-09-22 5:32 ` [PULL 00/33] s390x queue for 11.2 Richard Henderson
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260921200830.1302919-28-farman@linux.ibm.com \
--to=farman@linux.ibm.com \
--cc=cohuck@redhat.com \
--cc=jrossi@linux.ibm.com \
--cc=mjrosato@linux.ibm.com \
--cc=qemu-devel@nongnu.org \
--cc=qemu-s390x@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.