From: Eric Farman <farman@linux.ibm.com>
To: qemu-devel@nongnu.org
Cc: qemu-s390x@nongnu.org, Matthew Rosato <mjrosato@linux.ibm.com>,
Cornelia Huck <cohuck@redhat.com>,
Harald Freudenberger <freude@linux.ibm.com>,
Eric Farman <farman@linux.ibm.com>
Subject: [PULL 07/33] crypto: Add aes-helpers file to support some AES modes
Date: Mon, 21 Sep 2026 16:08:04 -0400 [thread overview]
Message-ID: <20260921200830.1302919-8-farman@linux.ibm.com> (raw)
In-Reply-To: <20260921200830.1302919-1-farman@linux.ibm.com>
From: Harald Freudenberger <freude@linux.ibm.com>
Add a new file crypto/aes-helpers.c with simple functions
to support some AES modes:
- AES cbc: AES_cbc_encrypt() AES_cbc_decrypt()
- AES ctr: AES_ctr_encrypt()
- AES xts: AES_xts_encrypt() AES_xts_decrypt()
and some AES related helpers:
- AES_xor()
- AES_xts_prep_next_tweak()
Add header file include/crypto/aes-helpers.h for these functions
Signed-off-by: Harald Freudenberger <freude@linux.ibm.com>
Reviewed-by: Finn Callies <fcallies@linux.ibm.com>
Reviewed-by: Ilya Leoshkevich <iii@linux.ibm.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Acked-by: Daniel P. Berrangé <berrange@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20260824083204.40877-8-freude@linux.ibm.com
Signed-off-by: Eric Farman <farman@linux.ibm.com>
---
crypto/aes-helpers.c | 106 ++++++++++++++++++++++++++++++++++
crypto/meson.build | 1 +
include/crypto/aes-helpers.h | 109 +++++++++++++++++++++++++++++++++++
3 files changed, 216 insertions(+)
create mode 100644 crypto/aes-helpers.c
create mode 100644 include/crypto/aes-helpers.h
diff --git a/crypto/aes-helpers.c b/crypto/aes-helpers.c
new file mode 100644
index 0000000000..68d848683c
--- /dev/null
+++ b/crypto/aes-helpers.c
@@ -0,0 +1,106 @@
+/*
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ *
+ * AES helper functions and mode implementations
+ *
+ * Authors:
+ * Harald Freudenberger <freude@linux.ibm.com>
+ */
+
+#include "qemu/osdep.h"
+#include "crypto/aes.h"
+#include "crypto/aes-helpers.h"
+
+void AES_xor(const unsigned char *src1, const unsigned char *src2,
+ unsigned char *dst)
+{
+ int i;
+
+ for (i = 0; i < AES_BLOCK_SIZE; i++) {
+ dst[i] = src1[i] ^ src2[i];
+ }
+}
+
+void AES_cbc_encrypt(const unsigned char *in, unsigned char *out,
+ unsigned char *iv, const AES_KEY *key)
+{
+ unsigned char buf[AES_BLOCK_SIZE];
+
+ /* in xor iv => buf */
+ AES_xor(in, iv, buf);
+ /* encrypt buf => out */
+ AES_encrypt(buf, out, key);
+ /* prep iv for next round */
+ memcpy(iv, out, AES_BLOCK_SIZE);
+}
+
+void AES_cbc_decrypt(const unsigned char *in, unsigned char *out,
+ unsigned char *iv, const AES_KEY *key)
+{
+ unsigned char buf[AES_BLOCK_SIZE];
+
+ /* decrypt in => buf */
+ AES_decrypt(in, buf, key);
+ /* buf xor iv => out */
+ AES_xor(buf, iv, out);
+ /* prep iv for next round */
+ memcpy(iv, in, AES_BLOCK_SIZE);
+}
+
+void AES_ctr_encrypt(const unsigned char *in, unsigned char *out,
+ const unsigned char *ctr, const AES_KEY *key)
+{
+ unsigned char buf[AES_BLOCK_SIZE];
+
+ /* encrypt ctr => buf */
+ AES_encrypt(ctr, buf, key);
+ /* exor input data with encrypted ctr => out */
+ AES_xor(in, buf, out);
+}
+
+/*
+ * Tweak calculation for AES XTS.
+ * Multiply tweak by α (x) in GF(2^128) per IEEE 1619-2007. The tweak
+ * is a 128-bit little-endian integer (tweak[0]=LSB, tweak[15]=MSB).
+ * This implementation has been verified on little and big endian.
+ */
+void AES_xts_prep_next_tweak(unsigned char *tweak)
+{
+ unsigned char carry;
+ int i;
+
+ carry = tweak[AES_BLOCK_SIZE - 1] >> 7;
+
+ for (i = AES_BLOCK_SIZE - 1; i > 0; i--) {
+ tweak[i] = (unsigned char)((tweak[i] << 1) | (tweak[i - 1] >> 7));
+ }
+
+ tweak[i] = (unsigned char)(tweak[i] << 1);
+ tweak[i] ^= (unsigned char)(0x87 & (unsigned char)(-(unsigned char)carry));
+}
+
+void AES_xts_encrypt(const unsigned char *in, unsigned char *out,
+ const unsigned char *tweak, const AES_KEY *key)
+{
+ unsigned char buf1[AES_BLOCK_SIZE], buf2[AES_BLOCK_SIZE];
+
+ /* in xor tweak => buf1 */
+ AES_xor(in, tweak, buf1);
+ /* encrypt buf1 => buf2 */
+ AES_encrypt(buf1, buf2, key);
+ /* buf2 xor tweak => out */
+ AES_xor(buf2, tweak, out);
+}
+
+void AES_xts_decrypt(const unsigned char *in, unsigned char *out,
+ const unsigned char *tweak, const AES_KEY *key)
+{
+ unsigned char buf1[AES_BLOCK_SIZE], buf2[AES_BLOCK_SIZE];
+
+ /* in xor tweak => buf1 */
+ AES_xor(in, tweak, buf1);
+ /* encrypt buf1 => buf2 */
+ AES_decrypt(buf1, buf2, key);
+ /* buf2 xor tweak => out */
+ AES_xor(buf2, tweak, out);
+}
diff --git a/crypto/meson.build b/crypto/meson.build
index 15f0bc72e2..bcd598e727 100644
--- a/crypto/meson.build
+++ b/crypto/meson.build
@@ -55,6 +55,7 @@ system_ss.add(when: gnutls, if_true: files('tls-cipher-suites.c'))
util_ss.add(files(
'aes.c',
+ 'aes-helpers.c',
'clmul.c',
'init.c',
'sm4.c',
diff --git a/include/crypto/aes-helpers.h b/include/crypto/aes-helpers.h
new file mode 100644
index 0000000000..9a94c48d86
--- /dev/null
+++ b/include/crypto/aes-helpers.h
@@ -0,0 +1,109 @@
+/*
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ *
+ * AES helper functions and modes
+ */
+
+#ifndef QEMU_AES_HELPERS_H
+#define QEMU_AES_HELPERS_H
+
+/**
+ * AES_xor:
+ * @src1: first source buffer of AES_BLOCK_SIZE bytes
+ * @src2: second source buffer of AES_BLOCK_SIZE bytes
+ * @dst: destination buffer of AES_BLOCK_SIZE bytes
+ *
+ * Bitwise XOR operation between two AES blocks.
+ */
+void AES_xor(const unsigned char *src1, const unsigned char *src2,
+ unsigned char *dst);
+
+/**
+ * AES_cbc_encrypt:
+ * @in: input plaintext block of AES_BLOCK_SIZE bytes
+ * @out: output ciphertext block of AES_BLOCK_SIZE bytes
+ * @iv: IV, updated after processing for chaining
+ * @key: AES key
+ *
+ * Single block AES encrypt in CBC (Cipher Block Chaining) mode.
+ * The input block is XORed with the IV, then encrypted with AES.
+ * IV is updated at the end and is prepared for the next invocation.
+ */
+void AES_cbc_encrypt(const unsigned char *in, unsigned char *out,
+ unsigned char *iv, const AES_KEY *key);
+
+/**
+ * AES_cbc_decrypt:
+ * @in: input ciphertext block of AES_BLOCK_SIZE bytes
+ * @out: output plaintext block of AES_BLOCK_SIZE bytes
+ * @iv: initialization vector, updated to input block for chaining
+ * @key: AES key
+ *
+ * Single block AES decrypt in CBC (Cipher Block Chaining) mode.
+ * The input block is decrypted, then XORed with the IV.
+ * IV is updated at the end and is prepared for the next invocation.
+ */
+void AES_cbc_decrypt(const unsigned char *in, unsigned char *out,
+ unsigned char *iv, const AES_KEY *key);
+
+/**
+ * AES_ctr_encrypt:
+ * @in: input data block of AES_BLOCK_SIZE bytes
+ * @out: output data block of AES_BLOCK_SIZE bytes
+ * @ctr: counter value of AES_BLOCK_SIZE bytes
+ * @key: AES key
+ *
+ * Single block AES encrypt/decrypt in CTR (Counter) mode.
+ * The counter block is encrypted, then XORed with the
+ * input data block.
+ * In CTR mode encrypt and decrypt are identical operations.
+ * Note that the caller is responsible for incrementing the
+ * counter block.
+ */
+void AES_ctr_encrypt(const unsigned char *in, unsigned char *out,
+ const unsigned char *ctr, const AES_KEY *key);
+
+/**
+ * AES_xts_prep_next_tweak:
+ * @tweak: pointer to tweak value to be updated (16 bytes buffer
+ * containing a 128 bit little endian integer)
+ *
+ * Tweak calculation for AES XTS.
+ * Prepares the next tweak value for AES-XTS mode by multiplying
+ * the current tweak by α (x) in GF(2^128) according to IEEE 1619-2007.
+ */
+void AES_xts_prep_next_tweak(unsigned char *tweak);
+
+/**
+ * AES_xts_encrypt:
+ * @in: input plaintext block of AES_BLOCK_SIZE bytes
+ * @out: output ciphertext block of AES_BLOCK_SIZE bytes
+ * @tweak: tweak value (16 bytes)
+ * @key: AES key
+ *
+ * Single block AES encrypt in XTS mode.
+ * The input is XORed with the tweak, encrypted, then XORed with
+ * the tweak again to produce the output.
+ * Note that the caller is responsible for managing the tweak value.
+ * Use AES_xts_prep_next_tweak() to advance the tweak for the next block.
+ */
+void AES_xts_encrypt(const unsigned char *in, unsigned char *out,
+ const unsigned char *tweak, const AES_KEY *key);
+
+/**
+ * AES_xts_decrypt:
+ * @in: input ciphertext block of AES_BLOCK_SIZE bytes
+ * @out: output plaintext block of AES_BLOCK_SIZE bytes
+ * @tweak: tweak value (16 bytes)
+ * @key: AES key
+ *
+ * Single block AES decrypt in XTS mode.
+ * The input is XORed with the tweak, decrypted, then XORed with
+ * the tweak again to produce the output.
+ * Note that the caller is responsible for managing the tweak value.
+ * Use AES_xts_prep_next_tweak() to advance the tweak for the next block.
+ */
+void AES_xts_decrypt(const unsigned char *in, unsigned char *out,
+ const unsigned char *tweak, const AES_KEY *key);
+
+#endif
--
2.55.0
next prev parent reply other threads:[~2026-09-21 20:12 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-21 20:07 [PULL 00/33] s390x queue for 11.2 Eric Farman
2026-09-21 20:07 ` [PULL 01/33] target/s390x: Fix missing privileged flag at PCKMO instruction Eric Farman
2026-09-21 20:07 ` [PULL 02/33] target/s390x: Rework s390 cpacf implementations Eric Farman
2026-09-21 20:08 ` [PULL 03/33] target/s390x: Move cpacf sha512 code into a new file Eric Farman
2026-09-21 20:08 ` [PULL 04/33] target/s390x: Support cpacf sha256 Eric Farman
2026-09-21 20:08 ` [PULL 05/33] target/s390x: Add helper functions for copy memory to and from guest Eric Farman
2026-09-21 20:08 ` [PULL 06/33] target/s390x: Adjust addressing mode checks for sha512 and sha256 Eric Farman
2026-09-21 20:08 ` Eric Farman [this message]
2026-09-21 20:08 ` [PULL 08/33] target/s390x: Support AES ECB for cpacf km instruction Eric Farman
2026-09-21 20:08 ` [PULL 09/33] target/s390x: Support AES CBC for cpacf kmc instruction Eric Farman
2026-09-21 20:08 ` [PULL 10/33] target/s390x: Support AES CTR for cpacf kmctr instruction Eric Farman
2026-09-21 20:08 ` [PULL 11/33] target/s390x: Minimal AES XTS support for cpacf pcc instruction Eric Farman
2026-09-21 20:08 ` [PULL 12/33] target/s390x: Support AES XTS for cpacf km instruction Eric Farman
2026-09-21 20:08 ` [PULL 13/33] target/s390x: Base support for cpacf protected keys and pckmo Eric Farman
2026-09-21 20:08 ` [PULL 14/33] target/s390x: Support protected key AES ECB for cpacf km instruction Eric Farman
2026-09-21 20:08 ` [PULL 15/33] target/s390x: Support protected key AES CBC for cpacf kmc instruction Eric Farman
2026-09-21 20:08 ` [PULL 16/33] target/s390x: Support protected key AES CTR for cpacf kmctr instruction Eric Farman
2026-09-21 20:08 ` [PULL 17/33] target/s390x: Minimal protected key AES XTS support for cpacf pcc instruction Eric Farman
2026-09-21 20:08 ` [PULL 18/33] target/s390x: Support protected key AES XTS for cpacf km instruction Eric Farman
2026-09-21 20:08 ` [PULL 19/33] docs/s390: Document CPACF instructions support Eric Farman
2026-09-21 20:08 ` [PULL 20/33] tests/tcg/s390x: Add tests for CPACF instructions Eric Farman
2026-09-21 20:08 ` [PULL 21/33] hw/s390x/ipl: Add secure boot support to PCI dev IPLB builder Eric Farman
2026-09-21 20:08 ` [PULL 22/33] tests/functional/s390x/test_secure_ipl: Skip test if SIPL not supported by hypervisor Eric Farman
2026-09-21 20:08 ` [PULL 23/33] tests/functional/s390x/test_secure_ipl: Add virtio-blk-pci boot dev case Eric Farman
2026-09-21 20:08 ` [PULL 24/33] pc-bios/s390-ccw: Check if a PCI function is already enabled before trying to enable it Eric Farman
2026-09-21 20:08 ` [PULL 25/33] hw/s390x/ipl: Fix incorrect PCI IPL block lengths Eric Farman
2026-09-21 20:08 ` [PULL 26/33] pc-bios/s390-ccw: Use bus specific IPL_TYPE directly for scsi IPL Eric Farman
2026-09-21 20:08 ` [PULL 27/33] s390x/ipl: Add PCI and bus fields to IplBlockQemuScsi Eric Farman
2026-09-21 20:08 ` [PULL 28/33] pc-bios/s390-ccw: Abstract virtio_run() for generic use Eric Farman
2026-09-21 20:08 ` [PULL 29/33] pc-bios/s390-ccw: Add support for virtio-scsi-pci IPL Eric Farman
2026-09-21 20:08 ` [PULL 30/33] s390x: Find scsi-pci boot device and build IPLB Eric Farman
2026-09-21 20:08 ` [PULL 31/33] tests/qtest: Add s390x PCI SCSI fallback test to cdrom-test.c Eric Farman
2026-09-21 20:08 ` [PULL 32/33] s390x/pci: fix DMA slot leak on I/O TLB entry replacement Eric Farman
2026-09-21 20:08 ` [PULL 33/33] pc-bios/s390-ccw.img: update s390x bios Eric Farman
2026-09-22 5:32 ` [PULL 00/33] s390x queue for 11.2 Richard Henderson
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