From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
To: Leonardo Martins Martins <dev.lmmrtns@gmail.com>
Cc: linux-staging@lists.linux.dev, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 0/3] staging: rtl8723bs: refactor PHY_ConvertTxPowerLimitToPowerIndex()
Date: Fri, 2 Oct 2026 09:55:49 +0200 [thread overview]
Message-ID: <2026100229-cilantro-facing-f434@gregkh> (raw)
In-Reply-To: <ar9fwqJ04CzzSy4L@debian>
On Fri, Oct 02, 2026 at 04:39:46AM -0300, Leonardo Martins Martins wrote:
> > When doing logic refactoring, testing on the real hardware is best.
>
> Makes sense, so should I be dropping patch 2 where the logic is
> refactored, but still do patch 3 where the inner loop is extracted into
> __phy_tx_power_limit_to_index() to reduce all the indentations?
Yes, that's probably best as it's easiest to "prove" it's correct by
just looking at it.
thanks,
greg k-h
prev parent reply other threads:[~2026-10-02 7:55 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-02 4:07 [PATCH v2 0/3] staging: rtl8723bs: refactor PHY_ConvertTxPowerLimitToPowerIndex() Leonardo Martins Martins
2026-10-02 4:07 ` [PATCH v2 1/3] staging: rtl8723bs: rename local vars in phy_tx_power_limit_to_index() Leonardo Martins Martins
2026-10-02 6:09 ` Greg Kroah-Hartman
2026-10-02 7:30 ` Leonardo Martins Martins
2026-10-02 4:07 ` [PATCH v2 2/3] staging: rtl8723bs: access TxPowerByRateBase2_4G directly Leonardo Martins Martins
2026-10-02 4:07 ` [PATCH v2 3/3] staging: rtl8723bs: extract inner loop in phy_tx_power_limit_to_index() Leonardo Martins Martins
2026-10-02 6:10 ` [PATCH v2 0/3] staging: rtl8723bs: refactor PHY_ConvertTxPowerLimitToPowerIndex() Greg Kroah-Hartman
2026-10-02 7:39 ` Leonardo Martins Martins
2026-10-02 7:55 ` Greg Kroah-Hartman [this message]
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