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From: Leonardo Martins Martins <dev.lmmrtns@gmail.com>
To: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: linux-staging@lists.linux.dev, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 0/3] staging: rtl8723bs: refactor PHY_ConvertTxPowerLimitToPowerIndex()
Date: Fri, 2 Oct 2026 04:39:46 -0300	[thread overview]
Message-ID: <ar9fwqJ04CzzSy4L@debian> (raw)
In-Reply-To: <2026100211-scenic-eligibly-58f5@gregkh>

> When doing logic refactoring, testing on the real hardware is best.

Makes sense, so should I be dropping patch 2 where the logic is
refactored, but still do patch 3 where the inner loop is extracted into
__phy_tx_power_limit_to_index() to reduce all the indentations?

Best Regards,
Leonardo Martins

  reply	other threads:[~2026-10-02  7:39 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-02  4:07 [PATCH v2 0/3] staging: rtl8723bs: refactor PHY_ConvertTxPowerLimitToPowerIndex() Leonardo Martins Martins
2026-10-02  4:07 ` [PATCH v2 1/3] staging: rtl8723bs: rename local vars in phy_tx_power_limit_to_index() Leonardo Martins Martins
2026-10-02  6:09   ` Greg Kroah-Hartman
2026-10-02  7:30     ` Leonardo Martins Martins
2026-10-02  4:07 ` [PATCH v2 2/3] staging: rtl8723bs: access TxPowerByRateBase2_4G directly Leonardo Martins Martins
2026-10-02  4:07 ` [PATCH v2 3/3] staging: rtl8723bs: extract inner loop in phy_tx_power_limit_to_index() Leonardo Martins Martins
2026-10-02  6:10 ` [PATCH v2 0/3] staging: rtl8723bs: refactor PHY_ConvertTxPowerLimitToPowerIndex() Greg Kroah-Hartman
2026-10-02  7:39   ` Leonardo Martins Martins [this message]
2026-10-02  7:55     ` Greg Kroah-Hartman

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