[PATCH 0/2] spi: tegra210-quad: Fix timeout path status handling and DMA leak

[Vishwaroop A <va@nvidia.com>]

Two independent fixes in the Tegra QSPI transfer timeout path.

Patch 1 fixes a regression from commit 1ff82c13ea94 ("spi: tegra210-quad:
Cache TRANS_STATUS in ISR for timeout handler"), currently in linux-next
only. When tegra_qspi_handle_timeout() observes a real ISR completion
after draining the workqueue, it still publishes the pre-drain lost-IRQ
FIFO snapshot. That snapshot can hold zeroed error bits if the ISR
W1C-ed the hardware between the two reads, which makes the manual
completion handler downstream accept a transfer that actually reported a
FIFO underflow or overflow. No stable backport is needed because the
offending commit has not been released.

Patch 2 fixes a DMA mapping leak present since the driver was added.
tegra_qspi_dma_map_xfer() maps the client TX/RX buffers, but the only
unmap lives in handle_dma_based_xfer(), which runs from the interrupt
bottom half. On a genuine timeout the bottom half never runs and both
transfer paths abort with tegra_qspi_dma_stop() plus a controller reset
without unmapping, so every real timeout leaks the streaming mappings
for that chunk. On systems with an IOMMU in front of QSPI this
gradually exhausts the IOVA space. This one is tagged for stable.

Both issues surfaced while reviewing a downstream backport of the
hard-IRQ series now in linux-next; patch 1 carries the corresponding
Reported-by and Link tags.

Vishwaroop A (2):
  spi: tegra210-quad: don't overwrite refreshed status with lost-IRQ
    snapshot
  spi: tegra210-quad: Unmap DMA buffers on transfer timeout

 drivers/spi/spi-tegra210-quad.c | 21 +++++++++++++++++----
 1 file changed, 17 insertions(+), 4 deletions(-)

-- 
2.17.1