From: George Neacsu <geocausa@gmail.com>
To: Bryan O'Donoghue <bod@kernel.org>
Cc: Vinod Koul <vkoul@kernel.org>, David Heidelberg <david@ixit.cz>,
Neil Armstrong <neil.armstrong@linaro.org>,
Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>,
Loic Poulain <loic.poulain@oss.qualcomm.com>,
Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>,
Nihal Kumar Gupta <nihal.gupta@oss.qualcomm.com>,
Vikram Sharma <vikram.sharma@oss.qualcomm.com>,
Suresh Vankadara <svankada@qti.qualcomm.com>,
tjose@qti.qualcomm.com,
Mauro Carvalho Chehab <mchehab@kernel.org>,
Manivannan Sadhasivam <mani@kernel.org>,
linux-phy@lists.infradead.org, linux-media@vger.kernel.org,
linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 0/6] phy: qcom-mipi-csi2: C-PHY for X1E80100
Date: Fri, 16 Oct 2026 22:48:30 +0100 [thread overview]
Message-ID: <20261016214830.967217-1-geocausa@gmail.com> (raw)
In-Reply-To: <5a90fbdc-7106-45e3-8fca-eaf5c60e0337@kernel.org>
Hi Bryan,
On 16/10/2026 17:09, Bryan O'Donoghue wrote:
> Using drivers/phy means not doing CPHY inline in CAMSS. If you require
> patches from the V9 series - you should cherry-pick them - sign off them
> and the post them.
Understood. The two CAMSS patches need only three of David's nine
patches, and none of his CSIPHY C-PHY tables:
- 2/9, which keeps the endpoint's bus type in the lane configuration;
- 4/9, which adds the CSID PHY select for C-PHY;
- 8/9, which lets camss_get_link_freq() account for C-PHY symbols.
The other six program C-PHY inline in camss-csiphy-3ph-1-0.c, which the
PHY API path does not use.
So the CAMSS side will go out as one series on top of this one: those
three, kept under David's authorship with my sign-off added, followed
by the two CAMSS patches. David, is that all right with you?
Thanks,
George
WARNING: multiple messages have this Message-ID (diff)
From: George Neacsu <geocausa@gmail.com>
To: Bryan O'Donoghue <bod@kernel.org>
Cc: Vinod Koul <vkoul@kernel.org>, David Heidelberg <david@ixit.cz>,
Neil Armstrong <neil.armstrong@linaro.org>,
Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>,
Loic Poulain <loic.poulain@oss.qualcomm.com>,
Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>,
Nihal Kumar Gupta <nihal.gupta@oss.qualcomm.com>,
Vikram Sharma <vikram.sharma@oss.qualcomm.com>,
Suresh Vankadara <svankada@qti.qualcomm.com>,
tjose@qti.qualcomm.com,
Mauro Carvalho Chehab <mchehab@kernel.org>,
Manivannan Sadhasivam <mani@kernel.org>,
linux-phy@lists.infradead.org, linux-media@vger.kernel.org,
linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 0/6] phy: qcom-mipi-csi2: C-PHY for X1E80100
Date: Fri, 16 Oct 2026 22:48:30 +0100 [thread overview]
Message-ID: <20261016214830.967217-1-geocausa@gmail.com> (raw)
In-Reply-To: <5a90fbdc-7106-45e3-8fca-eaf5c60e0337@kernel.org>
Hi Bryan,
On 16/10/2026 17:09, Bryan O'Donoghue wrote:
> Using drivers/phy means not doing CPHY inline in CAMSS. If you require
> patches from the V9 series - you should cherry-pick them - sign off them
> and the post them.
Understood. The two CAMSS patches need only three of David's nine
patches, and none of his CSIPHY C-PHY tables:
- 2/9, which keeps the endpoint's bus type in the lane configuration;
- 4/9, which adds the CSID PHY select for C-PHY;
- 8/9, which lets camss_get_link_freq() account for C-PHY symbols.
The other six program C-PHY inline in camss-csiphy-3ph-1-0.c, which the
PHY API path does not use.
So the CAMSS side will go out as one series on top of this one: those
three, kept under David's authorship with my sign-off added, followed
by the two CAMSS patches. David, is that all right with you?
Thanks,
George
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
next prev parent reply other threads:[~2026-10-16 21:48 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-16 14:56 [PATCH v3 0/6] phy: qcom-mipi-csi2: C-PHY for X1E80100 George Neacsu via B4 Relay
2026-10-16 14:56 ` George Neacsu
2026-10-16 14:56 ` George Neacsu via B4 Relay
2026-10-16 14:56 ` [PATCH v3 1/6] phy: Add MIPI C-PHY mode and configuration options George Neacsu via B4 Relay
2026-10-16 14:56 ` George Neacsu
2026-10-16 14:56 ` George Neacsu via B4 Relay
2026-10-16 14:56 ` [PATCH v3 2/6] phy: Add MIPI C-PHY configuration helpers George Neacsu via B4 Relay
2026-10-16 14:56 ` George Neacsu
2026-10-16 14:56 ` George Neacsu via B4 Relay
2026-10-16 14:56 ` [PATCH v3 3/6] phy: qcom-mipi-csi2: Rename the D-PHY init sequence George Neacsu via B4 Relay
2026-10-16 14:56 ` George Neacsu
2026-10-16 14:56 ` George Neacsu via B4 Relay
2026-10-16 14:56 ` [PATCH v3 4/6] phy: qcom-mipi-csi2: Add lane mask and lane polarity helpers George Neacsu via B4 Relay
2026-10-16 14:56 ` George Neacsu
2026-10-16 14:56 ` George Neacsu via B4 Relay
2026-10-16 14:56 ` [PATCH v3 5/6] phy: qcom-mipi-csi2: Use fsleep() for init sequence delays George Neacsu via B4 Relay
2026-10-16 14:56 ` George Neacsu
2026-10-16 14:56 ` George Neacsu via B4 Relay
2026-10-16 14:56 ` [PATCH v3 6/6] phy: qcom-mipi-csi2: Add C-PHY support for X1E80100 George Neacsu via B4 Relay
2026-10-16 14:56 ` George Neacsu
2026-10-16 14:56 ` George Neacsu via B4 Relay
2026-10-16 15:10 ` David Heidelberg
2026-10-16 15:10 ` David Heidelberg
2026-10-16 16:08 ` George Neacsu
2026-10-16 16:08 ` George Neacsu
2026-10-16 16:09 ` [PATCH v3 0/6] phy: qcom-mipi-csi2: C-PHY " Bryan O'Donoghue
2026-10-16 16:09 ` Bryan O'Donoghue
2026-10-16 21:48 ` George Neacsu [this message]
2026-10-16 21:48 ` George Neacsu
2026-10-16 22:04 ` David Heidelberg
2026-10-16 22:04 ` David Heidelberg
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