* [PATCH 1/4] drm/amdgpu/jpeg_v1_0: allow type4 commands
@ 2026-10-19 20:07 Benjamin Cheng
2026-10-19 20:07 ` [PATCH 2/4] drm/amdgpu/jpeg_v2_0: set only IB_RD_VMID to 0 Benjamin Cheng
` (2 more replies)
0 siblings, 3 replies; 5+ messages in thread
From: Benjamin Cheng @ 2026-10-19 20:07 UTC (permalink / raw)
To: Alex Deucher, Christian König, amd-gfx
Cc: Leo Liu, Ruijing Dong, David Rosca, Boyuan Zhang, Benjamin Cheng
Packet type 4 is used for conditional memory write and can be used to
allow a memory write from within the IB.
This write is done through IB_WR_VMID, which previously was set to 0 if
we do IB parsing. After programming the VMIDs correctly we can enable
packet type 4 with no issues.
Signed-off-by: Benjamin Cheng <benjamin.cheng@amd.com>
---
drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.c | 12 ++++++++----
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.c
index b5bb7f4d607c..81facb99d885 100644
--- a/drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.c
@@ -301,13 +301,14 @@ static void jpeg_v1_0_decode_ring_emit_ib(struct amdgpu_ring *ring,
{
struct amdgpu_device *adev = ring->adev;
unsigned vmid = AMDGPU_JOB_GET_VMID(job);
+ uint32_t reg;
+ reg = vmid << UVD_LMI_JRBC_IB_VMID__IB_WR_VMID__SHIFT;
+ if (!ring->funcs->parse_cs)
+ reg |= (vmid << UVD_LMI_JRBC_IB_VMID__IB_RD_VMID__SHIFT);
amdgpu_ring_write(ring,
PACKETJ(SOC15_REG_OFFSET(JPEG, 0, mmUVD_LMI_JRBC_IB_VMID), 0, 0, PACKETJ_TYPE0));
- if (ring->funcs->parse_cs)
- amdgpu_ring_write(ring, 0);
- else
- amdgpu_ring_write(ring, (vmid | (vmid << 4)));
+ amdgpu_ring_write(ring, reg);
amdgpu_ring_write(ring,
PACKETJ(SOC15_REG_OFFSET(JPEG, 0, mmUVD_LMI_JPEG_VMID), 0, 0, PACKETJ_TYPE0));
@@ -669,6 +670,9 @@ static int jpeg_v1_dec_ring_parse_cs(struct amdgpu_cs_parser *parser,
if (reg != JPEG_V1_REG_SOFT_RESET)
ret = -EINVAL;
break;
+ case PACKETJ_TYPE4:
+ /* Allow any wait reg */
+ break;
case PACKETJ_TYPE6:
if (ib->ptr[i] != CP_PACKETJ_NOP)
ret = -EINVAL;
--
2.56.0
^ permalink raw reply related [flat|nested] 5+ messages in thread* [PATCH 2/4] drm/amdgpu/jpeg_v2_0: set only IB_RD_VMID to 0
2026-10-19 20:07 [PATCH 1/4] drm/amdgpu/jpeg_v1_0: allow type4 commands Benjamin Cheng
@ 2026-10-19 20:07 ` Benjamin Cheng
2026-10-19 20:07 ` [PATCH 3/4] drm/amdgpu/jpeg_v4_0_3: " Benjamin Cheng
2026-10-19 20:07 ` [PATCH 4/4] drm/amdgpu/jpeg: allow type 4 commands Benjamin Cheng
2 siblings, 0 replies; 5+ messages in thread
From: Benjamin Cheng @ 2026-10-19 20:07 UTC (permalink / raw)
To: Alex Deucher, Christian König, amd-gfx
Cc: Leo Liu, Ruijing Dong, David Rosca, Boyuan Zhang, Benjamin Cheng
If IB parsing is done by kernel, the IB will need to be read from VMID 0.
However, memory read/write operations from within the IB should stay in
the job's VMID. This will allow us to enable packet type 4.
Signed-off-by: Benjamin Cheng <benjamin.cheng@amd.com>
---
drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c | 11 ++++++-----
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c
index 72069b77f6f1..eb26c21de532 100644
--- a/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c
@@ -557,18 +557,19 @@ void jpeg_v2_0_dec_ring_emit_ib(struct amdgpu_ring *ring,
uint32_t flags)
{
unsigned vmid = AMDGPU_JOB_GET_VMID(job);
+ uint32_t reg;
amdgpu_ring_write(ring, PACKETJ(mmUVD_JPEG_IH_CTRL_INTERNAL_OFFSET,
0, 0, PACKETJ_TYPE0));
amdgpu_ring_write(ring, (vmid << JPEG_IH_CTRL__IH_VMID__SHIFT));
+ reg = (vmid << UVD_LMI_JRBC_IB_VMID__IB_WR_VMID__SHIFT) |
+ (vmid << UVD_LMI_JRBC_IB_VMID__MEM_RD_VMID__SHIFT);
+ if (!ring->funcs->parse_cs)
+ reg |= (vmid << UVD_LMI_JRBC_IB_VMID__IB_RD_VMID__SHIFT);
amdgpu_ring_write(ring, PACKETJ(mmUVD_LMI_JRBC_IB_VMID_INTERNAL_OFFSET,
0, 0, PACKETJ_TYPE0));
-
- if (ring->funcs->parse_cs)
- amdgpu_ring_write(ring, 0);
- else
- amdgpu_ring_write(ring, (vmid | (vmid << 4) | (vmid << 8)));
+ amdgpu_ring_write(ring, reg);
amdgpu_ring_write(ring, PACKETJ(mmUVD_LMI_JPEG_VMID_INTERNAL_OFFSET,
0, 0, PACKETJ_TYPE0));
--
2.56.0
^ permalink raw reply related [flat|nested] 5+ messages in thread* [PATCH 3/4] drm/amdgpu/jpeg_v4_0_3: set only IB_RD_VMID to 0
2026-10-19 20:07 [PATCH 1/4] drm/amdgpu/jpeg_v1_0: allow type4 commands Benjamin Cheng
2026-10-19 20:07 ` [PATCH 2/4] drm/amdgpu/jpeg_v2_0: set only IB_RD_VMID to 0 Benjamin Cheng
@ 2026-10-19 20:07 ` Benjamin Cheng
2026-10-19 20:55 ` David Wu
2026-10-19 20:07 ` [PATCH 4/4] drm/amdgpu/jpeg: allow type 4 commands Benjamin Cheng
2 siblings, 1 reply; 5+ messages in thread
From: Benjamin Cheng @ 2026-10-19 20:07 UTC (permalink / raw)
To: Alex Deucher, Christian König, amd-gfx
Cc: Leo Liu, Ruijing Dong, David Rosca, Boyuan Zhang, Benjamin Cheng
If IB parsing is done by kernel, the IB will need to be read from VMID 0.
However, memory read/write operations from within the IB should stay in
the job's VMID. This will allow us to enable packet type 4.
Signed-off-by: Benjamin Cheng <benjamin.cheng@amd.com>
---
drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c | 15 ++++++---------
1 file changed, 6 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c
index 0343a64595f2..0c25ee443fa7 100644
--- a/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c
+++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c
@@ -892,18 +892,15 @@ void jpeg_v4_0_3_dec_ring_emit_ib(struct amdgpu_ring *ring,
uint32_t flags)
{
unsigned int vmid = AMDGPU_JOB_GET_VMID(job);
+ uint32_t reg;
+ reg = (vmid << UVD_JMI0_UVD_LMI_JRBC_IB_VMID__IB_WR_VMID_MASK) |
+ (vmid << UVD_JMI0_UVD_LMI_JRBC_IB_VMID__MEM_RD_VMID__SHIFT);
+ if (!ring->funcs->parse_cs)
+ reg |= (vmid << UVD_JMI0_UVD_LMI_JRBC_IB_VMID__IB_RD_VMID__SHIFT);
amdgpu_ring_write(ring, PACKETJ(regUVD_LMI_JRBC_IB_VMID_INTERNAL_OFFSET,
0, 0, PACKETJ_TYPE0));
-
- if (ring->funcs->parse_cs)
- amdgpu_ring_write(ring, 0);
- else
- amdgpu_ring_write(ring, (vmid | (vmid << 4) | (vmid << 8)));
-
- amdgpu_ring_write(ring, PACKETJ(regUVD_LMI_JPEG_VMID_INTERNAL_OFFSET,
- 0, 0, PACKETJ_TYPE0));
- amdgpu_ring_write(ring, (vmid | (vmid << 4) | (vmid << 8)));
+ amdgpu_ring_write(ring, reg);
amdgpu_ring_write(ring, PACKETJ(regUVD_LMI_JRBC_IB_64BIT_BAR_LOW_INTERNAL_OFFSET,
0, 0, PACKETJ_TYPE0));
--
2.56.0
^ permalink raw reply related [flat|nested] 5+ messages in thread* Re: [PATCH 3/4] drm/amdgpu/jpeg_v4_0_3: set only IB_RD_VMID to 0
2026-10-19 20:07 ` [PATCH 3/4] drm/amdgpu/jpeg_v4_0_3: " Benjamin Cheng
@ 2026-10-19 20:55 ` David Wu
0 siblings, 0 replies; 5+ messages in thread
From: David Wu @ 2026-10-19 20:55 UTC (permalink / raw)
To: amd-gfx
[-- Attachment #1: Type: text/plain, Size: 1753 bytes --]
On 2026-10-19 16:07, Benjamin Cheng wrote:
> If IB parsing is done by kernel, the IB will need to be read from VMID 0.
> However, memory read/write operations from within the IB should stay in
> the job's VMID. This will allow us to enable packet type 4.
>
> Signed-off-by: Benjamin Cheng<benjamin.cheng@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c | 15 ++++++---------
> 1 file changed, 6 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c
> index 0343a64595f2..0c25ee443fa7 100644
> --- a/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c
> +++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c
> @@ -892,18 +892,15 @@ void jpeg_v4_0_3_dec_ring_emit_ib(struct amdgpu_ring *ring,
> uint32_t flags)
> {
> unsigned int vmid = AMDGPU_JOB_GET_VMID(job);
> + uint32_t reg;
>
> + reg = (vmid << UVD_JMI0_UVD_LMI_JRBC_IB_VMID__IB_WR_VMID_MASK) |
> + (vmid << UVD_JMI0_UVD_LMI_JRBC_IB_VMID__MEM_RD_VMID__SHIFT);
> + if (!ring->funcs->parse_cs)
> + reg |= (vmid << UVD_JMI0_UVD_LMI_JRBC_IB_VMID__IB_RD_VMID__SHIFT);
> amdgpu_ring_write(ring, PACKETJ(regUVD_LMI_JRBC_IB_VMID_INTERNAL_OFFSET,
> 0, 0, PACKETJ_TYPE0));
> -
> - if (ring->funcs->parse_cs)
> - amdgpu_ring_write(ring, 0);
> - else
> - amdgpu_ring_write(ring, (vmid | (vmid << 4) | (vmid << 8)));
> -
> - amdgpu_ring_write(ring, PACKETJ(regUVD_LMI_JPEG_VMID_INTERNAL_OFFSET,
> - 0, 0, PACKETJ_TYPE0));
is this removal of regUVD_LMI_JPEG_VMID_INTERNAL_OFFSET intended?
> - amdgpu_ring_write(ring, (vmid | (vmid << 4) | (vmid << 8)));
> + amdgpu_ring_write(ring, reg);
>
> amdgpu_ring_write(ring, PACKETJ(regUVD_LMI_JRBC_IB_64BIT_BAR_LOW_INTERNAL_OFFSET,
> 0, 0, PACKETJ_TYPE0));
[-- Attachment #2: Type: text/html, Size: 2307 bytes --]
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH 4/4] drm/amdgpu/jpeg: allow type 4 commands
2026-10-19 20:07 [PATCH 1/4] drm/amdgpu/jpeg_v1_0: allow type4 commands Benjamin Cheng
2026-10-19 20:07 ` [PATCH 2/4] drm/amdgpu/jpeg_v2_0: set only IB_RD_VMID to 0 Benjamin Cheng
2026-10-19 20:07 ` [PATCH 3/4] drm/amdgpu/jpeg_v4_0_3: " Benjamin Cheng
@ 2026-10-19 20:07 ` Benjamin Cheng
2 siblings, 0 replies; 5+ messages in thread
From: Benjamin Cheng @ 2026-10-19 20:07 UTC (permalink / raw)
To: Alex Deucher, Christian König, amd-gfx
Cc: Leo Liu, Ruijing Dong, David Rosca, Boyuan Zhang, Benjamin Cheng
Packet type 4 is used for conditional memory write and can be used to
allow a memory write from within the IB. Now that the vmid's are set up
correctly (IB_WR_VMID is set to the job's vmid), we can enable this with
no issues.
Signed-off-by: Benjamin Cheng <benjamin.cheng@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c
index 87f879a2e4f4..2b0e658b63b6 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c
@@ -595,6 +595,12 @@ int amdgpu_jpeg_dec_parse_cs(struct amdgpu_cs_parser *parser,
return -EINVAL;
}
break;
+ case PACKETJ_TYPE4:
+ if (!amdgpu_jpeg_reg_valid(reg)) {
+ dev_err(adev->dev, "Invalid packet [0x%08x]!\n", ib->ptr[i]);
+ return -EINVAL;
+ }
+ break;
case PACKETJ_TYPE6:
if (ib->ptr[i] == CP_PACKETJ_NOP)
continue;
--
2.56.0
^ permalink raw reply related [flat|nested] 5+ messages in thread
end of thread, other threads:[~2026-10-19 20:55 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-10-19 20:07 [PATCH 1/4] drm/amdgpu/jpeg_v1_0: allow type4 commands Benjamin Cheng
2026-10-19 20:07 ` [PATCH 2/4] drm/amdgpu/jpeg_v2_0: set only IB_RD_VMID to 0 Benjamin Cheng
2026-10-19 20:07 ` [PATCH 3/4] drm/amdgpu/jpeg_v4_0_3: " Benjamin Cheng
2026-10-19 20:55 ` David Wu
2026-10-19 20:07 ` [PATCH 4/4] drm/amdgpu/jpeg: allow type 4 commands Benjamin Cheng
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