[PATCH v1 0/3] net: mtk_eth: an8855: fix packet loss and sync with Linux

[Mikhail Zhilkin <csharper2005@gmail.com>]

This patch series aligns the U-Boot Airoha AN8855 switch initialization
code with the upstream Linux DSA driver
(drivers/net/dsa/airoha/an8855.c), fixing several register configuration
bugs and improving overall signal integrity.

The current default U-Boot configuration leaves the SerDes with marginal
drive characteristics. On some hardware iterations, this results in
severe packet loss (50-60%) and timeouts during TFTP recovery. This drop
occurs because of marginal signal integrity on the internal 2500Base-X
link connecting the switch to the CPU.

By correcting a bitwise shift overlap, enabling link error recovery, and
applying the proper TX FIR / RX CDR analog tuning parameters used in
Linux, this series ensures a stable physical link between the CPU and
switch across different boards.

These changes have been run-tested on the CMCC RAX3000ME and Xiaomi
AX3000T, both featuring the AN8855 switch, confirming stable network
operation and reliable gigabit TFTP recovery.

Patch summary:
- Patch 1 fixes a bitwise collision bug in the AN8855_RX_CTRL_8 register
  that was accidentally overwriting previously set bits.
- Patch 2 enables graceful link error recovery in AN8855_RX_CTRL_26
  instead of explicitly disabling it.
- Patch 3 ports the SerDes analog tuning parameters (TX Eye and RX
  Jitter Tolerance) from Linux, resolving the packet loss issue on the
  internal 2.5G CPU port.

Mikhail Zhilkin (3):
  net: mtk_eth: an8855: fix bitwise collision in RX_CTRL_8 register
  net: mtk_eth: an8855: enable link error recovery
  net: mtk_eth: an8855: sync SerDes analog tuning with Linux driver

 drivers/net/mtk_eth/an8855.c | 31 ++++++++++++++++++++++++++++---
 1 file changed, 28 insertions(+), 3 deletions(-)

-- 
2.53.0