From: Mikhail Zhilkin <csharper2005@gmail.com>
To: u-boot@lists.u-boot-project.org
Cc: jerome.forissier@arm.com, ryder.lee@mediatek.com,
weijie.gao@mediatek.com, chunfeng.yun@mediatek.com,
igor.belwon@mentallysanemainliners.org, dlechner@baylibre.com,
jstephan@baylibre.com, GSS_MTK_Uboot_upstream@mediatek.com,
trini@konsulko.com, Mikhail Zhilkin <csharper2005@gmail.com>
Subject: [PATCH v1 1/3] net: mtk_eth: an8855: fix bitwise collision in RX_CTRL_8 register
Date: Sat, 7 Nov 2026 17:24:38 +0300 [thread overview]
Message-ID: <20261107142441.2104669-2-csharper2005@gmail.com> (raw)
In-Reply-To: <20261107142441.2104669-1-csharper2005@gmail.com>
In an8855_port_sgmii_init(), the bitwise operations for
the AN8855_RX_CTRL_8 register contain a shifting error. The code
attempts to set a value at shift 16 (0x200 << 16), but subsequently
applies a mask and value shifted by 14 (0xfff << 14). This creates a
bitwise collision where the second operation overlaps and overwrites the
bits configured by the first operation, resulting in unintended register
values.
Fix the shift offset for the lower bits from 14 to 0 to prevent
overlap and correctly apply the exact values used in the upstream
Linux driver.
Signed-off-by: Mikhail Zhilkin <csharper2005@gmail.com>
---
drivers/net/mtk_eth/an8855.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/mtk_eth/an8855.c b/drivers/net/mtk_eth/an8855.c
index a2589a2ad31..eb037ec1382 100644
--- a/drivers/net/mtk_eth/an8855.c
+++ b/drivers/net/mtk_eth/an8855.c
@@ -627,8 +627,8 @@ static int an8855_port_sgmii_init(struct an8855_switch_priv *priv, u32 port)
an8855_reg_read(priv, AN8855_RX_CTRL_8, &val);
val &= ~(0xfff << 16);
val |= (0x200 << 16);
- val &= ~(0x7fff << 14);
- val |= (0xfff << 14);
+ val &= ~(0x7fff << 0);
+ val |= (0xfff << 0);
an8855_reg_write(priv, AN8855_RX_CTRL_8, val);
/* Frequency memter */
--
2.53.0
next prev parent reply other threads:[~2026-11-07 14:33 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-07 14:24 [PATCH v1 0/3] net: mtk_eth: an8855: fix packet loss and sync with Linux Mikhail Zhilkin
2026-11-07 14:24 ` Mikhail Zhilkin [this message]
2026-11-09 21:23 ` [PATCH v1 1/3] net: mtk_eth: an8855: fix bitwise collision in RX_CTRL_8 register David Lechner
2026-11-07 14:24 ` [PATCH v1 2/3] net: mtk_eth: an8855: enable link error recovery Mikhail Zhilkin
2026-11-09 21:23 ` David Lechner
2026-11-07 14:24 ` [PATCH v1 3/3] net: mtk_eth: an8855: sync SerDes analog tuning with Linux driver Mikhail Zhilkin
2026-11-09 21:25 ` David Lechner
2026-11-09 21:23 ` [PATCH v1 0/3] net: mtk_eth: an8855: fix packet loss and sync with Linux David Lechner
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