[RFC PATCH 0/6] drm/gma500: prepare GEM and MMU for 3D rendering and hybrid 2D

[Gabriel Gama <operatingsystemsdepression@gmail.com>]

Hi,

These six patches prepare the existing gma500 GEM/MMU code for future
SGX535 3D and hybrid CPU/GPU 2D. They target Linux 7.4-rc2
(7475ea8b58616b33c04afb976cf0fbaad9dd63fb), enable neither acceleration path
and add no rendering ABI or command submission.

Display GTT and SGX page tables keep their existing, separate roles. The
series fixes sizing, unpin underflow and page-table cache-flush lifetime,
makes MMU insertion transactional and propagates setup/pin failures.
Review of the rollback and ownership assumptions would be appreciated.

Offline validation ran in Debian AArch64 userspace under PRoot: i386 LLVM19
W=1 full kernel link with HIGHMEM4G, plus native/UBSan CPU tests. All nine
MMU KUnit cases passed in a separate i386 QEMU TCG guest. Checkpatch reports
zero errors and one MAINTAINERS advisory on the already-covered test file.
Physical Mini12 testing has NOT been performed; display, suspend/removal
and SGX cache visibility remain unqualified. Historical GPU results do
not qualify this series.

Patch list:
  1. Use the common dumb-buffer size helper.
  2. Prevent GEM unpin underflow.
  3. Fix SGX page-table cache-flush mapping lifetime.
  4. Make MMU insertion checked and transactional.
  5. Propagate MMU setup and GEM pin failures.
  6. Add software-only MMU KUnit coverage.

Thanks,
Gabriel Gama