From: Gabriel Gama <operatingsystemsdepression@gmail.com>
To: dri-devel@lists.freedesktop.org
Cc: patrik.r.jakobsson@gmail.com,
Gabriel Gama <operatingsystemsdepression@gmail.com>
Subject: [RFC PATCH 6/6] drm/gma500: Add software-only KUnit coverage for SGX page tables
Date: Mon, 9 Nov 2026 02:54:50 -0300 [thread overview]
Message-ID: <20261109055451.17458-7-operatingsystemsdepression@gmail.com> (raw)
In-Reply-To: <20261109055451.17458-1-operatingsystemsdepression@gmail.com>
Add KUnit cases for invalid ranges and tiles, the final GPU page,
directory crossings, PFN limits, collision rollback and removal holes.
The optional built-in fixture uses a software page directory with no DRM
device and hw_context=-1. It performs no MMIO or GPU submission.
Signed-off-by: Gabriel Gama <operatingsystemsdepression@gmail.com>
---
drivers/gpu/drm/gma500/Kconfig | 10 ++
drivers/gpu/drm/gma500/Makefile | 2 +
drivers/gpu/drm/gma500/mmu_test.c | 222 ++++++++++++++++++++++++++++++
3 files changed, 234 insertions(+)
create mode 100644 drivers/gpu/drm/gma500/mmu_test.c
diff --git a/drivers/gpu/drm/gma500/Kconfig b/drivers/gpu/drm/gma500/Kconfig
index dc4c56638..b6e2dda13 100644
--- a/drivers/gpu/drm/gma500/Kconfig
+++ b/drivers/gpu/drm/gma500/Kconfig
@@ -16,3 +16,13 @@ config DRM_GMA500
Say yes for an experimental 2D KMS framebuffer driver for the
Intel GMA500 (Poulsbo), Intel GMA600 (Moorestown/Oak Trail) and
Intel GMA3600/3650 (Cedar Trail).
+
+config DRM_GMA500_KUNIT_TEST
+ bool "KUnit tests for the GMA500 SGX page tables" if !KUNIT_ALL_TESTS
+ depends on DRM_GMA500=y && KUNIT=y
+ default KUNIT_ALL_TESTS
+ help
+ Run software-only tests for SGX page-table range validation,
+ rollback, mapping collisions and removal. The tests use a software
+ page directory with no device or hardware context, and never
+ submit commands to the GPU or access its registers.
diff --git a/drivers/gpu/drm/gma500/Makefile b/drivers/gpu/drm/gma500/Makefile
index 58fed80c7..069400d70 100644
--- a/drivers/gpu/drm/gma500/Makefile
+++ b/drivers/gpu/drm/gma500/Makefile
@@ -39,4 +39,6 @@ gma500_gfx-y += \
gma500_gfx-$(CONFIG_ACPI) += opregion.o
gma500_gfx-$(CONFIG_DRM_FBDEV_EMULATION) += fbdev.o
+gma500_gfx-$(CONFIG_DRM_GMA500_KUNIT_TEST) += mmu_test.o
+
obj-$(CONFIG_DRM_GMA500) += gma500_gfx.o
diff --git a/drivers/gpu/drm/gma500/mmu_test.c b/drivers/gpu/drm/gma500/mmu_test.c
new file mode 100644
index 000000000..0581c7d9a
--- /dev/null
+++ b/drivers/gpu/drm/gma500/mmu_test.c
@@ -0,0 +1,222 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/* SGX page-table tests. No device, hardware context, or MMIO is required. */
+#include <kunit/test.h>
+#include <linux/highmem.h>
+
+#include "mmu.h"
+#include "psb_drv.h"
+
+struct psb_mmu_test_context {
+ struct psb_mmu_driver driver;
+ struct psb_mmu_pd *pd;
+ struct page *pages[4];
+};
+
+static int psb_mmu_test_init(struct kunit *test)
+{
+ struct psb_mmu_test_context *ctx;
+ int i;
+
+ ctx = kunit_kzalloc(test, sizeof(*ctx), GFP_KERNEL);
+ if (!ctx)
+ return -ENOMEM;
+ test->priv = ctx;
+ spin_lock_init(&ctx->driver.lock);
+ init_rwsem(&ctx->driver.sem);
+ ctx->pd = psb_mmu_alloc_pd(&ctx->driver, 1, 0);
+ if (!ctx->pd)
+ return -ENOMEM;
+ for (i = 0; i < ARRAY_SIZE(ctx->pages); i++) {
+ ctx->pages[i] = alloc_page(GFP_DMA32);
+ if (!ctx->pages[i]) {
+ while (i--)
+ __free_page(ctx->pages[i]);
+ psb_mmu_free_pagedir(ctx->pd);
+ return -ENOMEM;
+ }
+ }
+ return 0;
+}
+
+static void psb_mmu_test_exit(struct kunit *test)
+{
+ struct psb_mmu_test_context *ctx = test->priv;
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(ctx->pages); i++)
+ __free_page(ctx->pages[i]);
+ psb_mmu_free_pagedir(ctx->pd);
+}
+
+static u32 psb_mmu_test_pte(struct psb_mmu_pd *pd, u32 address)
+{
+ struct psb_mmu_pt *pt = pd->tables[address >> PSB_PDE_SHIFT];
+ u32 *entries;
+ u32 value;
+
+ if (!pt)
+ return pd->invalid_pte;
+ entries = kmap_local_page(pt->p);
+ value = entries[(address >> PAGE_SHIFT) & 0x3ff];
+ kunmap_local(entries);
+ return value;
+}
+
+static void psb_mmu_zero_pages_test(struct kunit *test)
+{
+ struct psb_mmu_test_context *ctx = test->priv;
+
+ KUNIT_EXPECT_EQ(test, psb_mmu_insert_pages(ctx->pd, NULL, 0, 0,
+ 0, 0, 0), 0);
+ KUNIT_EXPECT_EQ(test, psb_mmu_insert_pfn_sequence(ctx->pd, 0,
+ 0, 0, 0), 0);
+ psb_mmu_remove_pages(ctx->pd, 0, 0, 0, 0);
+ psb_mmu_remove_pfn_sequence(ctx->pd, 0, 0);
+ KUNIT_EXPECT_PTR_EQ(test, ctx->pd->tables[0], NULL);
+}
+
+static void psb_mmu_range_test(struct kunit *test)
+{
+ struct psb_mmu_test_context *ctx = test->priv;
+
+ KUNIT_EXPECT_EQ(test, psb_mmu_insert_pages(ctx->pd, ctx->pages,
+ 1, 1, 0, 0, 0), -EINVAL);
+ KUNIT_EXPECT_EQ(test, psb_mmu_insert_pages(ctx->pd, ctx->pages,
+ 0xfffff000UL, 2, 0, 0, 0),
+ -ERANGE);
+ KUNIT_EXPECT_EQ(test, psb_mmu_insert_pages(ctx->pd, ctx->pages,
+ 0, 4, 0, 4, 0), -EINVAL);
+ KUNIT_EXPECT_EQ(test, psb_mmu_insert_pages(ctx->pd, ctx->pages,
+ 0, 4, 3, 4, 0), -EINVAL);
+ KUNIT_EXPECT_EQ(test, psb_mmu_insert_pages(ctx->pd, ctx->pages,
+ 0, 4, 2, 1, 0), -EINVAL);
+ KUNIT_EXPECT_EQ(test, psb_mmu_insert_pages(ctx->pd, ctx->pages,
+ 0, 4, 2, U32_MAX, 0), -ERANGE);
+ KUNIT_EXPECT_EQ(test, psb_mmu_insert_pages(ctx->pd, NULL,
+ 0, 1, 0, 0, 0), -EINVAL);
+ KUNIT_EXPECT_PTR_EQ(test, ctx->pd->tables[0], NULL);
+}
+
+static void psb_mmu_last_page_test(struct kunit *test)
+{
+ struct psb_mmu_test_context *ctx = test->priv;
+
+ KUNIT_ASSERT_EQ(test, psb_mmu_insert_pages(ctx->pd, ctx->pages,
+ 0xfffff000UL, 1, 0, 0, 0), 0);
+ KUNIT_EXPECT_EQ(test, psb_mmu_test_pte(ctx->pd, 0xfffff000),
+ (u32)(page_to_pfn(ctx->pages[0]) << PAGE_SHIFT) |
+ PSB_PTE_VALID);
+ psb_mmu_remove_pages(ctx->pd, 0xfffff000UL, 1, 0, 0);
+ KUNIT_EXPECT_PTR_EQ(test, ctx->pd->tables[1023], NULL);
+}
+
+static void psb_mmu_directory_boundary_test(struct kunit *test)
+{
+ struct psb_mmu_test_context *ctx = test->priv;
+
+ KUNIT_ASSERT_EQ(test, psb_mmu_insert_pages(ctx->pd, ctx->pages,
+ 0x3ff000, 2, 0, 0, 0), 0);
+ KUNIT_EXPECT_EQ(test, ctx->pd->tables[0]->count, 1U);
+ KUNIT_EXPECT_EQ(test, ctx->pd->tables[1]->count, 1U);
+ psb_mmu_remove_pages(ctx->pd, 0x3ff000, 2, 0, 0);
+ KUNIT_EXPECT_PTR_EQ(test, ctx->pd->tables[0], NULL);
+ KUNIT_EXPECT_PTR_EQ(test, ctx->pd->tables[1], NULL);
+}
+
+static void psb_mmu_collision_rollback_test(struct kunit *test)
+{
+ struct psb_mmu_test_context *ctx = test->priv;
+ u32 retained;
+
+ KUNIT_ASSERT_EQ(test, psb_mmu_insert_pages(ctx->pd, ctx->pages + 3,
+ 0x400000, 1, 0, 0, 0), 0);
+ retained = psb_mmu_test_pte(ctx->pd, 0x400000);
+ KUNIT_EXPECT_EQ(test, psb_mmu_insert_pages(ctx->pd, ctx->pages,
+ 0x3ff000, 2, 0, 0, 0), -EBUSY);
+ KUNIT_EXPECT_PTR_EQ(test, ctx->pd->tables[0], NULL);
+ KUNIT_EXPECT_EQ(test, psb_mmu_test_pte(ctx->pd, 0x400000), retained);
+ KUNIT_EXPECT_EQ(test, ctx->pd->tables[1]->count, 1U);
+}
+
+static void psb_mmu_tiled_rollback_test(struct kunit *test)
+{
+ struct psb_mmu_test_context *ctx = test->priv;
+ u32 retained;
+
+ KUNIT_ASSERT_EQ(test, psb_mmu_insert_pages(ctx->pd, ctx->pages + 3,
+ 0x8000, 1, 0, 0, 0), 0);
+ retained = psb_mmu_test_pte(ctx->pd, 0x8000);
+ KUNIT_EXPECT_EQ(test, psb_mmu_insert_pages(ctx->pd, ctx->pages,
+ 0x3000, 4, 2, 4, 0), -EBUSY);
+ KUNIT_EXPECT_EQ(test, psb_mmu_test_pte(ctx->pd, 0x3000), 0U);
+ KUNIT_EXPECT_EQ(test, psb_mmu_test_pte(ctx->pd, 0x4000), 0U);
+ KUNIT_EXPECT_EQ(test, psb_mmu_test_pte(ctx->pd, 0x7000), 0U);
+ KUNIT_EXPECT_EQ(test, psb_mmu_test_pte(ctx->pd, 0x8000), retained);
+ KUNIT_EXPECT_EQ(test, ctx->pd->tables[0]->count, 1U);
+}
+
+static void psb_mmu_pfn_range_test(struct kunit *test)
+{
+ struct psb_mmu_test_context *ctx = test->priv;
+
+ KUNIT_EXPECT_EQ(test, psb_mmu_insert_pfn_sequence(ctx->pd, 0x100000,
+ 0, 1, 0), -ERANGE);
+ KUNIT_EXPECT_EQ(test, psb_mmu_insert_pfn_sequence(ctx->pd, 0xfffff,
+ 0, 2, 0), -ERANGE);
+ KUNIT_ASSERT_EQ(test, psb_mmu_insert_pfn_sequence(ctx->pd, 0xfffff,
+ 0, 1, 0), 0);
+ KUNIT_EXPECT_EQ(test, psb_mmu_test_pte(ctx->pd, 0), 0xfffff001U);
+ psb_mmu_remove_pfn_sequence(ctx->pd, 0, 1);
+ KUNIT_EXPECT_PTR_EQ(test, ctx->pd->tables[0], NULL);
+}
+
+static void psb_mmu_pfn_rollback_test(struct kunit *test)
+{
+ struct psb_mmu_test_context *ctx = test->priv;
+ u32 retained;
+
+ KUNIT_ASSERT_EQ(test, psb_mmu_insert_pfn_sequence(ctx->pd, 0x100,
+ 0x400000, 1, 0), 0);
+ retained = psb_mmu_test_pte(ctx->pd, 0x400000);
+ KUNIT_EXPECT_EQ(test, psb_mmu_insert_pfn_sequence(ctx->pd, 0x200,
+ 0x3ff000, 2, 0), -EBUSY);
+ KUNIT_EXPECT_PTR_EQ(test, ctx->pd->tables[0], NULL);
+ KUNIT_EXPECT_EQ(test, psb_mmu_test_pte(ctx->pd, 0x400000), retained);
+ KUNIT_EXPECT_EQ(test, ctx->pd->tables[1]->count, 1U);
+}
+
+static void psb_mmu_remove_hole_test(struct kunit *test)
+{
+ struct psb_mmu_test_context *ctx = test->priv;
+
+ KUNIT_ASSERT_EQ(test, psb_mmu_insert_pages(ctx->pd, ctx->pages,
+ 0x1000, 1, 0, 0, 0), 0);
+ psb_mmu_remove_pages(ctx->pd, 0x2000, 1, 0, 0);
+ KUNIT_EXPECT_EQ(test, ctx->pd->tables[0]->count, 1U);
+ psb_mmu_remove_pages(ctx->pd, 0x1000, 1, 0, 0);
+ psb_mmu_remove_pfn_sequence(ctx->pd, 0x400000, 1);
+ KUNIT_EXPECT_PTR_EQ(test, ctx->pd->tables[0], NULL);
+ KUNIT_EXPECT_PTR_EQ(test, ctx->pd->tables[1], NULL);
+}
+
+static struct kunit_case psb_mmu_test_cases[] = {
+ KUNIT_CASE(psb_mmu_zero_pages_test),
+ KUNIT_CASE(psb_mmu_range_test),
+ KUNIT_CASE(psb_mmu_last_page_test),
+ KUNIT_CASE(psb_mmu_directory_boundary_test),
+ KUNIT_CASE(psb_mmu_collision_rollback_test),
+ KUNIT_CASE(psb_mmu_tiled_rollback_test),
+ KUNIT_CASE(psb_mmu_pfn_range_test),
+ KUNIT_CASE(psb_mmu_pfn_rollback_test),
+ KUNIT_CASE(psb_mmu_remove_hole_test),
+ {}
+};
+
+static struct kunit_suite psb_mmu_test_suite = {
+ .name = "psb_mmu",
+ .init = psb_mmu_test_init,
+ .exit = psb_mmu_test_exit,
+ .test_cases = psb_mmu_test_cases,
+};
+
+kunit_test_suite(psb_mmu_test_suite);
next prev parent reply other threads:[~2026-11-09 5:55 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-09 5:54 [RFC PATCH 0/6] drm/gma500: prepare GEM and MMU for 3D rendering and hybrid 2D Gabriel Gama
2026-11-09 5:54 ` [RFC PATCH 1/6] drm/gma500: use the common dumb-buffer size helper Gabriel Gama
2026-11-09 5:54 ` [RFC PATCH 2/6] drm/gma500: do not underflow an unpinned GEM object Gabriel Gama
2026-11-09 5:54 ` [RFC PATCH 3/6] drm/gma500: Fix SGX page-table cache-flush mapping lifetime Gabriel Gama
2026-11-09 6:00 ` sashiko-bot
2026-11-09 5:54 ` [RFC PATCH 4/6] drm/gma500: Make SGX MMU insertion checked and transactional Gabriel Gama
2026-11-09 5:54 ` [RFC PATCH 5/6] drm/gma500: Propagate SGX MMU setup and GEM pin failures Gabriel Gama
2026-11-09 6:06 ` sashiko-bot
2026-11-09 5:54 ` Gabriel Gama [this message]
2026-11-09 6:07 ` [RFC PATCH 6/6] drm/gma500: Add software-only KUnit coverage for SGX page tables sashiko-bot
2026-11-09 6:26 ` Operating System's Depression
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