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From: Gabriel Gama <operatingsystemsdepression@gmail.com>
To: dri-devel@lists.freedesktop.org
Cc: patrik.r.jakobsson@gmail.com
Subject: [RFC PATCH v2 3/6] drm/gma500: Fix SGX page-table cache-flush mapping lifetime
Date: Mon,  9 Nov 2026 03:33:00 -0300	[thread overview]
Message-ID: <20261109063303.32658-4-operatingsystemsdepression@gmail.com> (raw)
In-Reply-To: <20261109063303.32658-1-operatingsystemsdepression@gmail.com>

Flush the modified directory entry before unmapping it. The old order
uses a kmap_atomic pointer outside its mapping lifetime, which DMA32
direct mappings can mask. Use kmap_local_page under the existing spinlock.

Also calculate the CLFLUSH iteration count only on the path that uses it,
avoiding division by an uninitialized cache-line size when CLFLUSH
is absent.

Fixes: 8c8f1c958ab5 ("gma500: introduce the GTT and MMU handling logic")
Signed-off-by: Gabriel Gama <operatingsystemsdepression@gmail.com>
---
 drivers/gpu/drm/gma500/mmu.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/gma500/mmu.c b/drivers/gpu/drm/gma500/mmu.c
index 4fbc22a59..34ae0f125 100644
--- a/drivers/gpu/drm/gma500/mmu.c
+++ b/drivers/gpu/drm/gma500/mmu.c
@@ -265,7 +265,7 @@ static struct psb_mmu_pt *psb_mmu_alloc_pt(struct psb_mmu_pd *pd)
 	struct psb_mmu_pt *pt = kmalloc_obj(*pt);
 	void *v;
 	uint32_t clflush_add = pd->driver->clflush_add >> PAGE_SHIFT;
-	uint32_t clflush_count = PAGE_SIZE / clflush_add;
+	u32 clflush_count;
 	spinlock_t *lock = &pd->driver->lock;
 	uint8_t *clf;
 	uint32_t *ptes;
@@ -289,6 +289,7 @@ static struct psb_mmu_pt *psb_mmu_alloc_pt(struct psb_mmu_pd *pd)
 		*ptes++ = pd->invalid_pte;
 
 	if (pd->driver->has_clflush && pd->hw_context != -1) {
+		clflush_count = PAGE_SIZE / clflush_add;
 		mb();
 		for (i = 0; i < clflush_count; ++i) {
 			psb_clflush(clf);
@@ -331,16 +332,15 @@ static struct psb_mmu_pt *psb_mmu_pt_alloc_map_lock(struct psb_mmu_pd *pd,
 			continue;
 		}
 
-		v = kmap_atomic(pd->p);
+		v = kmap_local_page(pd->p);
 		pd->tables[index] = pt;
 		v[index] = (page_to_pfn(pt->p) << 12) | pd->pd_mask;
 		pt->index = index;
-		kunmap_atomic((void *) v);
-
 		if (pd->hw_context != -1) {
 			psb_mmu_clflush(pd->driver, (void *)&v[index]);
 			atomic_set(&pd->driver->needs_tlbflush, 1);
 		}
+		kunmap_local(v);
 	}
 	pt->v = kmap_atomic(pt->p);
 	return pt;

  parent reply	other threads:[~2026-11-09  6:33 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-11-09  6:32 [RFC PATCH v2 0/6] drm/gma500: prepare GEM and MMU for 3D rendering and hybrid 2D Gabriel Gama
2026-11-09  6:32 ` [RFC PATCH v2 1/6] drm/gma500: use the common dumb-buffer size helper Gabriel Gama
2026-11-12 21:20   ` Joseph Telaak
2026-11-09  6:32 ` [RFC PATCH v2 2/6] drm/gma500: do not underflow an unpinned GEM object Gabriel Gama
2026-11-12 21:17   ` Joseph Telaak
2026-11-09  6:33 ` Gabriel Gama [this message]
2026-11-12 21:20   ` [RFC PATCH v2 3/6] drm/gma500: Fix SGX page-table cache-flush mapping lifetime Joseph Telaak
2026-11-09  6:33 ` [RFC PATCH v2 4/6] drm/gma500: Make SGX MMU insertion checked and transactional Gabriel Gama
2026-11-09  6:41   ` sashiko-bot
2026-11-12 21:20   ` Joseph Telaak
2026-11-09  6:33 ` [RFC PATCH v2 5/6] drm/gma500: Propagate SGX MMU setup and GEM pin failures Gabriel Gama
2026-11-12 21:20   ` Joseph Telaak
2026-11-13  2:17     ` Gabriel Gama
2026-11-09  6:33 ` [RFC PATCH v2 6/6] drm/gma500: Add software-only KUnit coverage for SGX page tables Gabriel Gama

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