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From: Arnd Bergmann <arnd@arndb.de>
To: Ritesh Harjani <riteshh@codeaurora.org>
Cc: adrian.hunter@intel.com, ulf.hansson@linaro.org,
	linux-mmc@vger.kernel.org, shawn.lin@rock-chips.com,
	linux-arm-msm@vger.kernel.org, georgi.djakov@linaro.org,
	alex.lemberg@sandisk.com, mateusz.nowak@intel.com,
	Yuliy.Izrailov@sandisk.com, asutoshd@codeaurora.org,
	david.griego@linaro.org, stummala@codeaurora.org,
	venkatg@codeaurora.org, pramod.gurav@linaro.org,
	bjorn.andersson@linaro.org
Subject: Re: [PATCH v4 3/9] mmc: sdhci-msm: add pltfm_data support to get clk-rates from DT
Date: Mon, 12 Sep 2016 09:33:25 +0200	[thread overview]
Message-ID: <2575923.JUIzEdKygq@wuerfel> (raw)
In-Reply-To: <1472033024-14890-4-git-send-email-riteshh@codeaurora.org>

On Wednesday, August 24, 2016 3:33:38 PM CEST Ritesh Harjani wrote:
>  #define CMUX_SHIFT_PHASE_SHIFT 24
>  #define CMUX_SHIFT_PHASE_MASK  (7 << CMUX_SHIFT_PHASE_SHIFT)
>  
> +struct sdhci_msm_pltfm_data {
> +       u32 *clk_table;
> +       int clk_table_sz;
> +};
> +
>  struct sdhci_msm_host {
>         struct platform_device *pdev;
>         void __iomem *core_mem; /* MSM SDCC mapped address */
> @@ -83,6 +88,7 @@ struct sdhci_msm_host {
>         struct clk *bus_clk;    /* SDHC bus voter clock */
>         struct mmc_host *mmc;
>         bool use_14lpp_dll_reset;
> +       struct sdhci_msm_pltfm_data *pdata;
>  };
>  
>  /* Platform specific tuning */
> 

Just noticed this. Please don't add another structure, just put the
new members into struct sdhci_msm_host directly.

We only need platform_data structures for drivers that also work
with old-style board files, which this one doesn't.

	Arnd

  parent reply	other threads:[~2016-09-12  7:33 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-08-24 10:03 [PATCH v4 0/9] mmc: sdhci-msm: Add clk-rates and DDR support Ritesh Harjani
2016-08-24 10:03 ` [PATCH v4 1/9] mmc: sdhci-msm: Change poor style writel/readl of registers Ritesh Harjani
2016-08-24 10:03 ` [PATCH v4 2/9] mmc: sdhci-msm: Update DLL reset sequence Ritesh Harjani
2016-08-24 10:03 ` [PATCH v4 3/9] mmc: sdhci-msm: add pltfm_data support to get clk-rates from DT Ritesh Harjani
2016-08-25 22:27   ` Stephen Boyd
2016-08-30 14:12     ` Ritesh Harjani
     [not found]       ` <1a44bb54-d88c-737d-7fb1-e7c3597ac03b-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-09-07 16:14         ` Stephen Boyd
2016-09-12  6:17           ` Ritesh Harjani
2016-10-04  9:33             ` Ritesh Harjani
2016-09-12  7:33   ` Arnd Bergmann [this message]
2016-09-27  5:06     ` Ritesh Harjani
2016-08-24 10:03 ` [PATCH v4 4/9] ARM: dts: qcom: Add clk-rates to sdhc1 & sdhc2 Ritesh Harjani
2016-08-24 10:03 ` [PATCH v4 5/9] mmc: sdhci-msm: Add get_min_clock() and get_max_clock() callback Ritesh Harjani
2016-08-24 10:03 ` [PATCH v4 6/9] mmc: sdhci-msm: Enable few quirks Ritesh Harjani
2016-08-24 10:03 ` [PATCH v4 7/9] mmc: sdhci-msm: Implement set_clock callback for sdhci-msm Ritesh Harjani
2016-08-24 10:03 ` [PATCH v4 8/9] mmc: sdhci-msm: Add clock changes for DDR mode Ritesh Harjani
2016-08-29 13:17   ` Adrian Hunter
2016-08-30 14:16     ` Ritesh Harjani
2016-08-24 10:03 ` [PATCH v4 9/9] arm64: dts: qcom: msm8916: Add ddr support to sdhc1 Ritesh Harjani

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