* [PATCH v2] sh-pfc: Add entries for INTC external IRQs
@ 2013-04-09 10:48 Bastian Hecht
2013-04-09 13:28 ` Laurent Pinchart
2013-04-10 2:11 ` Simon Horman
0 siblings, 2 replies; 3+ messages in thread
From: Bastian Hecht @ 2013-04-09 10:48 UTC (permalink / raw)
To: linux-sh
We add all necessary entries to support the external IRQs from the INTC.
Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
---
v2:
- massive sorting
- introduction of index instead of pointing by port number
drivers/pinctrl/sh-pfc/pfc-r8a7740.c | 174 ++++++++++++++++++++++++++++++++++
1 file changed, 174 insertions(+)
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
index 21ff7f2..4753f54 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
@@ -30,6 +30,22 @@
PORT_10(fn, pfx##20, sfx), \
PORT_1(fn, pfx##210, sfx), PORT_1(fn, pfx##211, sfx)
+#define IRQC_PIN_MUX(irq, pin) \
+static const unsigned int intc_irq##irq##_pins[] = { \
+ pin, \
+}; \
+static const unsigned int intc_irq##irq##_mux[] = { \
+ IRQ##irq##_MARK, \
+}
+
+#define IRQC_PINS_MUX(irq, idx, pin) \
+static const unsigned int intc_irq##irq##_##idx##_pins[] = { \
+ pin, \
+}; \
+static const unsigned int intc_irq##irq##_##idx##_mux[] = { \
+ IRQ##irq##_PORT##pin##_MARK, \
+}
+
enum {
PINMUX_RESERVED = 0,
@@ -1658,6 +1674,59 @@ static struct sh_pfc_pin pinmux_pins[] = {
GPIO_PORT_ALL(),
};
+/* - INTC ------------------------------------------------------------------- */
+IRQC_PINS_MUX(0, 0, 2);
+IRQC_PINS_MUX(0, 1, 13);
+IRQC_PIN_MUX(1, 20);
+IRQC_PINS_MUX(2, 0, 11);
+IRQC_PINS_MUX(2, 1, 12);
+IRQC_PINS_MUX(3, 0, 10);
+IRQC_PINS_MUX(3, 1, 14);
+IRQC_PINS_MUX(4, 0, 15);
+IRQC_PINS_MUX(4, 1, 172);
+IRQC_PINS_MUX(5, 0, 0);
+IRQC_PINS_MUX(5, 1, 1);
+IRQC_PINS_MUX(6, 0, 121);
+IRQC_PINS_MUX(6, 1, 173);
+IRQC_PINS_MUX(7, 0, 120);
+IRQC_PINS_MUX(7, 1, 209);
+IRQC_PIN_MUX(8, 119);
+IRQC_PINS_MUX(9, 0, 118);
+IRQC_PINS_MUX(9, 1, 210);
+IRQC_PIN_MUX(10, 19);
+IRQC_PIN_MUX(11, 104);
+IRQC_PINS_MUX(12, 0, 42);
+IRQC_PINS_MUX(12, 1, 97);
+IRQC_PINS_MUX(13, 0, 64);
+IRQC_PINS_MUX(13, 1, 98);
+IRQC_PINS_MUX(14, 0, 63);
+IRQC_PINS_MUX(14, 1, 99);
+IRQC_PINS_MUX(15, 0, 62);
+IRQC_PINS_MUX(15, 1, 100);
+IRQC_PINS_MUX(16, 0, 68);
+IRQC_PINS_MUX(16, 1, 211);
+IRQC_PIN_MUX(17, 69);
+IRQC_PIN_MUX(18, 70);
+IRQC_PIN_MUX(19, 71);
+IRQC_PIN_MUX(20, 67);
+IRQC_PIN_MUX(21, 202);
+IRQC_PIN_MUX(22, 95);
+IRQC_PIN_MUX(23, 96);
+IRQC_PIN_MUX(24, 180);
+IRQC_PIN_MUX(25, 38);
+IRQC_PINS_MUX(26, 0, 58);
+IRQC_PINS_MUX(26, 1, 81);
+IRQC_PINS_MUX(27, 0, 57);
+IRQC_PINS_MUX(27, 1, 168);
+IRQC_PINS_MUX(28, 0, 56);
+IRQC_PINS_MUX(28, 1, 169);
+IRQC_PINS_MUX(29, 0, 50);
+IRQC_PINS_MUX(29, 1, 170);
+IRQC_PINS_MUX(30, 0, 49);
+IRQC_PINS_MUX(30, 1, 171);
+IRQC_PINS_MUX(31, 0, 41);
+IRQC_PINS_MUX(31, 1, 167);
+
/* - LCD0 ------------------------------------------------------------------- */
static const unsigned int lcd0_data8_pins[] = {
/* D[0:7] */
@@ -2062,6 +2131,57 @@ static const unsigned int sdhi2_wp_1_mux[] = {
};
static const struct sh_pfc_pin_group pinmux_groups[] = {
+ SH_PFC_PIN_GROUP(intc_irq0_0),
+ SH_PFC_PIN_GROUP(intc_irq0_1),
+ SH_PFC_PIN_GROUP(intc_irq1),
+ SH_PFC_PIN_GROUP(intc_irq2_0),
+ SH_PFC_PIN_GROUP(intc_irq2_1),
+ SH_PFC_PIN_GROUP(intc_irq3_0),
+ SH_PFC_PIN_GROUP(intc_irq3_1),
+ SH_PFC_PIN_GROUP(intc_irq4_0),
+ SH_PFC_PIN_GROUP(intc_irq4_1),
+ SH_PFC_PIN_GROUP(intc_irq5_0),
+ SH_PFC_PIN_GROUP(intc_irq5_1),
+ SH_PFC_PIN_GROUP(intc_irq6_0),
+ SH_PFC_PIN_GROUP(intc_irq6_1),
+ SH_PFC_PIN_GROUP(intc_irq7_0),
+ SH_PFC_PIN_GROUP(intc_irq7_1),
+ SH_PFC_PIN_GROUP(intc_irq8),
+ SH_PFC_PIN_GROUP(intc_irq9_0),
+ SH_PFC_PIN_GROUP(intc_irq9_1),
+ SH_PFC_PIN_GROUP(intc_irq10),
+ SH_PFC_PIN_GROUP(intc_irq11),
+ SH_PFC_PIN_GROUP(intc_irq12_0),
+ SH_PFC_PIN_GROUP(intc_irq12_1),
+ SH_PFC_PIN_GROUP(intc_irq13_0),
+ SH_PFC_PIN_GROUP(intc_irq13_1),
+ SH_PFC_PIN_GROUP(intc_irq14_0),
+ SH_PFC_PIN_GROUP(intc_irq14_1),
+ SH_PFC_PIN_GROUP(intc_irq15_0),
+ SH_PFC_PIN_GROUP(intc_irq15_1),
+ SH_PFC_PIN_GROUP(intc_irq16_0),
+ SH_PFC_PIN_GROUP(intc_irq16_1),
+ SH_PFC_PIN_GROUP(intc_irq17),
+ SH_PFC_PIN_GROUP(intc_irq18),
+ SH_PFC_PIN_GROUP(intc_irq19),
+ SH_PFC_PIN_GROUP(intc_irq20),
+ SH_PFC_PIN_GROUP(intc_irq21),
+ SH_PFC_PIN_GROUP(intc_irq22),
+ SH_PFC_PIN_GROUP(intc_irq23),
+ SH_PFC_PIN_GROUP(intc_irq24),
+ SH_PFC_PIN_GROUP(intc_irq25),
+ SH_PFC_PIN_GROUP(intc_irq26_0),
+ SH_PFC_PIN_GROUP(intc_irq26_1),
+ SH_PFC_PIN_GROUP(intc_irq27_0),
+ SH_PFC_PIN_GROUP(intc_irq27_1),
+ SH_PFC_PIN_GROUP(intc_irq28_0),
+ SH_PFC_PIN_GROUP(intc_irq28_1),
+ SH_PFC_PIN_GROUP(intc_irq29_0),
+ SH_PFC_PIN_GROUP(intc_irq29_1),
+ SH_PFC_PIN_GROUP(intc_irq30_0),
+ SH_PFC_PIN_GROUP(intc_irq30_1),
+ SH_PFC_PIN_GROUP(intc_irq31_0),
+ SH_PFC_PIN_GROUP(intc_irq31_1),
SH_PFC_PIN_GROUP(lcd0_data8),
SH_PFC_PIN_GROUP(lcd0_data9),
SH_PFC_PIN_GROUP(lcd0_data12),
@@ -2112,6 +2232,60 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
SH_PFC_PIN_GROUP(sdhi2_wp_1),
};
+static const char * const intc_groups[] = {
+ "intc_irq0_0",
+ "intc_irq0_1",
+ "intc_irq1",
+ "intc_irq2_0",
+ "intc_irq2_1",
+ "intc_irq3_0",
+ "intc_irq3_1",
+ "intc_irq4_0",
+ "intc_irq4_1",
+ "intc_irq5_0",
+ "intc_irq5_1",
+ "intc_irq6_0",
+ "intc_irq6_1",
+ "intc_irq7_0",
+ "intc_irq7_1",
+ "intc_irq8",
+ "intc_irq9_0",
+ "intc_irq9_1",
+ "intc_irq10",
+ "intc_irq11",
+ "intc_irq12_0",
+ "intc_irq12_1",
+ "intc_irq13_0",
+ "intc_irq13_1",
+ "intc_irq14_0",
+ "intc_irq14_1",
+ "intc_irq15_0",
+ "intc_irq15_1",
+ "intc_irq16_0",
+ "intc_irq16_1",
+ "intc_irq17",
+ "intc_irq18",
+ "intc_irq19",
+ "intc_irq20",
+ "intc_irq21",
+ "intc_irq22",
+ "intc_irq23",
+ "intc_irq24",
+ "intc_irq25",
+ "intc_irq26_0",
+ "intc_irq26_1",
+ "intc_irq27_0",
+ "intc_irq27_1",
+ "intc_irq28_0",
+ "intc_irq28_1",
+ "intc_irq29_0",
+ "intc_irq29_1",
+ "intc_irq30_0",
+ "intc_irq30_1",
+ "intc_irq31_0",
+ "intc_irq31_1",
+};
+
static const char * const lcd0_groups[] = {
"lcd0_data8",
"lcd0_data9",
--
1.7.9.5
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH v2] sh-pfc: Add entries for INTC external IRQs
2013-04-09 10:48 [PATCH v2] sh-pfc: Add entries for INTC external IRQs Bastian Hecht
@ 2013-04-09 13:28 ` Laurent Pinchart
2013-04-10 2:11 ` Simon Horman
1 sibling, 0 replies; 3+ messages in thread
From: Laurent Pinchart @ 2013-04-09 13:28 UTC (permalink / raw)
To: linux-sh
Hi Bastian,
Thanks for the patch.
On Tuesday 09 April 2013 12:48:50 Bastian Hecht wrote:
> We add all necessary entries to support the external IRQs from the INTC.
>
> Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> ---
> v2:
> - massive sorting
> - introduction of index instead of pointing by port number
>
> drivers/pinctrl/sh-pfc/pfc-r8a7740.c | 174 +++++++++++++++++++++++++++++++
> 1 file changed, 174 insertions(+)
>
> diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
> b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c index 21ff7f2..4753f54 100644
> --- a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
> +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
> @@ -1658,6 +1674,59 @@ static struct sh_pfc_pin pinmux_pins[] = {
[snip]
> +IRQC_PINS_MUX(9, 1, 210);
[snip]
> +IRQC_PINS_MUX(16, 1, 211);
My version of the datasheet doesn't include pins 210 and 211 in the list of
multiplexed pins, so I'll trust you on these two. I've checked all the other
pins.
--
Regards,
Laurent Pinchart
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH v2] sh-pfc: Add entries for INTC external IRQs
2013-04-09 10:48 [PATCH v2] sh-pfc: Add entries for INTC external IRQs Bastian Hecht
2013-04-09 13:28 ` Laurent Pinchart
@ 2013-04-10 2:11 ` Simon Horman
1 sibling, 0 replies; 3+ messages in thread
From: Simon Horman @ 2013-04-10 2:11 UTC (permalink / raw)
To: linux-sh
On Tue, Apr 09, 2013 at 03:28:16PM +0200, Laurent Pinchart wrote:
> Hi Bastian,
>
> Thanks for the patch.
>
> On Tuesday 09 April 2013 12:48:50 Bastian Hecht wrote:
> > We add all necessary entries to support the external IRQs from the INTC.
> >
> > Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
>
> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Thanks, queued-up in the pinmux branch.
> > ---
> > v2:
> > - massive sorting
> > - introduction of index instead of pointing by port number
> >
> > drivers/pinctrl/sh-pfc/pfc-r8a7740.c | 174 +++++++++++++++++++++++++++++++
> > 1 file changed, 174 insertions(+)
> >
> > diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
> > b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c index 21ff7f2..4753f54 100644
> > --- a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
> > +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
> > @@ -1658,6 +1674,59 @@ static struct sh_pfc_pin pinmux_pins[] = {
>
> [snip]
>
> > +IRQC_PINS_MUX(9, 1, 210);
>
> [snip]
>
> > +IRQC_PINS_MUX(16, 1, 211);
>
> My version of the datasheet doesn't include pins 210 and 211 in the list of
> multiplexed pins, so I'll trust you on these two. I've checked all the other
> pins.
>
> --
> Regards,
>
> Laurent Pinchart
>
^ permalink raw reply [flat|nested] 3+ messages in thread
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2013-04-09 10:48 [PATCH v2] sh-pfc: Add entries for INTC external IRQs Bastian Hecht
2013-04-09 13:28 ` Laurent Pinchart
2013-04-10 2:11 ` Simon Horman
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