All of lore.kernel.org
 help / color / mirror / Atom feed
From: "Heiko Stübner" <heiko@sntech.de>
To: krzk+dt@kernel.org, palmer@dabbelt.com, robh+dt@kernel.org,
	Conor Dooley <mail@conchuod.ie>
Cc: conor.dooley@microchip.com, Cyril.Jean@microchip.com,
	daire.mcnamara@microchip.com, paul.walmsley@sifive.com,
	aou@eecs.berkeley.edu, palmer@rivosinc.com, arnd@arndb.de,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-riscv@lists.infradead.org, Rob Herring <robh@kernel.org>
Subject: Re: [PATCH v4 2/8] riscv: dts: microchip: move sysctrlr out of soc bus
Date: Mon, 09 May 2022 13:04:19 +0200	[thread overview]
Message-ID: <2826000.e9J7NaK4W3@diego> (raw)
In-Reply-To: <20220504203051.1210355-3-mail@conchuod.ie>

Am Mittwoch, 4. Mai 2022, 22:30:46 CEST schrieb Conor Dooley:
> From: Conor Dooley <conor.dooley@microchip.com>
> 
> The MPFS system controller has no registers of its own, so move it out
> of the soc node to avoid dtbs_check warnings:
> arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dtb: soc: syscontroller: {'compatible': ['microchip,mpfs-sys-controller'], 'mboxes': [[15, 0]], 'status': ['okay']} should not be valid under {'type': 'object'}
> 
> Reported-by: Palmer Dabbelt <palmer@rivosinc.com>
> Suggested-by: Rob Herring <robh@kernel.org>
> Fixes: 528a5b1f2556 ("riscv: dts: microchip: add new peripherals to icicle kit device tree")
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

Reviewed-by: Heiko Stuebner <heiko@sntech.de>

> ---
>  arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi | 10 +++++-----
>  1 file changed, 5 insertions(+), 5 deletions(-)
> 
> diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
> index 746c4d4e7686..bf21a2edd180 100644
> --- a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
> +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
> @@ -146,6 +146,11 @@ refclk: mssrefclk {
>  		#clock-cells = <0>;
>  	};
>  
> +	syscontroller: syscontroller {
> +		compatible = "microchip,mpfs-sys-controller";
> +		mboxes = <&mbox 0>;
> +	};
> +
>  	soc {
>  		#address-cells = <2>;
>  		#size-cells = <2>;
> @@ -446,10 +451,5 @@ mbox: mailbox@37020000 {
>  			#mbox-cells = <1>;
>  			status = "disabled";
>  		};
> -
> -		syscontroller: syscontroller {
> -			compatible = "microchip,mpfs-sys-controller";
> -			mboxes = <&mbox 0>;
> -		};
>  	};
>  };
> 





_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

WARNING: multiple messages have this Message-ID (diff)
From: "Heiko Stübner" <heiko@sntech.de>
To: krzk+dt@kernel.org, palmer@dabbelt.com, robh+dt@kernel.org,
	Conor Dooley <mail@conchuod.ie>
Cc: conor.dooley@microchip.com, Cyril.Jean@microchip.com,
	daire.mcnamara@microchip.com, paul.walmsley@sifive.com,
	aou@eecs.berkeley.edu, palmer@rivosinc.com, arnd@arndb.de,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-riscv@lists.infradead.org, Rob Herring <robh@kernel.org>
Subject: Re: [PATCH v4 2/8] riscv: dts: microchip: move sysctrlr out of soc bus
Date: Mon, 09 May 2022 13:04:19 +0200	[thread overview]
Message-ID: <2826000.e9J7NaK4W3@diego> (raw)
In-Reply-To: <20220504203051.1210355-3-mail@conchuod.ie>

Am Mittwoch, 4. Mai 2022, 22:30:46 CEST schrieb Conor Dooley:
> From: Conor Dooley <conor.dooley@microchip.com>
> 
> The MPFS system controller has no registers of its own, so move it out
> of the soc node to avoid dtbs_check warnings:
> arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dtb: soc: syscontroller: {'compatible': ['microchip,mpfs-sys-controller'], 'mboxes': [[15, 0]], 'status': ['okay']} should not be valid under {'type': 'object'}
> 
> Reported-by: Palmer Dabbelt <palmer@rivosinc.com>
> Suggested-by: Rob Herring <robh@kernel.org>
> Fixes: 528a5b1f2556 ("riscv: dts: microchip: add new peripherals to icicle kit device tree")
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

Reviewed-by: Heiko Stuebner <heiko@sntech.de>

> ---
>  arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi | 10 +++++-----
>  1 file changed, 5 insertions(+), 5 deletions(-)
> 
> diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
> index 746c4d4e7686..bf21a2edd180 100644
> --- a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
> +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
> @@ -146,6 +146,11 @@ refclk: mssrefclk {
>  		#clock-cells = <0>;
>  	};
>  
> +	syscontroller: syscontroller {
> +		compatible = "microchip,mpfs-sys-controller";
> +		mboxes = <&mbox 0>;
> +	};
> +
>  	soc {
>  		#address-cells = <2>;
>  		#size-cells = <2>;
> @@ -446,10 +451,5 @@ mbox: mailbox@37020000 {
>  			#mbox-cells = <1>;
>  			status = "disabled";
>  		};
> -
> -		syscontroller: syscontroller {
> -			compatible = "microchip,mpfs-sys-controller";
> -			mboxes = <&mbox 0>;
> -		};
>  	};
>  };
> 





  reply	other threads:[~2022-05-09 11:05 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-04 20:30 [PATCH v4 0/8] PolarFire SoC dt for 5.19 Conor Dooley
2022-05-04 20:30 ` Conor Dooley
2022-05-04 20:30 ` [PATCH v4 1/8] riscv: dts: microchip: remove icicle memory clocks Conor Dooley
2022-05-04 20:30   ` Conor Dooley
2022-05-04 20:30 ` [PATCH v4 2/8] riscv: dts: microchip: move sysctrlr out of soc bus Conor Dooley
2022-05-04 20:30   ` Conor Dooley
2022-05-09 11:04   ` Heiko Stübner [this message]
2022-05-09 11:04     ` Heiko Stübner
2022-05-04 20:30 ` [PATCH v4 3/8] riscv: dts: microchip: remove soc vendor from filenames Conor Dooley
2022-05-04 20:30   ` Conor Dooley
2022-05-04 20:30 ` [PATCH v4 4/8] dt-bindings: riscv: microchip: document icicle reference design Conor Dooley
2022-05-04 20:30   ` Conor Dooley
2022-05-04 20:30 ` [PATCH v4 5/8] riscv: dts: microchip: make the fabric dtsi board specific Conor Dooley
2022-05-04 20:30   ` Conor Dooley
2022-05-04 20:30 ` [PATCH v4 6/8] dt-bindings: vendor-prefixes: add Sundance DSP Conor Dooley
2022-05-04 20:30   ` Conor Dooley
2022-05-04 20:30 ` [PATCH v4 7/8] dt-bindings: riscv: microchip: add polarberry compatible string Conor Dooley
2022-05-04 20:30   ` Conor Dooley
2022-05-04 20:30 ` [PATCH v4 8/8] riscv: dts: microchip: add the sundance polarberry Conor Dooley
2022-05-04 20:30   ` Conor Dooley
2022-05-09 11:10   ` Heiko Stübner
2022-05-09 11:10     ` Heiko Stübner
2022-05-09 11:24     ` Conor.Dooley
2022-05-09 11:24       ` Conor.Dooley
2022-05-09 13:07       ` Heiko Stübner
2022-05-09 13:07         ` Heiko Stübner
2022-05-09 13:23         ` Conor.Dooley
2022-05-09 13:23           ` Conor.Dooley

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=2826000.e9J7NaK4W3@diego \
    --to=heiko@sntech.de \
    --cc=Cyril.Jean@microchip.com \
    --cc=aou@eecs.berkeley.edu \
    --cc=arnd@arndb.de \
    --cc=conor.dooley@microchip.com \
    --cc=daire.mcnamara@microchip.com \
    --cc=devicetree@vger.kernel.org \
    --cc=krzk+dt@kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-riscv@lists.infradead.org \
    --cc=mail@conchuod.ie \
    --cc=palmer@dabbelt.com \
    --cc=palmer@rivosinc.com \
    --cc=paul.walmsley@sifive.com \
    --cc=robh+dt@kernel.org \
    --cc=robh@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.