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From: Eric Auger <eauger@redhat.com>
To: Sebastian Ott <sebott@redhat.com>,
	Peter Maydell <peter.maydell@linaro.org>,
	Jonathan Cameron <jonathan.cameron@huawei.com>,
	Alireza Sanaee <alireza.sanaee@huawei.com>,
	Richard Henderson <richard.henderson@linaro.org>,
	Cornelia Huck <cohuck@redhat.com>
Cc: qemu-arm@nongnu.org, qemu-devel@nongnu.org
Subject: Re: [PATCH v3 3/3] arm/kvm: get demuxed ID registers from kvm
Date: Mon, 29 Jun 2026 17:28:39 +0200	[thread overview]
Message-ID: <2c83f650-bfb5-4c59-aa62-db64ba81db81@redhat.com> (raw)
In-Reply-To: <20260622135627.40573-4-sebott@redhat.com>

Hi Sebastian,

On 6/22/26 3:56 PM, Sebastian Ott wrote:
> From: Cornelia Huck <cohuck@redhat.com>
> 
> We now have the infrastructure in place to handle demuxed ID registers
> from kvm. Use it to get the values that kvm emulates for CCSIDR_EL1.
> 
> Tested-by: Alireza Sanaee <alireza.sanaee@huawei.com>
> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
> Signed-off-by: Sebastian Ott <sebott@redhat.com>
> ---
>  target/arm/kvm.c | 32 ++++++++++++++++++++++++++++++++
>  1 file changed, 32 insertions(+)
> 
> diff --git a/target/arm/kvm.c b/target/arm/kvm.c
> index a54ef51ec2..059d361d88 100644
> --- a/target/arm/kvm.c
> +++ b/target/arm/kvm.c
> @@ -244,6 +244,33 @@ static int get_host_cpu_reg(int fd, ARMHostCPUFeatures *ahcf,
>      return ret;
>  }
>  
> +
> +/* CSSELR values; used to index KVM_REG_ARM_DEMUX_ID_CCSIDR */
> +#define CSSELR_MAX 14
where does this value come from? Worth to document
> +
> +static int get_host_cpu_reg_demux(int fd, ARMHostCPUFeatures *ahcf,
> +                                  ARMIDRegisterIdx index, int subindex)
> +{
> +
> +    struct kvm_one_reg one_reg = {
> +        .id = KVM_REG_ARM64 | KVM_REG_SIZE_U32 | KVM_REG_ARM_DEMUX,
> +    };
> +
> +    switch (index) {
> +    case CCSIDR_EL1_IDX:
> +        if (subindex >= CSSELR_MAX) {
Can't we introduce a macro that gets the size of the DEMUX register
instead of hardcoding it?
> +            return -EINVAL;
> +        }
> +        one_reg.id |= KVM_REG_ARM_DEMUX_ID_CCSIDR | subindex;
> +        one_reg.addr = (uintptr_t)&ahcf->isar.idregs[index + subindex];
> +        break;
> +    default:
> +        return -EINVAL;
> +    }
> +
> +    return ioctl(fd, KVM_GET_ONE_REG, &one_reg);
> +}
> +
>  static uint32_t kvm_arm_sve_get_vls(int fd)
>  {
>      uint64_t vls[KVM_ARM64_SVE_VLS_WORDS];
> @@ -286,6 +313,7 @@ static void kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf)
>      bool pmu_supported = false;
>      uint64_t features = 0;
>      int err;
> +    int i;
nit: you can declare it directly with the for (int i = 0
>  
>      ahcf->target = QEMU_KVM_ARM_TARGET_NONE;
>      ahcf->dtb_compatible = "arm,armv8";
> @@ -454,6 +482,10 @@ static void kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf)
>              /* Read the set of supported vector lengths. */
>              arm_host_cpu_features.sve_vq_supported = kvm_arm_sve_get_vls(fd);
>          }
> +        /* Grab demuxed registers. */
> +        for (i = 0; i < CSSELR_MAX; i++) {
> +            err |= get_host_cpu_reg_demux(fd, ahcf, CCSIDR_EL1_IDX, i);
> +        }
>      }
>  
>      kvm_arm_destroy_scratch_host_vcpu(fdarray);

Thanks

Eric



  reply	other threads:[~2026-06-29 15:29 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-06-22 13:56 [PATCH v3 0/3] arm: demuxed ID registers (CCSIDR_EL1) Sebastian Ott
2026-06-22 13:56 ` [PATCH v3 1/3] arm: handle demuxed ID registers Sebastian Ott
2026-06-29 14:33   ` Eric Auger
2026-06-22 13:56 ` [PATCH v3 2/3] arm: handle CCSIDR_EL1 as a demuxed register Sebastian Ott
2026-06-29 15:23   ` Eric Auger
2026-06-30 13:49     ` Cornelia Huck
2026-07-02 13:11     ` Sebastian Ott
2026-06-22 13:56 ` [PATCH v3 3/3] arm/kvm: get demuxed ID registers from kvm Sebastian Ott
2026-06-29 15:28   ` Eric Auger [this message]
2026-07-02 13:14     ` Sebastian Ott

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