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From: CLEMENT MATHIEU--DRIF <clement.mathieu--drif@eviden.com>
To: Zhenzhong Duan <zhenzhong.duan@intel.com>,
	"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>
Cc: "alex.williamson@redhat.com" <alex.williamson@redhat.com>,
	"clg@redhat.com" <clg@redhat.com>,
	"eric.auger@redhat.com" <eric.auger@redhat.com>,
	"mst@redhat.com" <mst@redhat.com>,
	"peterx@redhat.com" <peterx@redhat.com>,
	"jasowang@redhat.com" <jasowang@redhat.com>,
	"jgg@nvidia.com" <jgg@nvidia.com>,
	"nicolinc@nvidia.com" <nicolinc@nvidia.com>,
	"joao.m.martins@oracle.com" <joao.m.martins@oracle.com>,
	"kevin.tian@intel.com" <kevin.tian@intel.com>,
	"yi.l.liu@intel.com" <yi.l.liu@intel.com>,
	"chao.p.peng@intel.com" <chao.p.peng@intel.com>,
	Marcel Apfelbaum <marcel.apfelbaum@gmail.com>,
	Paolo Bonzini <pbonzini@redhat.com>,
	Richard Henderson <richard.henderson@linaro.org>,
	Eduardo Habkost <eduardo@habkost.net>
Subject: Re: [PATCH v2 14/17] intel_iommu: Set default aw_bits to 48 in scalable modren mode
Date: Tue, 6 Aug 2024 06:35:12 +0000	[thread overview]
Message-ID: <2e30f59e-62ad-49e6-bd6e-2a24b33edb4e@eviden.com> (raw)
In-Reply-To: <20240805062727.2307552-15-zhenzhong.duan@intel.com>

Typo in the title : s/modren/modern

Reviewed-by: Clément Mathieu--Drif<clement.mathieu--drif@eviden.com>


On 05/08/2024 08:27, Zhenzhong Duan wrote:
> Caution: External email. Do not open attachments or click links, unless this email comes from a known sender and you know the content is safe.
>
>
> According to VTD spec, stage-1 page table could support 4-level and
> 5-level paging.
>
> However, 5-level paging translation emulation is unsupported yet.
> That means the only supported value for aw_bits is 48.
>
> So default aw_bits to 48 in scalable modern mode. In other cases,
> it is still default to 39 for compatibility.
>
> Add a check to ensure user specified value is 48 in modern mode
> for now.
>
> Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com>
> Reviewed-by: Clément Mathieu--Drif<clement.mathieu--drif@eviden.com>
> ---
>   include/hw/i386/intel_iommu.h |  2 +-
>   hw/i386/intel_iommu.c         | 16 +++++++++++++++-
>   2 files changed, 16 insertions(+), 2 deletions(-)
>
> diff --git a/include/hw/i386/intel_iommu.h b/include/hw/i386/intel_iommu.h
> index b843d069cc..48134bda11 100644
> --- a/include/hw/i386/intel_iommu.h
> +++ b/include/hw/i386/intel_iommu.h
> @@ -45,7 +45,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(IntelIOMMUState, INTEL_IOMMU_DEVICE)
>   #define DMAR_REG_SIZE               0x230
>   #define VTD_HOST_AW_39BIT           39
>   #define VTD_HOST_AW_48BIT           48
> -#define VTD_HOST_ADDRESS_WIDTH      VTD_HOST_AW_39BIT
> +#define VTD_HOST_AW_AUTO            0xff
>   #define VTD_HAW_MASK(aw)            ((1ULL << (aw)) - 1)
>
>   #define DMAR_REPORT_F_INTR          (1)
> diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
> index 317e630e08..5469ab4f9b 100644
> --- a/hw/i386/intel_iommu.c
> +++ b/hw/i386/intel_iommu.c
> @@ -3770,7 +3770,7 @@ static Property vtd_properties[] = {
>                               ON_OFF_AUTO_AUTO),
>       DEFINE_PROP_BOOL("x-buggy-eim", IntelIOMMUState, buggy_eim, false),
>       DEFINE_PROP_UINT8("aw-bits", IntelIOMMUState, aw_bits,
> -                      VTD_HOST_ADDRESS_WIDTH),
> +                      VTD_HOST_AW_AUTO),
>       DEFINE_PROP_BOOL("caching-mode", IntelIOMMUState, caching_mode, FALSE),
>       DEFINE_PROP_BOOL("x-scalable-mode", IntelIOMMUState, scalable_mode, FALSE),
>       DEFINE_PROP_BOOL("snoop-control", IntelIOMMUState, snoop_control, false),
> @@ -4685,6 +4685,14 @@ static bool vtd_decide_config(IntelIOMMUState *s, Error **errp)
>           }
>       }
>
> +    if (s->aw_bits == VTD_HOST_AW_AUTO) {
> +        if (s->scalable_modern) {
> +            s->aw_bits = VTD_HOST_AW_48BIT;
> +        } else {
> +            s->aw_bits = VTD_HOST_AW_39BIT;
> +        }
> +    }
> +
>       if ((s->aw_bits != VTD_HOST_AW_39BIT) &&
>           (s->aw_bits != VTD_HOST_AW_48BIT) &&
>           !s->scalable_modern) {
> @@ -4693,6 +4701,12 @@ static bool vtd_decide_config(IntelIOMMUState *s, Error **errp)
>           return false;
>       }
>
> +    if ((s->aw_bits != VTD_HOST_AW_48BIT) && s->scalable_modern) {
> +        error_setg(errp, "Supported values for aw-bits are: %d",
> +                   VTD_HOST_AW_48BIT);
> +        return false;
> +    }
> +
>       if (s->scalable_mode && !s->dma_drain) {
>           error_setg(errp, "Need to set dma_drain for scalable mode");
>           return false;
> --
> 2.34.1
>

  reply	other threads:[~2024-08-06  6:35 UTC|newest]

Thread overview: 61+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-08-05  6:27 [PATCH v2 00/17] intel_iommu: Enable stage-1 translation for emulated device Zhenzhong Duan
2024-08-05  6:27 ` [PATCH v2 01/17] intel_iommu: Use the latest fault reasons defined by spec Zhenzhong Duan
2024-08-13 10:57   ` Yi Liu
2024-08-14  2:30     ` Duan, Zhenzhong
2024-08-05  6:27 ` [PATCH v2 02/17] intel_iommu: Make pasid entry type check accurate Zhenzhong Duan
2024-08-13 12:10   ` Yi Liu
2024-08-05  6:27 ` [PATCH v2 03/17] intel_iommu: Add a placeholder variable for scalable modern mode Zhenzhong Duan
2024-08-06  6:35   ` CLEMENT MATHIEU--DRIF
2024-08-08 12:31     ` Duan, Zhenzhong
2024-08-08 15:04       ` CLEMENT MATHIEU--DRIF
2024-08-13  2:20         ` Duan, Zhenzhong
2024-08-13  5:22           ` CLEMENT MATHIEU--DRIF
2024-08-13  6:26             ` Duan, Zhenzhong
2024-08-13  6:58               ` CLEMENT MATHIEU--DRIF
2024-08-05  6:27 ` [PATCH v2 04/17] intel_iommu: Flush stage-2 cache in PASID-selective PASID-based iotlb invalidation Zhenzhong Duan
2024-08-06  6:35   ` CLEMENT MATHIEU--DRIF
2024-08-08 12:40     ` Duan, Zhenzhong
2024-08-08 14:56       ` CLEMENT MATHIEU--DRIF
2024-08-13  2:12         ` Duan, Zhenzhong
2024-08-13  7:13           ` CLEMENT MATHIEU--DRIF
2024-08-13  7:18             ` CLEMENT MATHIEU--DRIF
2024-08-14 12:36   ` Yi Liu
2024-08-15  5:48     ` Duan, Zhenzhong
2024-08-19  9:03       ` Yi Liu
2024-08-05  6:27 ` [PATCH v2 05/17] intel_iommu: Rename slpte to pte Zhenzhong Duan
2024-08-05  6:27 ` [PATCH v2 06/17] intel_iommu: Implement stage-1 translation Zhenzhong Duan
2024-08-05  6:27 ` [PATCH v2 07/17] intel_iommu: Check if the input address is canonical Zhenzhong Duan
2024-08-14 12:02   ` Yi Liu
2024-08-16  2:19     ` Duan, Zhenzhong
2024-08-05  6:27 ` [PATCH v2 08/17] intel_iommu: Set accessed and dirty bits during first stage translation Zhenzhong Duan
2024-08-14 11:45   ` Yi Liu
2024-08-16  2:37     ` Duan, Zhenzhong
2024-08-16  4:29       ` CLEMENT MATHIEU--DRIF
2024-08-16  4:22     ` CLEMENT MATHIEU--DRIF
2024-08-05  6:27 ` [PATCH v2 09/17] intel_iommu: Flush stage-1 cache in iotlb invalidation Zhenzhong Duan
2024-08-05  6:27 ` [PATCH v2 10/17] intel_iommu: Process PASID-based " Zhenzhong Duan
2024-08-05  6:27 ` [PATCH v2 11/17] intel_iommu: Add an internal API to find an address space with PASID Zhenzhong Duan
2024-08-05  6:27 ` [PATCH v2 12/17] intel_iommu: Add support for PASID-based device IOTLB invalidation Zhenzhong Duan
2024-08-05  6:27 ` [PATCH v2 13/17] intel_iommu: piotlb invalidation should notify unmap Zhenzhong Duan
2024-08-19  9:35   ` Yi Liu
2024-08-19  9:57     ` Duan, Zhenzhong
2024-08-20  2:43       ` Yi Liu
2024-08-20  2:54         ` Duan, Zhenzhong
2024-08-05  6:27 ` [PATCH v2 14/17] intel_iommu: Set default aw_bits to 48 in scalable modren mode Zhenzhong Duan
2024-08-06  6:35   ` CLEMENT MATHIEU--DRIF [this message]
2024-08-14 12:26   ` Yi Liu
2024-08-15  3:39     ` Duan, Zhenzhong
2024-08-05  6:27 ` [PATCH v2 15/17] intel_iommu: Modify x-scalable-mode to be string option to expose scalable modern mode Zhenzhong Duan
2024-08-06  6:34   ` CLEMENT MATHIEU--DRIF
2024-08-08 12:28     ` Duan, Zhenzhong
2024-08-05  6:27 ` [PATCH v2 16/17] intel_iommu: Introduce a property to control FS1GP cap bit setting Zhenzhong Duan
2024-08-06  6:33   ` CLEMENT MATHIEU--DRIF
2024-08-14 12:22   ` Yi Liu
2024-08-15  3:46     ` Duan, Zhenzhong
2024-08-19  9:30       ` Yi Liu
2024-08-19  9:41         ` Duan, Zhenzhong
2024-08-19 12:16           ` Yi Liu
2024-08-05  6:27 ` [PATCH v2 17/17] tests/qtest: Add intel-iommu test Zhenzhong Duan
2024-08-12  7:29   ` Thomas Huth
2024-09-10 11:29 ` [PATCH v2 00/17] intel_iommu: Enable stage-1 translation for emulated device CLEMENT MATHIEU--DRIF
2024-09-11  2:29   ` Duan, Zhenzhong

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