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From: "Tauro, Riana" <riana.tauro@intel.com>
To: Michal Wajdeczko <michal.wajdeczko@intel.com>,
	"Mallesh, Koujalagi" <mallesh.koujalagi@intel.com>,
	<intel-xe@lists.freedesktop.org>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>,
	Aravind Iddamsetty <aravind.iddamsetty@intel.com>
Subject: Re: [PATCH v3 11/23] drm/xe/log: Extend components list with hardware items
Date: Wed, 12 Aug 2026 14:56:00 +0530	[thread overview]
Message-ID: <3a62d55a-2f57-424d-9015-ae2e4f151803@intel.com> (raw)
In-Reply-To: <c17e6b21-89f2-49ae-9353-af7d99140eeb@intel.com>


On 12-08-2026 14:25, Michal Wajdeczko wrote:
>
> On 8/12/2026 8:55 AM, Tauro, Riana wrote:
>> On 04-08-2026 11:35, Mallesh, Koujalagi wrote:
>>> On 30-07-2026 08:51 pm, Michal Wajdeczko wrote:
>>>> Update our super macro with new top level hardware components.
>>>>
>>>> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
>>> LGTM,
>>> Reviewed-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
>>>> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
>>>> Cc: Aravind Iddamsetty <aravind.iddamsetty@intel.com>
>>>> ---
>>>> v2: follow enum xe_ras_component values (Aravind)
>>>> ---
>>>>    drivers/gpu/drm/xe/abi/xe_log_abi.h | 12 ++++++++++++
>>>>    1 file changed, 12 insertions(+)
>>>>
>>>> diff --git a/drivers/gpu/drm/xe/abi/xe_log_abi.h b/drivers/gpu/drm/xe/abi/xe_log_abi.h
>>>> index 4861a5b58c10..b3373d4b29d5 100644
>>>> --- a/drivers/gpu/drm/xe/abi/xe_log_abi.h
>>>> +++ b/drivers/gpu/drm/xe/abi/xe_log_abi.h
>>>> @@ -129,6 +129,10 @@ enum xe_log_location_bits {
>>>>     *     @SIGID is the default xe_sigid for the component (without the XE_SIGID_ prefix)
>>>>     */
>>>>    #define DEFINE_XE_LOG_COMPONENTS(define) \
>>>> +    DEFINE_XE_LOG_SOFTWARE_COMPONENTS(define) \
>>>> +    DEFINE_XE_LOG_HARDWARE_COMPONENTS(define)
>>>> +
>>>> +#define DEFINE_XE_LOG_SOFTWARE_COMPONENTS(define) \
>>>>        /* */                                    \
>>>>        define(SYSTEM, 1, PCI, SW, "Linux PCI Subsystem")            \
>>>>        define(SYSTEM, 2, DRM, SW, "DRM")                    \
>>>> @@ -156,6 +160,14 @@ enum xe_log_location_bits {
>>>>        define(DRIVER_FIRMWARE, 3, GSC, RUNTIME_FW, "GSC")            \
>>>>        define(DRIVER_FIRMWARE, 16, PCODE, DEVICE_FW, "PCode")            \
>>>>        define(DRIVER_FIRMWARE, 17, SYSCTRL, DEVICE_FW, "System Controller")    \
>>>> +
>>>> +#define DEFINE_XE_LOG_HARDWARE_COMPONENTS(define) \
>>>> +    define(HARDWARE, 1, DEVMEM, DEVICE_MEMORY, "Device Memory")        \
>> DEVICE_MEMORY
> do you mean s/DEVMEM/DEVICE_MEMORY ?
>
>>>> +    define(HARDWARE, 2, HWCORE, CORE_COMPUTE, "Core Compute")        \
>> Core_compute
> and here s/HWCORE/CORE_COMPUTE ?

yes. We have the same names in uapi for netlink and same names are used 
in firmware and L0.
Adding different naming will unnecessary cause confusion.

>
>>>> +    /*     HARDWARE, 3, RESERVED */                        \
>>>> +    define(HARDWARE, 4, PCIE, PCIE, "PCIe Interface")            \
>>>> +    define(HARDWARE, 5, FABRIC, FABRIC, "Fabric")                \
>>>> +    define(HARDWARE, 6, SOC, SOC_INTERNAL, "SoC Internal")            \
>> SOC_INTERNAL
> and here s/SOC/SOC_INTERNAL ?
>
> (btw, is there a plan for SOC_EXTERNAL ?
> if no, why do we want to keep _INTERNAL suffix ?
>> Let's retain the names same as UAPI to avoid unnecessary confusion while collecting CPER logs.
> but those listed here are our local component names
> and just today there is 1:1 relation between those
> HW components and HW SIGIDs, but maybe one day there
> will be more components that would map into existing
> SIGIDs (compare COMP_GUC/HUC --> SIGID_RUNTIME_FW)

For hardware errors, any other error would be part of existing class or 
a new class added.
We don't expect the names to change as it is already part of UAPI for 
netlink and
used by userspace.

>
> the SIGID enum names are intact
> 	XE_SIGID_DEVICE_MEMORY
> 	XE_SIGID_SOC_INTERNAL
> 	..
> and btw I'm not sure that we ever convert SIGID enum values
> (202, 205) into any user facing friendly names
>
> and the idea for having a shorter component names was that
> we are doing dmesg decoration and print friendly component
> and/or location name (except SIGID, which is a raw integer)
>
> 	[drm] ERROR SIGID=104 (-EPROTO) Tile0: GT0: GUC: blah
> 	[drm] ERROR SIGID=202 (123456789012) Tile0: DEVMEM: blah
> 	[drm] ERROR SIGID=205 (123456789012) Tile1: SOC: blah

Okay for software errors. But for hardware errors it would be good to 
have consistency


Thanks
Riana

>
> having those lengthy names does not look nice:
>
> 	[drm] ERROR SIGID=202 (123456789012) Tile0: DEVICE_MEMORY: blah
> 	[drm] ERROR SIGID=205 (123456789012) Tile1: SOC_INTERNAL: blah
>
> besides, in dmesg only "SIGID=%u" chunk is part of our contract
>
> in CPER, all SIGID and component and location will be stored
> as plain numbers and how those numbers will be decoded is beyond us
>
> btw, maybe component decoration should be before location?
>
> 	[drm] ERROR SIGID=104 (-EPROTO) GUC: Tile0: GT0: blah
> 	[drm] ERROR SIGID=202 (123456789012) DEVICE_MEMORY: Tile1: blah
> 	[drm] ERROR SIGID=205 (123456789012) SOC_INTERNAL: Tile1: blah
>
> (see patch 4/23)
>
>> These names were asked to be retained similar to actual hardware error classification even for uapi.
>>
>> ++@Aravind
>>
>> Thanks
>> Riana
>>
>>
>>>>        /* eod */
>>>>      /**

  reply	other threads:[~2026-08-12  9:26 UTC|newest]

Thread overview: 73+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-30 15:20 [PATCH v3 00/23] drm/xe: Add structured SIGID error logging infrastructure Michal Wajdeczko
2026-07-30 15:20 ` [PATCH v3 02/23] drm/xe/log: " Michal Wajdeczko
2026-08-04 15:00   ` Tauro, Riana
2026-08-04 18:52     ` Rodrigo Vivi
2026-08-05 17:23       ` Michal Wajdeczko
2026-08-05 18:58         ` Rodrigo Vivi
2026-08-04 21:21   ` Summers, Stuart
2026-08-04 21:22     ` Summers, Stuart
2026-08-05  1:39       ` Rodrigo Vivi
2026-08-05  1:36     ` Rodrigo Vivi
2026-08-05 22:24       ` Summers, Stuart
2026-08-06 11:31         ` Michal Wajdeczko
2026-08-06 19:10           ` Summers, Stuart
2026-08-06 19:46             ` Rodrigo Vivi
2026-08-07 12:31   ` Mallesh, Koujalagi
2026-08-12 11:43   ` Nilawar, Badal
2026-07-30 15:21 ` [PATCH v3 05/23] drm/xe/log: Add SIGID log helpers for severity Michal Wajdeczko
2026-08-03  8:23   ` Mallesh, Koujalagi
2026-07-30 15:21 ` [PATCH v3 06/23] drm/xe/log: Add SIGID log helpers for location Michal Wajdeczko
2026-08-03  8:50   ` Mallesh, Koujalagi
2026-07-30 15:21 ` [PATCH v3 07/23] drm/xe/log: Add SIGID log helpers for location & severity Michal Wajdeczko
2026-08-03  8:58   ` Mallesh, Koujalagi
2026-07-30 15:21 ` [PATCH v3 08/23] drm/xe/log: Add SIGID log helpers for components Michal Wajdeczko
2026-08-03 12:42   ` Mallesh, Koujalagi
2026-07-30 15:21 ` [PATCH v3 09/23] drm/xe/log: Add SIGID log helpers for errno-only Michal Wajdeczko
2026-08-04  4:56   ` Mallesh, Koujalagi
2026-07-30 15:21 ` [PATCH v3 10/23] drm/xe/log: Add hardware error signatures Michal Wajdeczko
2026-07-31 11:41   ` Mallesh, Koujalagi
2026-08-04 15:56     ` Michal Wajdeczko
2026-08-12  7:00       ` Tauro, Riana
2026-08-12  8:24         ` Michal Wajdeczko
2026-08-12  9:29           ` Tauro, Riana
2026-08-12 10:19             ` Michal Wajdeczko
2026-07-30 15:21 ` [PATCH v3 12/23] drm/xe/ras: Check RAS and LOG component definitions Michal Wajdeczko
2026-08-10 11:31   ` Mallesh, Koujalagi
2026-07-30 15:21 ` [PATCH v3 13/23] drm/xe/kunit: Setup driver data in the test device Michal Wajdeczko
2026-08-11 14:25   ` Mallesh, Koujalagi
2026-07-30 15:21 ` [PATCH v3 14/23] drm/xe/tests: Add Kunit tests for xe_log Michal Wajdeczko
2026-08-12 11:15   ` Mallesh, Koujalagi
2026-07-30 15:21 ` [PATCH v3 16/23] drm/xe: Report 'probe blocked' error using SIGID Michal Wajdeczko
2026-08-11  9:11   ` Mallesh, Koujalagi
2026-07-30 15:21 ` [PATCH v3 17/23] drm/xe: Report 'device wedged' errors " Michal Wajdeczko
2026-08-07  9:56   ` Mallesh, Koujalagi
2026-08-07 10:24     ` Michal Wajdeczko
2026-08-12  0:32       ` Mallesh, Koujalagi
2026-07-30 15:21 ` [PATCH v3 18/23] drm/xe: Report 'Survivability Mode' " Michal Wajdeczko
2026-08-07 11:18   ` Mallesh, Koujalagi
2026-08-07 12:14     ` Michal Wajdeczko
2026-08-12  4:47       ` Mallesh, Koujalagi
2026-07-30 15:21 ` [PATCH v3 20/23] drm/xe/pcode: Report 'Mailbox failed' error " Michal Wajdeczko
2026-08-11  9:54   ` Mallesh, Koujalagi
2026-07-30 15:21 ` [PATCH v3 22/23] drm/xe/gt: Report 'pagefault' errors " Michal Wajdeczko
2026-08-12  6:40   ` Mallesh, Koujalagi
2026-07-30 15:21 ` [PATCH v3 23/23] drm/xe/pci: Report 'cannot re-enable' error " Michal Wajdeczko
2026-08-12  6:58   ` Mallesh, Koujalagi
2026-08-12  9:23     ` Michal Wajdeczko
2026-08-12 10:35       ` Mallesh, Koujalagi
2026-07-30 15:40 ` ✗ CI.checkpatch: warning for drm/xe: Add structured SIGID error logging infrastructure (rev3) Patchwork
2026-07-30 15:41 ` ✓ CI.KUnit: success " Patchwork
2026-07-30 16:17 ` ✗ Xe.CI.BAT: failure " Patchwork
2026-08-04 16:00   ` Michal Wajdeczko
2026-07-30 18:31 ` ✗ Xe.CI.FULL: " Patchwork
2026-08-04 16:05   ` Michal Wajdeczko
     [not found] ` <20260730152121.576-4-michal.wajdeczko@intel.com>
2026-08-03  8:00   ` [PATCH v3 03/23] drm/xe/log: Introduce structured component/location identifiers Mallesh, Koujalagi
2026-08-04 15:19     ` Michal Wajdeczko
2026-08-12  0:09       ` Mallesh, Koujalagi
     [not found] ` <20260730152121.576-12-michal.wajdeczko@intel.com>
2026-08-04  6:05   ` [PATCH v3 11/23] drm/xe/log: Extend components list with hardware items Mallesh, Koujalagi
2026-08-12  6:55     ` Tauro, Riana
2026-08-12  8:55       ` Michal Wajdeczko
2026-08-12  9:26         ` Tauro, Riana [this message]
     [not found] ` <20260730152121.576-22-michal.wajdeczko@intel.com>
2026-08-12  6:31   ` [PATCH v3 21/23] drm/xe/gt: Report 'reset failed' errors using SIGID Mallesh, Koujalagi
     [not found] ` <20260730152121.576-20-michal.wajdeczko@intel.com>
2026-08-12 10:52   ` [PATCH v3 19/23] drm/xe/guc: Report 'GuC mmio' " Mallesh, Koujalagi
     [not found] ` <20260730152121.576-16-michal.wajdeczko@intel.com>
2026-08-12 11:33   ` [PATCH v3 15/23] drm/xe/tests: Add kunit tests for xe_any Mallesh, Koujalagi

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