Re: [PATCH v2 14/15] target/ppc: Restrict ATTN / SCV / PMINSN helpers to TCG

[Harsh Prateek Bora <harshpb@linux.ibm.com>]

On 1/27/25 15:56, Philippe Mathieu-Daudé wrote:
> Move helper_attn(), helper_scv() and helper_pminsn() to
> tcg-excp_helper.c.
> 
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>

Reviewed-by: Harsh Prateek Bora <harshpb@linux.ibm.com>

> ---
>   target/ppc/excp_helper.c     | 45 ------------------------------------
>   target/ppc/tcg-excp_helper.c | 39 +++++++++++++++++++++++++++++++
>   2 files changed, 39 insertions(+), 45 deletions(-)
> 
> diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
> index f0e734e1412..2deed155987 100644
> --- a/target/ppc/excp_helper.c
> +++ b/target/ppc/excp_helper.c
> @@ -400,21 +400,6 @@ static void powerpc_set_excp_state(PowerPCCPU *cpu, target_ulong vector,
>       env->reserve_addr = -1;
>   }
>   
> -#ifdef CONFIG_TCG
> -#if defined(TARGET_PPC64) && !defined(CONFIG_USER_ONLY)
> -void helper_attn(CPUPPCState *env)
> -{
> -    /* POWER attn is unprivileged when enabled by HID, otherwise illegal */
> -    if ((*env->check_attn)(env)) {
> -        powerpc_checkstop(env, "host executed attn");
> -    } else {
> -        raise_exception_err(env, POWERPC_EXCP_HV_EMU,
> -                            POWERPC_EXCP_INVAL | POWERPC_EXCP_INVAL_INVAL);
> -    }
> -}
> -#endif
> -#endif /* CONFIG_TCG */
> -
>   static void powerpc_mcheck_checkstop(CPUPPCState *env)
>   {
>       /* KVM guests always have MSR[ME] enabled */
> @@ -2445,36 +2430,6 @@ void helper_ppc_maybe_interrupt(CPUPPCState *env)
>       ppc_maybe_interrupt(env);
>   }
>   
> -#ifdef TARGET_PPC64
> -void helper_scv(CPUPPCState *env, uint32_t lev)
> -{
> -    if (env->spr[SPR_FSCR] & (1ull << FSCR_SCV)) {
> -        raise_exception_err(env, POWERPC_EXCP_SYSCALL_VECTORED, lev);
> -    } else {
> -        raise_exception_err(env, POWERPC_EXCP_FU, FSCR_IC_SCV);
> -    }
> -}
> -
> -void helper_pminsn(CPUPPCState *env, uint32_t insn)
> -{
> -    CPUState *cs = env_cpu(env);
> -
> -    cs->halted = 1;
> -
> -    /* Condition for waking up at 0x100 */
> -    env->resume_as_sreset = (insn != PPC_PM_STOP) ||
> -        (env->spr[SPR_PSSCR] & PSSCR_EC);
> -
> -    /* HDECR is not to wake from PM state, it may have already fired */
> -    if (env->resume_as_sreset) {
> -        PowerPCCPU *cpu = env_archcpu(env);
> -        ppc_set_irq(cpu, PPC_INTERRUPT_HDECR, 0);
> -    }
> -
> -    ppc_maybe_interrupt(env);
> -}
> -#endif /* TARGET_PPC64 */
> -
>   static void do_rfi(CPUPPCState *env, target_ulong nip, target_ulong msr)
>   {
>       /* MSR:POW cannot be set by any form of rfi */
> diff --git a/target/ppc/tcg-excp_helper.c b/target/ppc/tcg-excp_helper.c
> index 5ad39cacc92..4517b458b79 100644
> --- a/target/ppc/tcg-excp_helper.c
> +++ b/target/ppc/tcg-excp_helper.c
> @@ -499,6 +499,45 @@ void ppc_tcg_hv_emu(CPUPPCState *env, target_ulong *new_msr,
>       *new_msr |= env->msr & ((target_ulong)1 << MSR_RI);
>   }
>   
> +void helper_attn(CPUPPCState *env)
> +{
> +    /* POWER attn is unprivileged when enabled by HID, otherwise illegal */
> +    if ((*env->check_attn)(env)) {
> +        powerpc_checkstop(env, "host executed attn");
> +    } else {
> +        raise_exception_err(env, POWERPC_EXCP_HV_EMU,
> +                            POWERPC_EXCP_INVAL | POWERPC_EXCP_INVAL_INVAL);
> +    }
> +}
> +
> +void helper_scv(CPUPPCState *env, uint32_t lev)
> +{
> +    if (env->spr[SPR_FSCR] & (1ull << FSCR_SCV)) {
> +        raise_exception_err(env, POWERPC_EXCP_SYSCALL_VECTORED, lev);
> +    } else {
> +        raise_exception_err(env, POWERPC_EXCP_FU, FSCR_IC_SCV);
> +    }
> +}
> +
> +void helper_pminsn(CPUPPCState *env, uint32_t insn)
> +{
> +    CPUState *cs = env_cpu(env);
> +
> +    cs->halted = 1;
> +
> +    /* Condition for waking up at 0x100 */
> +    env->resume_as_sreset = (insn != PPC_PM_STOP) ||
> +        (env->spr[SPR_PSSCR] & PSSCR_EC);
> +
> +    /* HDECR is not to wake from PM state, it may have already fired */
> +    if (env->resume_as_sreset) {
> +        PowerPCCPU *cpu = env_archcpu(env);
> +        ppc_set_irq(cpu, PPC_INTERRUPT_HDECR, 0);
> +    }
> +
> +    ppc_maybe_interrupt(env);
> +}
> +
>   #endif /* TARGET_PPC64 */
>   
>   #endif /* !CONFIG_USER_ONLY */