Re: [PATCH -next v2 0/2]riscv: some refactorings realted to uaccess and extable

From: Tong Tiangen <tongtiangen@huawei.com>
To: Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Palmer Dabbelt <palmer@rivosinc.com>,
	Albert Ou <aou@eecs.berkeley.edu>, <Conor.Dooley@microchip.com>
Cc: <linux-riscv@lists.infradead.org>, <linux-kernel@vger.kernel.org>,
	<wangkefeng.wang@huawei.com>, Guohanjun <guohanjun@huawei.com>
Subject: Re: [PATCH -next v2 0/2]riscv: some refactorings realted to uaccess and extable
Date: Wed, 24 Aug 2022 14:31:48 +0800	[thread overview]
Message-ID: <4063da85-b110-4afd-2023-59d4da41c27f@huawei.com> (raw)
In-Reply-To: <20220815032025.2685516-1-tongtiangen@huawei.com>

Hi riscv maintainers, kindly ping...

Thanks,
Tong.

在 2022/8/15 11:20, Tong Tiangen 写道:
> This patchset do some refactorings related to riscv's uaccess and extable,
> mainly for the usage of __get/put_user_nocheck() which not distinguish user
> access and kernel access.
> 
> v1 -> v2:
>    According to Conor's suggestion, split into two logically independent
>    patches.
> 
> Tong Tiangen (2):
>    riscv: uaccess: rename __get/put_user_nocheck to __get/put_mem_nocheck
>    riscv: extable: add new extable type EX_TYPE_KACCESS_ERR_ZERO support
> 
>   arch/riscv/include/asm/asm-extable.h |  12 ++
>   arch/riscv/include/asm/uaccess.h     | 162 +++++++++++++--------------
>   arch/riscv/mm/extable.c              |   1 +
>   3 files changed, 94 insertions(+), 81 deletions(-)
> 

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