[PATCH] CPUFreq Support for PXA255

[PATCH] CPUFreq Support for PXA255

[Ian Campbell]

Hi, 

Below is a patch adding cpufreq support for the PXA255 Xscale processor.
I'd appreciate review from you guys with a view to getting it merged
(after 2.6.13 I guess).

The driver was originally from Intrinsyc Software and spent some time in
the old -bkpxa tree. Since then I've tweaked it a little and have been
using it successfully for some time.

I'll also submit to the ARM kernel mailing list, since I know at least
one of the lists is subscriber only I didn't CC it now. When it comes to
merging would via the ARM or cpufreq maintainer be preferable?

Signed-off-by: Ian Campbell <icampbell@arcom.com>

Index: 2.6/arch/arm/Kconfig
===================================================================
--- 2.6.orig/arch/arm/Kconfig	2005-07-14 09:15:37.000000000 +0100
+++ 2.6/arch/arm/Kconfig	2005-07-14 09:18:06.000000000 +0100
@@ -516,7 +516,7 @@
 
 endmenu
 
-if (ARCH_SA1100 || ARCH_INTEGRATOR || ARCH_OMAP1)
+if (ARCH_SA1100 || ARCH_INTEGRATOR || ARCH_OMAP1 || ARCH_PXA)
 
 menu "CPU Frequency scaling"
 
@@ -543,6 +543,12 @@
 
 	  If in doubt, say Y.
 
+config CPU_FREQ_PXA
+	bool
+	select CPU_FREQ_TABLE
+	depends on CPU_FREQ && ARCH_PXA
+	default y
+
 endmenu
 
 endif
Index: 2.6/arch/arm/mach-pxa/Makefile
===================================================================
--- 2.6.orig/arch/arm/mach-pxa/Makefile	2005-07-14 09:15:37.000000000 +0100
+++ 2.6/arch/arm/mach-pxa/Makefile	2005-07-14 10:56:50.000000000 +0100
@@ -24,6 +24,7 @@
 
 # Misc features
 obj-$(CONFIG_PM) += pm.o sleep.o
+obj-$(CONFIG_CPU_FREQ) += cpu-pxa.o
 
 ifeq ($(CONFIG_PXA27x),y)
 obj-$(CONFIG_PM) += standby.o
Index: 2.6/arch/arm/mach-pxa/cpu-pxa.c
===================================================================
--- /dev/null	1970-01-01 00:00:00.000000000 +0000
+++ 2.6/arch/arm/mach-pxa/cpu-pxa.c	2005-07-14 10:57:04.000000000 +0100
@@ -0,0 +1,330 @@
+/*
+ *  linux/arch/arm/mach-pxa/cpu-pxa.c
+ *
+ *  Copyright (C) 2002,2003 Intrinsyc Software
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ * History:
+ *   31-Jul-2002 : Initial version [FB]
+ *   29-Jan-2003 : added PXA255 support [FB]
+ *   20-Apr-2003 : ported to v2.5 (Dustin McIntire, Sensoria Corp.)
+ *
+ * Note:
+ *   This driver may change the memory bus clock rate, but will not do any
+ *   platform specific access timing changes... for example if you have flash
+ *   memory connected to CS0, you will need to register a platform specific
+ *   notifier which will adjust the memory access strobes to maintain a
+ *   minimum strobe width.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/sched.h>
+#include <linux/init.h>
+#include <linux/cpufreq.h>
+#include <linux/cpumask.h>
+#include <linux/moduleparam.h>
+
+#include <asm/hardware.h>
+
+#include <asm/arch/pxa-regs.h>
+
+#define DEBUG  0
+
+#ifdef DEBUG
+static unsigned int freq_debug = DEBUG;
+module_param(freq_debug, int, 0);
+MODULE_PARM_DESC(freq_debug, "Set the debug messages to on=1/off=0");
+#else
+#define freq_debug  0
+#endif
+
+typedef struct {
+	unsigned int khz;
+	unsigned int membus;
+	unsigned int cccr;
+	unsigned int div2;
+} pxa_freqs_t;
+
+/* Define the refresh period in mSec for the SDRAM and the number of rows */
+#define SDRAM_TREF          64		/* standard 64ms SDRAM */
+#define SDRAM_ROWS          8192	/* 64MB=8192 32MB=4096 */
+#define MDREFR_DRI(x)       ((x*SDRAM_TREF)/(SDRAM_ROWS*32))
+
+#define CCLKCFG_TURBO       0x1
+#define CCLKCFG_FCS         0x2
+#define PXA25x_MIN_FREQ     99532
+#define PXA25x_MAX_FREQ     398131
+#define MDREFR_DB2_MASK     (MDREFR_K2DB2 | MDREFR_K1DB2)
+#define MDREFR_DRI_MASK     0xFFF
+
+/* Use the run mode frequencies for the CPUFREQ_POLICY_PERFORMANCE policy */
+static pxa_freqs_t pxa255_run_freqs[] = {
+	/* CPU   MEMBUS  CCCR  DIV2 */
+	{99532,   99532, 0x121, 1},	/* run= 99, turbo= 99, PXbus=50,  SDRAM=50 */
+	{132710, 132710, 0x123, 1},	/* run=133, turbo=133, PXbus=66,  SDRAM=66 */
+	{199065,  99532, 0x141, 0},	/* run=199, turbo=199, PXbus=99,  SDRAM=99 */
+	{265421, 132710, 0x143, 1},	/* run=265, turbo=265, PXbus=133, SDRAM=66 */
+	{331776, 165888, 0x145, 1},	/* run=331, turbo=331, PXbus=166, SDRAM=83 */
+	{398131,  99532, 0x161, 0},	/* run=398, turbo=398, PXbus=196, SDRAM=99 */
+	{0,}
+};
+
+static struct cpufreq_frequency_table pxa255_run_freq_table[ARRAY_SIZE(pxa255_run_freqs) + 1];
+
+/* Use the turbo mode frequencies for the CPUFREQ_POLICY_POWERSAVE policy */
+static pxa_freqs_t pxa255_turbo_freqs[] = {
+	/* CPU   MEMBUS  CCCR  DIV2 */
+	{99532,  99532, 0x121, 1},	/* run=99,  turbo= 99, PXbus=50, SDRAM=50 */
+	{199065, 99532, 0x221, 0},	/* run=99,  turbo=199, PXbus=50, SDRAM=99 */
+	{298598, 99532, 0x321, 0},	/* run=99,  turbo=287, PXbus=50, SDRAM=99 */
+	{398131, 99532, 0x241, 0},	/* run=199, turbo=398, PXbus=99, SDRAM=99 */
+	{0,}
+};
+
+static struct cpufreq_frequency_table pxa255_turbo_freq_table[ARRAY_SIZE(pxa255_turbo_freqs) + 1];
+
+extern unsigned get_clk_frequency_khz(int info);
+
+static unsigned int max_frequency = PXA25x_MAX_FREQ;
+
+/*
+ * This option can be used if you have one of the 200MHz PXA255 parts by adding
+ * cpu_pxa.max_frequency=199065 to the kernel command line
+ */
+module_param(max_frequency, int, 0);
+MODULE_PARM_DESC(max_frequency, "Set the maximum cpu frequency");
+
+static void pxa_select_freq_table(struct cpufreq_policy *policy,
+				  pxa_freqs_t ** settings,
+				  struct cpufreq_frequency_table **table)
+{
+	if (strcmp(policy->governor->name, "performance") == 0) {
+		if (settings)
+			*settings = pxa255_run_freqs;
+		if (table)
+			*table = pxa255_run_freq_table;
+	} else {
+		if (settings)
+			*settings = pxa255_turbo_freqs;
+		if (table)
+			*table = pxa255_turbo_freq_table;
+	}
+}
+
+/* find a valid frequency point */
+static int pxa_verify_policy(struct cpufreq_policy *policy)
+{
+	int ret;
+	struct cpufreq_frequency_table *pxa_freqs_table;
+
+	pxa_select_freq_table(policy, NULL, &pxa_freqs_table);
+
+	ret = cpufreq_frequency_table_verify(policy, pxa_freqs_table);
+
+	if (freq_debug) {
+		printk("Verified CPU policy: %dKhz min to %dKhz max\n",
+		       policy->min, policy->max);
+	}
+
+	return ret;
+}
+
+static int pxa_set_target(struct cpufreq_policy *policy,
+			  unsigned int target_freq, unsigned int relation)
+{
+	int idx;
+	cpumask_t cpus_allowed;
+	int cpu = policy->cpu;
+	struct cpufreq_freqs freqs;
+	pxa_freqs_t *pxa_freq_settings;
+	struct cpufreq_frequency_table *pxa_freqs_table;
+	unsigned long flags;
+	unsigned int unused;
+	unsigned int preset_mdrefr, postset_mdrefr;
+	void *ramstart;
+
+	/*
+	 * Save this threads cpus_allowed mask.
+	 */
+	cpus_allowed = current->cpus_allowed;
+
+	/*
+	 * Bind to the specified CPU.  When this call returns,
+	 * we should be running on the right CPU.
+	 */
+	set_cpus_allowed(current, cpumask_of_cpu(cpu));
+	BUG_ON(cpu != smp_processor_id());
+
+	/* Get the current policy */
+	pxa_select_freq_table(policy, &pxa_freq_settings, &pxa_freqs_table);
+
+	/* Lookup the next frequency */
+	if (cpufreq_frequency_table_target(policy, pxa_freqs_table,
+					   target_freq, relation, &idx))
+		return -EINVAL;
+
+	freqs.old = get_clk_frequency_khz(0);
+	freqs.new = pxa_freq_settings[idx].khz;
+	freqs.cpu = policy->cpu;
+	if (freq_debug) {
+		printk(KERN_INFO
+		       "Changing CPU frequency to %d.%03d Mhz (SDRAM %d Mhz).\n",
+		       freqs.new / 1000, freqs.new % 1000,
+		       (pxa_freq_settings[idx].div2) ? 
+		       (pxa_freq_settings[idx].membus / 2000) :
+		       (pxa_freq_settings[idx].membus / 1000));
+	}
+
+	ramstart = phys_to_virt(0xa0000000);
+
+	/*
+	 * Tell everyone what we're about to do...
+	 * you should add a notify client with any platform specific
+	 * Vcc changing capability
+	 */
+	cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
+
+	/* Calculate the next MDREFR.  If we're slowing down the SDRAM clock
+	 * we need to preset the smaller DRI before the change.  If we're speeding
+	 * up we need to set the larger DRI value after the change.
+	 */
+	preset_mdrefr = postset_mdrefr = MDREFR;
+	if ((MDREFR & MDREFR_DRI_MASK) > MDREFR_DRI(pxa_freq_settings[idx].membus)) {
+		preset_mdrefr = (preset_mdrefr & ~MDREFR_DRI_MASK) |
+			MDREFR_DRI(pxa_freq_settings[idx].membus);
+	}
+	postset_mdrefr = (postset_mdrefr & ~MDREFR_DRI_MASK) |
+		MDREFR_DRI(pxa_freq_settings[idx].membus);
+
+	/* If we're dividing the memory clock by two for the SDRAM clock, this
+	 * must be set prior to the change.  Clearing the divide must be done
+	 * after the change.
+	 */
+	if (pxa_freq_settings[idx].div2) {
+		preset_mdrefr |= MDREFR_DB2_MASK;
+		postset_mdrefr |= MDREFR_DB2_MASK;
+	} else {
+		postset_mdrefr &= ~MDREFR_DB2_MASK;
+	}
+
+	local_irq_save(flags);
+
+	/* Set new the CCCR */
+	CCCR = pxa_freq_settings[idx].cccr;
+
+	__asm__ __volatile__("                              \
+        ldr r4, [%1] ;          /* load MDREFR */           \
+        b   2f ;                                            \
+        .align  5 ;                                         \
+1:                                                          \
+        str %4, [%1] ;          /* preset the MDREFR */     \
+        mcr p14, 0, %2, c6, c0, 0 ; /* set CCLKCFG[FCS] */  \
+        str %5, [%1] ;          /* postset the MDREFR */    \
+                                                            \
+        b   3f       ;                                      \
+2:      b   1b       ;                                      \
+3:      nop          ;                                      \
+        "
+	: "=&r"(unused)
+	: "r"(&MDREFR), "r"(CCLKCFG_TURBO | CCLKCFG_FCS),
+	  "r"(ramstart), "r"(preset_mdrefr),
+	  "r"(postset_mdrefr)
+	: "r4", "r5");
+	local_irq_restore(flags);
+
+	/*
+	 * Restore the CPUs allowed mask.
+	 */
+	set_cpus_allowed(current, cpus_allowed);
+
+	/*
+	 * Tell everyone what we've just done...
+	 * you should add a notify client with any platform specific
+	 * SDRAM refresh timer adjustments
+	 */
+	cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
+
+	return 0;
+}
+
+static unsigned int pxa_cpufreq_get(unsigned int cpu)
+{
+	return get_clk_frequency_khz(0);
+}
+
+static int pxa_cpufreq_init(struct cpufreq_policy *policy)
+{
+	cpumask_t cpus_allowed;
+	unsigned int cpu = policy->cpu;
+	int i;
+
+	cpus_allowed = current->cpus_allowed;
+
+	set_cpus_allowed(current, cpumask_of_cpu(cpu));
+	BUG_ON(cpu != smp_processor_id());
+
+	/* set default policy and cpuinfo */
+	policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
+	policy->cpuinfo.max_freq = max_frequency;
+	policy->cpuinfo.min_freq = PXA25x_MIN_FREQ;
+	policy->cpuinfo.transition_latency = 1000;	/* FIXME: 1 ms, assumed */
+	policy->cur = get_clk_frequency_khz(0);		/* current freq */
+	policy->min = policy->max = policy->cur;
+
+	/* Generate the run cpufreq_frequency_table struct */
+	for (i = 0; i < ARRAY_SIZE(pxa255_run_freqs); i++) {
+		pxa255_run_freq_table[i].frequency = pxa255_run_freqs[i].khz;
+		pxa255_run_freq_table[i].index = i;
+	}
+	pxa255_run_freq_table[i].frequency = CPUFREQ_TABLE_END;
+	/* Generate the turbo cpufreq_frequency_table struct */
+	for (i = 0; i < ARRAY_SIZE(pxa255_turbo_freqs); i++) {
+		pxa255_turbo_freq_table[i].frequency = pxa255_turbo_freqs[i].khz;
+		pxa255_turbo_freq_table[i].index = i;
+	}
+	pxa255_turbo_freq_table[i].frequency = CPUFREQ_TABLE_END;
+
+	set_cpus_allowed(current, cpus_allowed);
+	printk(KERN_INFO "PXA CPU frequency change support initialized\n");
+
+	return 0;
+}
+
+static struct cpufreq_driver pxa_cpufreq_driver = {
+	.verify	= pxa_verify_policy,
+	.target	= pxa_set_target,
+	.init	= pxa_cpufreq_init,
+	.get	= pxa_cpufreq_get,
+	.name	= "PXA25x",
+};
+
+static int __init pxa_cpu_init(void)
+{
+	return cpufreq_register_driver(&pxa_cpufreq_driver);
+}
+
+static void __exit pxa_cpu_exit(void)
+{
+	cpufreq_unregister_driver(&pxa_cpufreq_driver);
+}
+
+MODULE_AUTHOR("Intrinsyc Software Inc.");
+MODULE_DESCRIPTION("CPU frequency changing driver for the PXA architecture");
+MODULE_LICENSE("GPL");
+module_init(pxa_cpu_init);
+module_exit(pxa_cpu_exit);
Index: 2.6/Documentation/cpu-freq/user-guide.txt
===================================================================
--- 2.6.orig/Documentation/cpu-freq/user-guide.txt	2005-07-14 09:15:37.000000000 +0100
+++ 2.6/Documentation/cpu-freq/user-guide.txt	2005-07-14 09:18:06.000000000 +0100
@@ -18,7 +18,7 @@
 Contents:
 ---------
 1. Supported Architectures and Processors
-1.1 ARM
+1.1 ARM, PXA
 1.2 x86
 1.3 sparc64
 1.4 ppc
@@ -37,14 +37,15 @@
 1. Supported Architectures and Processors
 =========================================
 
-1.1 ARM
--------
+1.1 ARM, PXA
+------------
 
 The following ARM processors are supported by cpufreq:
 
 ARM Integrator
 ARM-SA1100
 ARM-SA1110
+Intel PXA
 
 
 1.2 x86
Index: 2.6/drivers/cpufreq/Kconfig
===================================================================
--- 2.6.orig/drivers/cpufreq/Kconfig	2005-07-14 09:15:37.000000000 +0100
+++ 2.6/drivers/cpufreq/Kconfig	2005-07-14 09:18:06.000000000 +0100
@@ -52,7 +52,7 @@
 
 choice
 	prompt "Default CPUFreq governor"
-	default CPU_FREQ_DEFAULT_GOV_USERSPACE if CPU_FREQ_SA1100 || CPU_FREQ_SA1110
+	default CPU_FREQ_DEFAULT_GOV_USERSPACE if CPU_FREQ_SA1100 || CPU_FREQ_SA1110 || CPU_FREQ_PXA
 	default CPU_FREQ_DEFAULT_GOV_PERFORMANCE
 	help
 	  This option sets which CPUFreq governor shall be loaded at


-- 
Ian Campbell, Senior Design Engineer
                                        Web: http://www.arcom.com
Arcom, Clifton Road,                    Direct: +44 (0)1223 403 465
Cambridge CB1 7EA, United Kingdom       Phone:  +44 (0)1223 411 200


_____________________________________________________________________
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Re: [PATCH] CPUFreq Support for PXA255

[Eric Piel]

14.07.2005 13:40, Ian Campbell wrote/a écrit:
> Hi, 
Hello,

I don't know so much about cpufreq, so only very few comments:
> ===================================================================
> --- /dev/null	1970-01-01 00:00:00.000000000 +0000
> +++ 2.6/arch/arm/mach-pxa/cpu-pxa.c	2005-07-14 10:57:04.000000000 +0100
> +
> +static void pxa_select_freq_table(struct cpufreq_policy *policy,
> +				  pxa_freqs_t ** settings,
> +				  struct cpufreq_frequency_table **table)
> +{
> +	if (strcmp(policy->governor->name, "performance") == 0) {
> +		if (settings)
> +			*settings = pxa255_run_freqs;
> +		if (table)
> +			*table = pxa255_run_freq_table;
> +	} else {
> +		if (settings)
> +			*settings = pxa255_turbo_freqs;
> +		if (table)
> +			*table = pxa255_turbo_freq_table;
> +	}
> +}
So your driver depends on a hard-coded name of a governor ? It seems 
suspicious...


> +
> +static int pxa_set_target(struct cpufreq_policy *policy,
> +			  unsigned int target_freq, unsigned int relation)
> +{
:
> +
> +	/* Get the current policy */
> +	pxa_select_freq_table(policy, &pxa_freq_settings, &pxa_freqs_table);
> +
> +	/* Lookup the next frequency */
> +	if (cpufreq_frequency_table_target(policy, pxa_freqs_table,
> +					   target_freq, relation, &idx))
> +		return -EINVAL;
> +
> +	freqs.old = get_clk_frequency_khz(0);
> +	freqs.new = pxa_freq_settings[idx].khz;
It's probably a good idea to include such a code:
	if (freqs.new == freqs.old)
		return 0;

This avoid to do lots of things while it would change nothing.


> +static int pxa_cpufreq_init(struct cpufreq_policy *policy)
> +{
:
> +	policy->cpuinfo.min_freq = PXA25x_MIN_FREQ;
> +	policy->cpuinfo.transition_latency = 1000;	/* FIXME: 1 ms, assumed */
If you want to say 1ms, you have to write 1000000 (it's in nanosecond). 
This value is quite important for the ondemand governor so if you have 
better knowledge of the latency, don't hesitate to fix it!

> +
> +static struct cpufreq_driver pxa_cpufreq_driver = {
> +	.verify	= pxa_verify_policy,
> +	.target	= pxa_set_target,
> +	.init	= pxa_cpufreq_init,
> +	.get	= pxa_cpufreq_get,
> +	.name	= "PXA25x",
> +};
Not sure it's a good idea to put the name in uppercase.

Eric

Re: [PATCH] CPUFreq Support for PXA255

[Ian Campbell]

On Thu, 2005-07-14 at 15:32 +0200, Eric Piel wrote:
> 14.07.2005 13:40, Ian Campbell wrote/a écrit:
> > Hi, 
> Hello,
> 
> I don't know so much about cpufreq, so only very few comments:
> > ===================================================================
> > --- /dev/null	1970-01-01 00:00:00.000000000 +0000
> > +++ 2.6/arch/arm/mach-pxa/cpu-pxa.c	2005-07-14 10:57:04.000000000 +0100
> > +
> > +static void pxa_select_freq_table(struct cpufreq_policy *policy,
> > +				  pxa_freqs_t ** settings,
> > +				  struct cpufreq_frequency_table **table)
> > +{
> > +	if (strcmp(policy->governor->name, "performance") == 0) {
> > +		if (settings)
> > +			*settings = pxa255_run_freqs;
> > +		if (table)
> > +			*table = pxa255_run_freq_table;
> > +	} else {
> > +		if (settings)
> > +			*settings = pxa255_turbo_freqs;
> > +		if (table)
> > +			*table = pxa255_turbo_freq_table;
> > +	}
> > +}
> So your driver depends on a hard-coded name of a governor ? It seems 
> suspicious...

I'm not entirely happy about this either, but let me explain...

The PXA255 has essentially two orthogonal sets of available frequencies,
and it is possible to get e.g. 400MHz using either one, but with
different power consumption vs performance trades.

One of the sets of frequencies is achieved by modifying the "run mode
multiplier" which costs power but gives best performance while the other
involves modifying the "turbo mode multiplier" which uses less power for
a given speed but at the cost of some performance. 

So the code selects the run mode freqs for the performance governor but
turbo for the powersave governor + any others. I did it this way because
it is an embedded processor which often can run from a battery so I
figured it makes sense to select the best power consumption over
performance unless explicitly requested. I couldn't see another method
in the cpufreq framework to select between the two modes, I guess it
could be a command line or module parameter option or something.

> [snip]

Thanks for your other comments, I'll make those changes.

Ian.

-- 
Ian Campbell, Senior Design Engineer
                                        Web: http://www.arcom.com
Arcom, Clifton Road,                    Direct: +44 (0)1223 403 465
Cambridge CB1 7EA, United Kingdom       Phone:  +44 (0)1223 411 200


_____________________________________________________________________
The message in this transmission is sent in confidence for the attention of the addressee only and should not be disclosed to any other party. Unauthorised recipients are requested to preserve this confidentiality. Please advise the sender if the addressee is not resident at the receiving end.  Email to and from Arcom is automatically monitored for operational and lawful business reasons.

This message has been virus scanned by MessageLabs.

Re: [PATCH] CPUFreq Support for PXA255

[Dominik Brodowski]

Hi,

On Thu, Jul 14, 2005 at 12:40:56PM +0100, Ian Campbell wrote:
> +#define DEBUG  0
> +
> +#ifdef DEBUG
> +static unsigned int freq_debug = DEBUG;
> +module_param(freq_debug, int, 0);
> +MODULE_PARM_DESC(freq_debug, "Set the debug messages to on=1/off=0");
> +#else
> +#define freq_debug  0
> +#endif

Please use the cpufreq debug infrastructure for this:

#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "pxa", msg)

> +typedef struct {
> +	unsigned int khz;
> +	unsigned int membus;
> +	unsigned int cccr;
> +	unsigned int div2;
> +} pxa_freqs_t;

Don't use typedefs, please. Just name it "struct pxa_freqs"

> +static void pxa_select_freq_table(struct cpufreq_policy *policy,
> +				  pxa_freqs_t ** settings,
> +				  struct cpufreq_frequency_table **table)
> +{
> +	if (strcmp(policy->governor->name, "performance") == 0) {
> +		if (settings)
> +			*settings = pxa255_run_freqs;
> +		if (table)
> +			*table = pxa255_run_freq_table;
> +	} else {
> +		if (settings)
> +			*settings = pxa255_turbo_freqs;
> +		if (table)
> +			*table = pxa255_turbo_freq_table;
> +	}
> +}

As noted by Eric Piel already, please use a module parameter combined with a
sysfs file instead.

> +	if (freq_debug) {
> +		printk("Verified CPU policy: %dKhz min to %dKhz max\n",
> +		       policy->min, policy->max);
> +	}

	dprintk("Verified ...);

> +	cpumask_t cpus_allowed;

Is this a SMP-capable platform?

> +	policy->cpuinfo.transition_latency = 1000;	/* FIXME: 1 ms, assumed */

1000000

> +1.1 ARM, PXA
> +------------
>  
>  The following ARM processors are supported by cpufreq:
>  
>  ARM Integrator
>  ARM-SA1100
>  ARM-SA1110
> +Intel PXA

Is the PXA just a sub-architecture of ARM?

>  choice
>  	prompt "Default CPUFreq governor"
> -	default CPU_FREQ_DEFAULT_GOV_USERSPACE if CPU_FREQ_SA1100 || CPU_FREQ_SA1110
> +	default CPU_FREQ_DEFAULT_GOV_USERSPACE if CPU_FREQ_SA1100 || CPU_FREQ_SA1110 || CPU_FREQ_PXA

Why is that?


Except the two-tables-issue I'd like to see solved differently, it's good
code IMHO.

	Dominik

Re: [PATCH] CPUFreq Support for PXA255

[Ian Campbell]

On Fri, 2005-07-15 at 18:41 +0200, Dominik Brodowski wrote:

Thanks for you comments. 

I've snipped the bits for changes that I've already done.

> > +static void pxa_select_freq_table(struct cpufreq_policy *policy,
> > +                               pxa_freqs_t ** settings,
> > +                               struct cpufreq_frequency_table
> **table)
> > +{
> [SNIP]
> > +}
> 
> As noted by Eric Piel already, please use a module parameter combined
> with a sysfs file instead.
> 
I've got it working with a module parameter so cpu_pxa.performance=1
allows selection of the performance table at boot time. 

This also creates /sys/module/cpu_pxa/parameters/performance which can
be written to and takes effect on the next frequency change. Is this
acceptable or should I look for a way to add a sysfs file
to /sys/devices/system/cpu/cpu0/cpufreq? The advantage would be
immediate application of the change (I think...)

> > +	cpumask_t cpus_allowed;
> 
> Is this a SMP-capable platform?

I don't really know to be honest -- there are SMP ARM's in the world but
I don't know if that will ever extend to the PXA. I doubt it, but I've
asked on the ARM kernel list.

> Is the PXA just a sub-architecture of ARM?

That's right, it's one of Intel's ARM implementations, it takes over
from their StrongARM stuff. The PXA line is quite commonly found in
PDAs.

> >  choice
> >  	prompt "Default CPUFreq governor"
> > -	default CPU_FREQ_DEFAULT_GOV_USERSPACE if CPU_FREQ_SA1100 || CPU_FREQ_SA1110
> > +	default CPU_FREQ_DEFAULT_GOV_USERSPACE if CPU_FREQ_SA1100 || CPU_FREQ_SA1110 || CPU_FREQ_PXA
> 
> Why is that?

I've no idea -- I just copied the StrongARM stuff. My guess is that
someone decided that PERFORMANCE wasn't suitable as the default for an
"embedded" platform. I think I'll probably just drop this chunk since
you can always choose via config anyway. I've pinged the ARM list just
in case there is a more pressing reason.

Ian.

-- 
Ian Campbell, Senior Design Engineer
                                        Web: http://www.arcom.com
Arcom, Clifton Road,                    Direct: +44 (0)1223 403 465
Cambridge CB1 7EA, United Kingdom       Phone:  +44 (0)1223 411 200


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Re: [PATCH] CPUFreq Support for PXA255

[Dominik Brodowski]

Hi,

On Mon, Jul 18, 2005 at 12:02:06PM +0100, Ian Campbell wrote:
> On Fri, 2005-07-15 at 18:41 +0200, Dominik Brodowski wrote:
> > > +static void pxa_select_freq_table(struct cpufreq_policy *policy,
> > > +                               pxa_freqs_t ** settings,
> > > +                               struct cpufreq_frequency_table
> > **table)
> > > +{
> > [SNIP]
> > > +}
> > 
> > As noted by Eric Piel already, please use a module parameter combined
> > with a sysfs file instead.
> > 
> I've got it working with a module parameter so cpu_pxa.performance=1
> allows selection of the performance table at boot time. 
> 
> This also creates /sys/module/cpu_pxa/parameters/performance which can
> be written to and takes effect on the next frequency change. Is this
> acceptable or should I look for a way to add a sysfs file
> to /sys/devices/system/cpu/cpu0/cpufreq? The advantage would be
> immediate application of the change (I think...)

Tough question. As sysfs supports links... could you try adding a link from
/sys/devices/system/cpu/cpu0/performance_mode to
/sys/module/cpu_pxa/parameters/performance ?

> > >  choice
> > >  	prompt "Default CPUFreq governor"
> > > -	default CPU_FREQ_DEFAULT_GOV_USERSPACE if CPU_FREQ_SA1100 || CPU_FREQ_SA1110
> > > +	default CPU_FREQ_DEFAULT_GOV_USERSPACE if CPU_FREQ_SA1100 || CPU_FREQ_SA1110 || CPU_FREQ_PXA
> > 
> > Why is that?
> 
> I've no idea -- I just copied the StrongARM stuff. My guess is that
> someone decided that PERFORMANCE wasn't suitable as the default for an
> "embedded" platform. I think I'll probably just drop this chunk since
> you can always choose via config anyway. I've pinged the ARM list just
> in case there is a more pressing reason.

I added it to maintain backwards compatibility. AFAICS, there is no real
reason to copy this behaviour to new drivers.

Thanks,
	Dominik

Re: [PATCH] CPUFreq Support for PXA255

[Ian Campbell]

On Mon, 2005-07-18 at 14:01 +0200, Dominik Brodowski wrote:
> > This also creates /sys/module/cpu_pxa/parameters/performance which can
> > be written to and takes effect on the next frequency change. Is this
> > acceptable or should I look for a way to add a sysfs file
> > to /sys/devices/system/cpu/cpu0/cpufreq? The advantage would be
> > immediate application of the change (I think...)
> 
> Tough question. As sysfs supports links... could you try adding a link from
> /sys/devices/system/cpu/cpu0/performance_mode to
> /sys/module/cpu_pxa/parameters/performance ?

I can certainly try, although I suspect you'll see me on linux-kernel in
about an hour soliciting help from the sysfs guys ;-)

> > > >  choice
> > > >  	prompt "Default CPUFreq governor"
> > > > -	default CPU_FREQ_DEFAULT_GOV_USERSPACE if CPU_FREQ_SA1100 || CPU_FREQ_SA1110
> > > > +	default CPU_FREQ_DEFAULT_GOV_USERSPACE if CPU_FREQ_SA1100 || CPU_FREQ_SA1110 || CPU_FREQ_PXA
> > > 
> > > Why is that?
> > 
> > I've no idea -- I just copied the StrongARM stuff. My guess is that
> > someone decided that PERFORMANCE wasn't suitable as the default for an
> > "embedded" platform. I think I'll probably just drop this chunk since
> > you can always choose via config anyway. I've pinged the ARM list just
> > in case there is a more pressing reason.
> 
> I added it to maintain backwards compatibility. AFAICS, there is no real
> reason to copy this behaviour to new drivers.

K, I'll drop that bit then. Thanks.

Ian.

-- 
Ian Campbell, Senior Design Engineer
                                        Web: http://www.arcom.com
Arcom, Clifton Road,                    Direct: +44 (0)1223 403 465
Cambridge CB1 7EA, United Kingdom       Phone:  +44 (0)1223 411 200


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Re: [PATCH] CPUFreq Support for PXA255

[Ian Campbell]

On Mon, 2005-07-18 at 13:11 +0100, Ian Campbell wrote:
> On Mon, 2005-07-18 at 14:01 +0200, Dominik Brodowski wrote:
> > > This also creates /sys/module/cpu_pxa/parameters/performance which can
> > > be written to and takes effect on the next frequency change. Is this
> > > acceptable or should I look for a way to add a sysfs file
> > > to /sys/devices/system/cpu/cpu0/cpufreq? The advantage would be
> > > immediate application of the change (I think...)
> > 
> > Tough question. As sysfs supports links... could you try adding a link from
> > /sys/devices/system/cpu/cpu0/performance_mode to
> > /sys/module/cpu_pxa/parameters/performance ?
> 
> I can certainly try, although I suspect you'll see me on linux-kernel in
> about an hour soliciting help from the sysfs guys ;-)

As near as I can tell this isn't going to be possible because when the
module is built in there is no kobject that I can get my hands on to use
as the target, since mkobj is faked out in
kernel/params.c:kernel_param_sysfs_setup() and THIS_MODULE is NULL
anyway.

So I've decided just add a freq_attr for the value, keeping the module
param (but mode == 0) to set the initial value.

I want to make it transition to the new set of frequencies immediately
instead of waiting for the next frequency change. I have:

        static ssize_t store_pxa_mode_attr(struct cpufreq_policy * policy, const char *buf, size_t count)
        {
        	unsigned int ret = -EINVAL;
        	char str[16];
        
        	ret = sscanf (buf, "%15s", str);
        	if (ret != 1)
        		return -EINVAL;
        
        	if (strnicmp(str,"performance",16)==0)
        		performance = 1;
        	else
        		performance = 0;
        	
        	ret = cpufreq_governor(policy->cpu, CPUFREQ_GOV_START);
        
        	return ret ? ret : count;
        }

I'm not sure about the call to cpufreq_governor to "restart" the current
governor (and hence apply the new timings), it looks ok from the current
code, and appears to work, but I don't want to rely on undefined
behaviour. Is it OK?

I'll probably end up calling the attribute "pxa2xx_freq_model" unless
anyone has a better idea.

Cheers,
Ian.

(incidentally -- the init of ret = -EINVAL above came from store_one()
in cpufreq.c and seems to be extraneous since ret is immediately
assigned to there as well, I'll drop it here -- I just left it as a hook
for this aside ;-). The space after sscanf too.).

-- 
Ian Campbell, Senior Design Engineer
                                        Web: http://www.arcom.com
Arcom, Clifton Road,                    Direct: +44 (0)1223 403 465
Cambridge CB1 7EA, United Kingdom       Phone:  +44 (0)1223 411 200

Re: [PATCH] CPUFreq Support for PXA255

[Dominik Brodowski]

On Mon, Jul 18, 2005 at 03:31:34PM +0100, Ian Campbell wrote:
> On Mon, 2005-07-18 at 13:11 +0100, Ian Campbell wrote:
> > On Mon, 2005-07-18 at 14:01 +0200, Dominik Brodowski wrote:
> > > > This also creates /sys/module/cpu_pxa/parameters/performance which can
> > > > be written to and takes effect on the next frequency change. Is this
> > > > acceptable or should I look for a way to add a sysfs file
> > > > to /sys/devices/system/cpu/cpu0/cpufreq? The advantage would be
> > > > immediate application of the change (I think...)
> > > 
> > > Tough question. As sysfs supports links... could you try adding a link from
> > > /sys/devices/system/cpu/cpu0/performance_mode to
> > > /sys/module/cpu_pxa/parameters/performance ?
> > 
> > I can certainly try, although I suspect you'll see me on linux-kernel in
> > about an hour soliciting help from the sysfs guys ;-)
> 
> As near as I can tell this isn't going to be possible because when the
> module is built in there is no kobject that I can get my hands on to use
> as the target, since mkobj is faked out in
> kernel/params.c:kernel_param_sysfs_setup() and THIS_MODULE is NULL
> anyway.
> 
> So I've decided just add a freq_attr for the value, keeping the module
> param (but mode == 0) to set the initial value.
> 
> I want to make it transition to the new set of frequencies immediately
> instead of waiting for the next frequency change. I have:
> 
>         static ssize_t store_pxa_mode_attr(struct cpufreq_policy * policy, const char *buf, size_t count)
>         {
>         	unsigned int ret = -EINVAL;
>         	char str[16];
>         
>         	ret = sscanf (buf, "%15s", str);
>         	if (ret != 1)
>         		return -EINVAL;
>         
>         	if (strnicmp(str,"performance",16)==0)
>         		performance = 1;
>         	else
>         		performance = 0;
>         	
>         	ret = cpufreq_governor(policy->cpu, CPUFREQ_GOV_START);
>         
>         	return ret ? ret : count;
>         }
> 
> I'm not sure about the call to cpufreq_governor to "restart" the current
> governor (and hence apply the new timings), it looks ok from the current
> code, and appears to work, but I don't want to rely on undefined
> behaviour. Is it OK?
No. Just call 
		cpufreq_update_policy(policy->cpu);
instead.

Thanks,
	Dominik

Re: [PATCH] CPUFreq Support for PXA255

[Ian Campbell]

On Mon, 2005-07-18 at 17:03 +0200, Dominik Brodowski wrote:
> >         	ret = cpufreq_governor(policy->cpu, CPUFREQ_GOV_START);

> No. Just call 
> 		cpufreq_update_policy(policy->cpu);
> instead.

Thanks -- don't know how I missed that one.

Ian.

-- 
Ian Campbell, Senior Design Engineer
                                        Web: http://www.arcom.com
Arcom, Clifton Road,                    Direct: +44 (0)1223 403 465
Cambridge CB1 7EA, United Kingdom       Phone:  +44 (0)1223 411 200


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Re: [PATCH] CPUFreq Support for PXA255

[Ian Campbell]

On Thu, 2005-07-14 at 12:40 +0100, Ian Campbell wrote:
> Below is a patch adding cpufreq support for the PXA255 Xscale processor.
> I'd appreciate review from you guys with a view to getting it merged
> (after 2.6.13 I guess).

Thanks for all your comments. Here is an updated version, changes
include:

      * use pxa25x as name throughout. 
      * remove SMP support. 
      * support selection of performance vs. powersave via a sysfs
        file/module parameter instead of by looking at the governor
        (requested/suggested by cpufreq list).
      * some other bits and pieces...

If you are happy with it then please apply.

Signed-off-by: Ian Campbell <icampbell@arcom.com>

%status
external
%patch
Index: 2.6/arch/arm/Kconfig
===================================================================
--- 2.6.orig/arch/arm/Kconfig	2005-07-19 11:02:53.000000000 +0100
+++ 2.6/arch/arm/Kconfig	2005-07-19 11:03:23.000000000 +0100
@@ -516,7 +516,7 @@
 
 endmenu
 
-if (ARCH_SA1100 || ARCH_INTEGRATOR || ARCH_OMAP1)
+if (ARCH_SA1100 || ARCH_INTEGRATOR || ARCH_OMAP1 || ARCH_PXA)
 
 menu "CPU Frequency scaling"
 
@@ -543,6 +543,12 @@
 
 	  If in doubt, say Y.
 
+config CPU_FREQ_PXA25x
+	bool
+	select CPU_FREQ_TABLE
+	depends on CPU_FREQ && PXA25x
+	default y
+
 endmenu
 
 endif
Index: 2.6/arch/arm/mach-pxa/Makefile
===================================================================
--- 2.6.orig/arch/arm/mach-pxa/Makefile	2005-07-19 11:02:53.000000000 +0100
+++ 2.6/arch/arm/mach-pxa/Makefile	2005-07-19 11:03:23.000000000 +0100
@@ -22,6 +22,9 @@
 
 obj-$(CONFIG_LEDS) += $(led-y)
 
+# CPU freq support
+obj-$(CONFIG_CPU_FREQ_PXA25x) += cpu-pxa25x.o
+
 # Misc features
 obj-$(CONFIG_PM) += pm.o sleep.o
 
Index: 2.6/Documentation/cpu-freq/user-guide.txt
===================================================================
--- 2.6.orig/Documentation/cpu-freq/user-guide.txt	2005-07-19 11:02:53.000000000 +0100
+++ 2.6/Documentation/cpu-freq/user-guide.txt	2005-07-19 11:03:23.000000000 +0100
@@ -45,6 +45,7 @@
 ARM Integrator
 ARM-SA1100
 ARM-SA1110
+Intel XScale PXA25x
 
 
 1.2 x86
Index: 2.6/arch/arm/mach-pxa/cpu-pxa25x.c
===================================================================
--- /dev/null	1970-01-01 00:00:00.000000000 +0000
+++ 2.6/arch/arm/mach-pxa/cpu-pxa25x.c	2005-07-19 11:03:23.000000000 +0100
@@ -0,0 +1,351 @@
+/*
+ *  linux/arch/arm/mach-pxa/cpu-pxa.c
+ *
+ *  Copyright (C) 2002,2003 Intrinsyc Software
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ * History:
+ *   31-Jul-2002 : Initial version [FB]
+ *   29-Jan-2003 : added PXA255 support [FB]
+ *   20-Apr-2003 : ported to v2.5 (Dustin McIntire, Sensoria Corp.)
+ *   18-Jul-2005 : updated for latest kernel (2.6.13-rc), cleanup for submission
+ *                 (Ian Campbell, Arcom Control Systems)
+ *
+ * Note:
+ *   This driver may change the memory bus clock rate, but will not do any
+ *   platform specific access timing changes... for example if you have flash
+ *   memory connected to CS0, you will need to register a platform specific
+ *   notifier which will adjust the memory access strobes to maintain a
+ *   minimum strobe width.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/sched.h>
+#include <linux/init.h>
+#include <linux/cpufreq.h>
+#include <linux/moduleparam.h>
+
+#include <asm/hardware.h>
+
+#include <asm/arch/pxa-regs.h>
+
+#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "pxa25x", msg)
+
+struct pxa_freqs {
+	unsigned int khz;
+	unsigned int membus;
+	unsigned int cccr;
+	unsigned int div2;
+};
+
+/* Define the refresh period in mSec for the SDRAM and the number of rows */
+#define SDRAM_TREF          64		/* standard 64ms SDRAM */
+#define SDRAM_ROWS          8192	/* 64MB=8192 32MB=4096 */
+#define MDREFR_DRI(x)       ((x*SDRAM_TREF)/(SDRAM_ROWS*32))
+
+#define CCLKCFG_TURBO       0x1
+#define CCLKCFG_FCS         0x2
+#define PXA25x_MIN_FREQ     99532
+#define PXA25x_MAX_FREQ     398131
+#define MDREFR_DB2_MASK     (MDREFR_K2DB2 | MDREFR_K1DB2)
+#define MDREFR_DRI_MASK     0xFFF
+
+/* Use the run mode frequencies for performance */
+static struct pxa_freqs pxa25x_performance_freqs[] = {
+	/* CPU   MEMBUS  CCCR   DIV2 */
+	{99532,   99532, 0x121, 1},	/* run= 99, turbo= 99, PXbus=50,  SDRAM=50 */
+	{132710, 132710, 0x123, 1},	/* run=133, turbo=133, PXbus=66,  SDRAM=66 */
+	{199065,  99532, 0x141, 0},	/* run=199, turbo=199, PXbus=99,  SDRAM=99 */
+	{265421, 132710, 0x143, 1},	/* run=265, turbo=265, PXbus=133, SDRAM=66 */
+	{331776, 165888, 0x145, 1},	/* run=331, turbo=331, PXbus=166, SDRAM=83 */
+	{398131,  99532, 0x161, 0},	/* run=398, turbo=398, PXbus=196, SDRAM=99 */
+};
+
+static struct cpufreq_frequency_table pxa25x_performance_freq_table[ARRAY_SIZE(pxa25x_performance_freqs)+1];
+
+/* Use the turbo mode frequencies for powersave */
+static struct pxa_freqs pxa25x_powersave_freqs[] = {
+	/* CPU   MEMBUS CCCR   DIV2 */
+	{99532,  99532, 0x121, 1},	/* run=99,  turbo= 99, PXbus=50, SDRAM=50 */
+	{199065, 99532, 0x221, 0},	/* run=99,  turbo=199, PXbus=50, SDRAM=99 */
+	{298598, 99532, 0x321, 0},	/* run=99,  turbo=287, PXbus=50, SDRAM=99 */
+	{398131, 99532, 0x241, 0},	/* run=199, turbo=398, PXbus=99, SDRAM=99 */
+};
+
+static struct cpufreq_frequency_table pxa25x_powersave_freq_table[ARRAY_SIZE(pxa25x_powersave_freqs)+1];
+
+extern unsigned get_clk_frequency_khz(int info);
+
+static unsigned int max_frequency = PXA25x_MAX_FREQ;
+static int performance = 0;
+
+/*
+ * This option can be used if you have one of the 200MHz PXA25x parts by adding
+ * cpu_pxa25x.max_frequency=199065 to the kernel command line
+ */
+module_param(max_frequency, int, 0);
+MODULE_PARM_DESC(max_frequency, "Set the maximum cpu frequency");
+
+module_param(performance, int, 0);
+MODULE_PARM_DESC(performance, "Use performance instead of powersave frequency tables");
+
+static void pxa_select_freq_table(struct cpufreq_policy *policy,
+				  struct pxa_freqs ** settings,
+				  struct cpufreq_frequency_table **table)
+{
+	cpufreq_frequency_table_put_attr(policy->cpu);
+
+	if (performance) {
+		dprintk("selecting performance tables\n");
+		cpufreq_frequency_table_get_attr(pxa25x_performance_freq_table, policy->cpu);
+		if (settings)
+			*settings = pxa25x_performance_freqs;
+		if (table)
+			*table = pxa25x_performance_freq_table;
+	} else {
+		dprintk("selecting powersave tables\n");
+		cpufreq_frequency_table_get_attr(pxa25x_powersave_freq_table, policy->cpu);
+		if (settings)
+			*settings = pxa25x_powersave_freqs;
+		if (table)
+			*table = pxa25x_powersave_freq_table;
+	}
+}
+
+/* find a valid frequency point */
+static int pxa_verify_policy(struct cpufreq_policy *policy)
+{
+	int ret;
+	struct cpufreq_frequency_table *pxa_freqs_table;
+
+	pxa_select_freq_table(policy, NULL, &pxa_freqs_table);
+
+	ret = cpufreq_frequency_table_verify(policy, pxa_freqs_table);
+
+	dprintk("verified CPU policy: %dKhz min to %dKhz max\n",
+		policy->min, policy->max);
+
+	return ret;
+}
+
+static int pxa_set_target(struct cpufreq_policy *policy,
+			  unsigned int target_freq, unsigned int relation)
+{
+	int idx;
+	struct cpufreq_freqs freqs;
+	struct pxa_freqs *pxa_freq_settings;
+	struct cpufreq_frequency_table *pxa_freqs_table;
+	unsigned long flags;
+	unsigned int unused;
+	unsigned int preset_mdrefr, postset_mdrefr;
+	void *ramstart;
+
+	/* Get the current policy */
+	pxa_select_freq_table(policy, &pxa_freq_settings, &pxa_freqs_table);
+
+	/* Lookup the next frequency */
+	if (cpufreq_frequency_table_target(policy, pxa_freqs_table,
+					   target_freq, relation, &idx))
+		return -EINVAL;
+
+	freqs.old = get_clk_frequency_khz(0);
+	freqs.new = pxa_freq_settings[idx].khz;
+	freqs.cpu = policy->cpu;
+
+	if (freqs.new == freqs.old && pxa_freq_settings[idx].cccr == CCCR)
+		return 0;
+
+	dprintk("changing CPU frequency to %d.%03d Mhz (SDRAM %d Mhz, CCCR %#04x)\n",
+		freqs.new / 1000, freqs.new % 1000,
+		(pxa_freq_settings[idx].div2) ?
+		(pxa_freq_settings[idx].membus / 2000) :
+		(pxa_freq_settings[idx].membus / 1000),
+		pxa_freq_settings[idx].cccr);
+
+	ramstart = phys_to_virt(0xa0000000);
+
+	/*
+	 * Tell everyone what we're about to do...
+	 * you should add a notify client with any platform specific
+	 * Vcc changing capability
+	 */
+	cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
+
+	/* Calculate the next MDREFR.  If we're slowing down the SDRAM clock
+	 * we need to preset the smaller DRI before the change.  If we're speeding
+	 * up we need to set the larger DRI value after the change.
+	 */
+	preset_mdrefr = postset_mdrefr = MDREFR;
+	if ((MDREFR & MDREFR_DRI_MASK) > MDREFR_DRI(pxa_freq_settings[idx].membus)) {
+		preset_mdrefr = (preset_mdrefr & ~MDREFR_DRI_MASK) |
+			MDREFR_DRI(pxa_freq_settings[idx].membus);
+	}
+	postset_mdrefr = (postset_mdrefr & ~MDREFR_DRI_MASK) |
+		MDREFR_DRI(pxa_freq_settings[idx].membus);
+
+	/* If we're dividing the memory clock by two for the SDRAM clock, this
+	 * must be set prior to the change.  Clearing the divide must be done
+	 * after the change.
+	 */
+	if (pxa_freq_settings[idx].div2) {
+		preset_mdrefr |= MDREFR_DB2_MASK;
+		postset_mdrefr |= MDREFR_DB2_MASK;
+	} else {
+		postset_mdrefr &= ~MDREFR_DB2_MASK;
+	}
+
+	local_irq_save(flags);
+
+	/* Set new the CCCR */
+	CCCR = pxa_freq_settings[idx].cccr;
+
+	__asm__ __volatile__("                              \
+        ldr r4, [%1] ;          /* load MDREFR */           \
+        b   2f ;                                            \
+        .align  5 ;                                         \
+1:                                                          \
+        str %4, [%1] ;          /* preset the MDREFR */     \
+        mcr p14, 0, %2, c6, c0, 0 ; /* set CCLKCFG[FCS] */  \
+        str %5, [%1] ;          /* postset the MDREFR */    \
+                                                            \
+        b   3f       ;                                      \
+2:      b   1b       ;                                      \
+3:      nop          ;                                      \
+        "
+	: "=&r"(unused)
+	: "r"(&MDREFR), "r"(CCLKCFG_TURBO | CCLKCFG_FCS),
+	  "r"(ramstart), "r"(preset_mdrefr),
+	  "r"(postset_mdrefr)
+	: "r4", "r5");
+	local_irq_restore(flags);
+
+	/*
+	 * Tell everyone what we've just done...
+	 * you should add a notify client with any platform specific
+	 * SDRAM refresh timer adjustments
+	 */
+	cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
+
+	return 0;
+}
+
+static unsigned int pxa_cpufreq_get(unsigned int cpu)
+{
+	return get_clk_frequency_khz(0);
+}
+
+static int pxa_cpufreq_init(struct cpufreq_policy *policy)
+{
+	int i;
+
+	if (policy->cpu != 0)
+		return -ENODEV;
+
+	/* set default policy and cpuinfo */
+	policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
+	policy->cpuinfo.max_freq = max_frequency;
+	policy->cpuinfo.min_freq = PXA25x_MIN_FREQ;
+	policy->cpuinfo.transition_latency = 1000000;	/* FIXME: 1 ms, assumed */
+	policy->cur = get_clk_frequency_khz(0);		/* current freq */
+	policy->min = policy->max = policy->cur;
+
+	/* Generate the run cpufreq_frequency_table struct */
+	for (i = 0; i < ARRAY_SIZE(pxa25x_performance_freqs); i++) {
+		pxa25x_performance_freq_table[i].frequency = pxa25x_performance_freqs[i].khz;
+		pxa25x_performance_freq_table[i].index = i;
+	}
+	pxa25x_performance_freq_table[i].frequency = CPUFREQ_TABLE_END;
+
+	/* Generate the turbo cpufreq_frequency_table struct */
+	for (i = 0; i < ARRAY_SIZE(pxa25x_powersave_freqs); i++) {
+		pxa25x_powersave_freq_table[i].frequency = pxa25x_powersave_freqs[i].khz;
+		pxa25x_powersave_freq_table[i].index = i;
+	}
+	pxa25x_powersave_freq_table[i].frequency = CPUFREQ_TABLE_END;
+
+	/* calls cpufreq_frequency_table_get_attr */
+	pxa_select_freq_table(policy, NULL, NULL);
+
+	printk(KERN_INFO "pxa25x: CPU frequency change support initialized (%s tables)\n",
+	       performance ? "performance" : "powersave");
+
+	return 0;
+}
+
+static ssize_t show_pxa25x_freq_model_attr(struct cpufreq_policy * policy, char *buf)
+{
+	return sprintf (buf, "%s\n", performance ? "performance" : "powersave");
+}
+
+static ssize_t store_pxa25x_freq_model_attr(struct cpufreq_policy * policy, const char *buf, size_t count)
+{
+	unsigned int ret;
+	char str[16];
+
+	ret = sscanf(buf, "%15s", str);
+	if (ret != 1)
+		return -EINVAL;
+
+	if (strnicmp(str,"performance",16)==0)
+		performance = 1;
+	else if (strnicmp(str,"powersave",16)==0)
+		performance = 0;
+	else
+		return -EINVAL;
+
+	ret = cpufreq_update_policy(policy->cpu);
+
+	return ret ? ret : count;
+}
+
+struct freq_attr pxa25x_freq_model_attr = {
+	.attr = { .name = "pxa25x_freq_model", .mode = 0644, .owner=THIS_MODULE },
+	.show = show_pxa25x_freq_model_attr,
+	.store = store_pxa25x_freq_model_attr,
+};
+
+static struct freq_attr* pxa_cpufreq_attr[] = {
+        &cpufreq_freq_attr_scaling_available_freqs,
+	&pxa25x_freq_model_attr,
+        NULL,
+};
+
+static struct cpufreq_driver pxa_cpufreq_driver = {
+	.verify	= pxa_verify_policy,
+	.target	= pxa_set_target,
+	.init	= pxa_cpufreq_init,
+	.get	= pxa_cpufreq_get,
+	.name	= "pxa25x",
+	.attr	= pxa_cpufreq_attr,
+};
+
+static int __init pxa_cpu_init(void)
+{
+	return cpufreq_register_driver(&pxa_cpufreq_driver);
+}
+
+static void __exit pxa_cpu_exit(void)
+{
+	cpufreq_unregister_driver(&pxa_cpufreq_driver);
+}
+
+MODULE_AUTHOR("Intrinsyc Software Inc.");
+MODULE_DESCRIPTION("CPU frequency changing driver for the PXA architecture");
+MODULE_LICENSE("GPL");
+module_init(pxa_cpu_init);
+module_exit(pxa_cpu_exit);


-- 
Ian Campbell, Senior Design Engineer
                                        Web: http://www.arcom.com
Arcom, Clifton Road,                    Direct: +44 (0)1223 403 465
Cambridge CB1 7EA, United Kingdom       Phone:  +44 (0)1223 411 200

Re: [PATCH] CPUFreq Support for PXA255

[Dominik Brodowski]

Hi,

On Tue, Jul 19, 2005 at 11:15:02AM +0100, Ian Campbell wrote:
> +static int pxa_set_target(struct cpufreq_policy *policy,
> +			  unsigned int target_freq, unsigned int relation)
> +{
> +	int idx;
> +	struct cpufreq_freqs freqs;
> +	struct pxa_freqs *pxa_freq_settings;
> +	struct cpufreq_frequency_table *pxa_freqs_table;
> +	unsigned long flags;
> +	unsigned int unused;
> +	unsigned int preset_mdrefr, postset_mdrefr;
> +	void *ramstart;
> +
> +	/* Get the current policy */
> +	pxa_select_freq_table(policy, &pxa_freq_settings, &pxa_freqs_table);

In my opinion you should only switch between the tables in verify. Only then
can we assure that the ->min and ->max values provided are OK at this
moment.

> +	/* set default policy and cpuinfo */
> +	policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
> +	policy->cpuinfo.max_freq = max_frequency;
> +	policy->cpuinfo.min_freq = PXA25x_MIN_FREQ;
> +	policy->cpuinfo.transition_latency = 1000000;	/* FIXME: 1 ms, assumed */
> +	policy->cur = get_clk_frequency_khz(0);		/* current freq */
> +	policy->min = policy->max = policy->cur;

Better set policy->min to cpuinfo.min_freq and ->max to cpuinfo.max_freq.

> +static struct freq_attr* pxa_cpufreq_attr[] = {
> +        &cpufreq_freq_attr_scaling_available_freqs,

Tab, not space


Looks good, thanks!

	Dominik

Re: [PATCH] CPUFreq Support for PXA255

[Ian Campbell]

On Sat, 2005-07-23 at 21:16 +0200, Dominik Brodowski wrote:

> In my opinion you should only switch between the tables in verify. Only then
> can we assure that the ->min and ->max values provided are OK at this
> moment.

That makes perfect sense, done.

> > +	policy->min = policy->max = policy->cur;
> 
> Better set policy->min to cpuinfo.min_freq and ->max to cpuinfo.max_freq.

Someone queried this on the ARM list too -- I've made the change you
suggest.

> > +static struct freq_attr* pxa_cpufreq_attr[] = {
> > +        &cpufreq_freq_attr_scaling_available_freqs,
> 
> Tab, not space

Cheers, I missed that one.

Updated patch follows.

Signed-off-by: Ian Campbell <icampbell@arcom.com>

Index: 2.6/arch/arm/Kconfig
===================================================================
--- 2.6.orig/arch/arm/Kconfig	2005-07-19 11:02:53.000000000 +0100
+++ 2.6/arch/arm/Kconfig	2005-07-19 11:03:23.000000000 +0100
@@ -516,7 +516,7 @@
 
 endmenu
 
-if (ARCH_SA1100 || ARCH_INTEGRATOR || ARCH_OMAP1)
+if (ARCH_SA1100 || ARCH_INTEGRATOR || ARCH_OMAP1 || ARCH_PXA)
 
 menu "CPU Frequency scaling"
 
@@ -543,6 +543,12 @@
 
 	  If in doubt, say Y.
 
+config CPU_FREQ_PXA25x
+	bool
+	select CPU_FREQ_TABLE
+	depends on CPU_FREQ && PXA25x
+	default y
+
 endmenu
 
 endif
Index: 2.6/arch/arm/mach-pxa/Makefile
===================================================================
--- 2.6.orig/arch/arm/mach-pxa/Makefile	2005-07-19 11:02:53.000000000 +0100
+++ 2.6/arch/arm/mach-pxa/Makefile	2005-07-25 10:18:51.000000000 +0100
@@ -22,6 +22,9 @@
 
 obj-$(CONFIG_LEDS) += $(led-y)
 
+# CPU freq support
+obj-$(CONFIG_CPU_FREQ_PXA25x) += cpu-pxa25x.o
+
 # Misc features
 obj-$(CONFIG_PM) += pm.o sleep.o
 
Index: 2.6/Documentation/cpu-freq/user-guide.txt
===================================================================
--- 2.6.orig/Documentation/cpu-freq/user-guide.txt	2005-07-19 11:02:53.000000000 +0100
+++ 2.6/Documentation/cpu-freq/user-guide.txt	2005-07-19 11:03:23.000000000 +0100
@@ -45,6 +45,7 @@
 ARM Integrator
 ARM-SA1100
 ARM-SA1110
+Intel XScale PXA25x
 
 
 1.2 x86
Index: 2.6/arch/arm/mach-pxa/cpu-pxa25x.c
===================================================================
--- /dev/null	1970-01-01 00:00:00.000000000 +0000
+++ 2.6/arch/arm/mach-pxa/cpu-pxa25x.c	2005-07-25 10:18:59.000000000 +0100
@@ -0,0 +1,342 @@
+/*
+ *  linux/arch/arm/mach-pxa/cpu-pxa.c
+ *
+ *  Copyright (C) 2002,2003 Intrinsyc Software
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ * History:
+ *   31-Jul-2002 : Initial version [FB]
+ *   29-Jan-2003 : added PXA255 support [FB]
+ *   20-Apr-2003 : ported to v2.5 (Dustin McIntire, Sensoria Corp.)
+ *   18-Jul-2005 : updated for latest kernel (2.6.13-rc), cleanup for submission
+ *                 (Ian Campbell, Arcom Control Systems)
+ *
+ * Note:
+ *   This driver may change the memory bus clock rate, but will not do any
+ *   platform specific access timing changes... for example if you have flash
+ *   memory connected to CS0, you will need to register a platform specific
+ *   notifier which will adjust the memory access strobes to maintain a
+ *   minimum strobe width.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/sched.h>
+#include <linux/init.h>
+#include <linux/cpufreq.h>
+#include <linux/moduleparam.h>
+
+#include <asm/hardware.h>
+
+#include <asm/arch/pxa-regs.h>
+
+#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "pxa25x", msg)
+
+struct pxa_freq {
+	unsigned int khz;
+	unsigned int membus;
+	unsigned int cccr;
+	unsigned int div2;
+};
+
+/* Define the refresh period in mSec for the SDRAM and the number of rows */
+#define SDRAM_TREF          64		/* standard 64ms SDRAM */
+#define SDRAM_ROWS          8192	/* 64MB=8192 32MB=4096 */
+#define MDREFR_DRI(x)       ((x*SDRAM_TREF)/(SDRAM_ROWS*32))
+
+#define CCLKCFG_TURBO       0x1
+#define CCLKCFG_FCS         0x2
+#define PXA25x_MIN_FREQ     99532
+#define PXA25x_MAX_FREQ     398131
+#define MDREFR_DB2_MASK     (MDREFR_K2DB2 | MDREFR_K1DB2)
+#define MDREFR_DRI_MASK     0xFFF
+
+/* Use the run mode frequencies for performance */
+static struct pxa_freq pxa25x_performance_freqs[] = {
+	/* CPU   MEMBUS  CCCR   DIV2 */
+	{99532,   99532, 0x121, 1},	/* run= 99, turbo= 99, PXbus=50,  SDRAM=50 */
+	{132710, 132710, 0x123, 1},	/* run=133, turbo=133, PXbus=66,  SDRAM=66 */
+	{199065,  99532, 0x141, 0},	/* run=199, turbo=199, PXbus=99,  SDRAM=99 */
+	{265421, 132710, 0x143, 1},	/* run=265, turbo=265, PXbus=133, SDRAM=66 */
+	{331776, 165888, 0x145, 1},	/* run=331, turbo=331, PXbus=166, SDRAM=83 */
+	{398131,  99532, 0x161, 0},	/* run=398, turbo=398, PXbus=196, SDRAM=99 */
+};
+
+static struct cpufreq_frequency_table pxa25x_performance_freq_table[ARRAY_SIZE(pxa25x_performance_freqs)+1];
+
+/* Use the turbo mode frequencies for powersave */
+static struct pxa_freq pxa25x_powersave_freqs[] = {
+	/* CPU   MEMBUS CCCR   DIV2 */
+	{99532,  99532, 0x121, 1},	/* run=99,  turbo= 99, PXbus=50, SDRAM=50 */
+	{199065, 99532, 0x221, 0},	/* run=99,  turbo=199, PXbus=50, SDRAM=99 */
+	{298598, 99532, 0x321, 0},	/* run=99,  turbo=287, PXbus=50, SDRAM=99 */
+	{398131, 99532, 0x241, 0},	/* run=199, turbo=398, PXbus=99, SDRAM=99 */
+};
+
+static struct cpufreq_frequency_table pxa25x_powersave_freq_table[ARRAY_SIZE(pxa25x_powersave_freqs)+1];
+
+/* currently selected frequency table */
+struct pxa_freq *pxa_freq_settings;
+struct cpufreq_frequency_table *pxa_freq_table;
+
+extern unsigned get_clk_frequency_khz(int info);
+
+static unsigned int max_frequency = PXA25x_MAX_FREQ;
+static int performance = 0;
+
+/*
+ * This option can be used if you have one of the 200MHz PXA25x parts by adding
+ * cpu_pxa25x.max_frequency=199065 to the kernel command line
+ */
+module_param(max_frequency, int, 0);
+MODULE_PARM_DESC(max_frequency, "Set the maximum cpu frequency");
+
+module_param(performance, int, 0);
+MODULE_PARM_DESC(performance, "Use performance instead of powersave frequency tables");
+
+static void pxa_select_freq_table(struct cpufreq_policy *policy)
+{
+	cpufreq_frequency_table_put_attr(policy->cpu);
+
+	if (performance) {
+		dprintk("selecting performance tables\n");
+		pxa_freq_settings = pxa25x_performance_freqs;
+		pxa_freq_table = pxa25x_performance_freq_table;
+	} else {
+		dprintk("selecting powersave tables\n");
+		pxa_freq_settings = pxa25x_powersave_freqs;
+		pxa_freq_table = pxa25x_powersave_freq_table;
+	}
+
+	cpufreq_frequency_table_get_attr(pxa_freq_table, policy->cpu);		
+}
+
+/* find a valid frequency point */
+static int pxa_verify_policy(struct cpufreq_policy *policy)
+{
+	int ret;
+
+	pxa_select_freq_table(policy);
+
+	ret = cpufreq_frequency_table_verify(policy, pxa_freq_table);
+
+	dprintk("verified CPU policy: %dKhz min to %dKhz max\n",
+		policy->min, policy->max);
+
+	return ret;
+}
+
+static int pxa_set_target(struct cpufreq_policy *policy,
+			  unsigned int target_freq, unsigned int relation)
+{
+	int idx;
+	struct cpufreq_freqs freqs;
+	unsigned long flags;
+	unsigned int unused;
+	unsigned int preset_mdrefr, postset_mdrefr;
+	void *ramstart;
+
+	/* Lookup the next frequency */
+	if (cpufreq_frequency_table_target(policy, pxa_freq_table,
+					   target_freq, relation, &idx))
+		return -EINVAL;
+
+	freqs.old = get_clk_frequency_khz(0);
+	freqs.new = pxa_freq_settings[idx].khz;
+	freqs.cpu = policy->cpu;
+
+	if (freqs.new == freqs.old && pxa_freq_settings[idx].cccr == CCCR)
+		return 0;
+
+	dprintk("changing CPU frequency to %d.%03d Mhz (SDRAM %d Mhz, CCCR %#04x)\n",
+		freqs.new / 1000, freqs.new % 1000,
+		(pxa_freq_settings[idx].div2) ?
+		(pxa_freq_settings[idx].membus / 2000) :
+		(pxa_freq_settings[idx].membus / 1000),
+		pxa_freq_settings[idx].cccr);
+
+	ramstart = phys_to_virt(0xa0000000);
+
+	/*
+	 * Tell everyone what we're about to do...
+	 * you should add a notify client with any platform specific
+	 * Vcc changing capability
+	 */
+	cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
+
+	/* Calculate the next MDREFR.  If we're slowing down the SDRAM clock
+	 * we need to preset the smaller DRI before the change.  If we're speeding
+	 * up we need to set the larger DRI value after the change.
+	 */
+	preset_mdrefr = postset_mdrefr = MDREFR;
+	if ((MDREFR & MDREFR_DRI_MASK) > MDREFR_DRI(pxa_freq_settings[idx].membus)) {
+		preset_mdrefr = (preset_mdrefr & ~MDREFR_DRI_MASK) |
+			MDREFR_DRI(pxa_freq_settings[idx].membus);
+	}
+	postset_mdrefr = (postset_mdrefr & ~MDREFR_DRI_MASK) |
+		MDREFR_DRI(pxa_freq_settings[idx].membus);
+
+	/* If we're dividing the memory clock by two for the SDRAM clock, this
+	 * must be set prior to the change.  Clearing the divide must be done
+	 * after the change.
+	 */
+	if (pxa_freq_settings[idx].div2) {
+		preset_mdrefr |= MDREFR_DB2_MASK;
+		postset_mdrefr |= MDREFR_DB2_MASK;
+	} else {
+		postset_mdrefr &= ~MDREFR_DB2_MASK;
+	}
+
+	local_irq_save(flags);
+
+	/* Set new the CCCR */
+	CCCR = pxa_freq_settings[idx].cccr;
+
+	__asm__ __volatile__("                              \
+        ldr r4, [%1] ;          /* load MDREFR */           \
+        b   2f ;                                            \
+        .align  5 ;                                         \
+1:                                                          \
+        str %4, [%1] ;          /* preset the MDREFR */     \
+        mcr p14, 0, %2, c6, c0, 0 ; /* set CCLKCFG[FCS] */  \
+        str %5, [%1] ;          /* postset the MDREFR */    \
+                                                            \
+        b   3f       ;                                      \
+2:      b   1b       ;                                      \
+3:      nop          ;                                      \
+        "
+	: "=&r"(unused)
+	: "r"(&MDREFR), "r"(CCLKCFG_TURBO | CCLKCFG_FCS),
+	  "r"(ramstart), "r"(preset_mdrefr),
+	  "r"(postset_mdrefr)
+	: "r4", "r5");
+	local_irq_restore(flags);
+
+	/*
+	 * Tell everyone what we've just done...
+	 * you should add a notify client with any platform specific
+	 * SDRAM refresh timer adjustments
+	 */
+	cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
+
+	return 0;
+}
+
+static unsigned int pxa_cpufreq_get(unsigned int cpu)
+{
+	return get_clk_frequency_khz(0);
+}
+
+static int pxa_cpufreq_init(struct cpufreq_policy *policy)
+{
+	int i;
+
+	if (policy->cpu != 0)
+		return -ENODEV;
+
+	/* set default policy and cpuinfo */
+	policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
+	policy->max = policy->cpuinfo.max_freq = max_frequency;
+	policy->min = policy->cpuinfo.min_freq = PXA25x_MIN_FREQ;
+	policy->cpuinfo.transition_latency = 1000000;	/* FIXME: 1 ms, assumed */
+	policy->cur = get_clk_frequency_khz(0);		/* current freq */
+
+	/* Generate the run cpufreq_frequency_table struct */
+	for (i = 0; i < ARRAY_SIZE(pxa25x_performance_freqs); i++) {
+		pxa25x_performance_freq_table[i].frequency = pxa25x_performance_freqs[i].khz;
+		pxa25x_performance_freq_table[i].index = i;
+	}
+	pxa25x_performance_freq_table[i].frequency = CPUFREQ_TABLE_END;
+
+	/* Generate the turbo cpufreq_frequency_table struct */
+	for (i = 0; i < ARRAY_SIZE(pxa25x_powersave_freqs); i++) {
+		pxa25x_powersave_freq_table[i].frequency = pxa25x_powersave_freqs[i].khz;
+		pxa25x_powersave_freq_table[i].index = i;
+	}
+	pxa25x_powersave_freq_table[i].frequency = CPUFREQ_TABLE_END;
+
+	/* calls cpufreq_frequency_table_get_attr */
+	pxa_select_freq_table(policy);
+
+	printk(KERN_INFO "pxa25x: CPU frequency change support initialized (%s tables)\n",
+	       performance ? "performance" : "powersave");
+
+	return 0;
+}
+
+static ssize_t show_pxa25x_freq_model_attr(struct cpufreq_policy *policy, char *buf)
+{
+	return sprintf (buf, "%s\n", performance ? "performance" : "powersave");
+}
+
+static ssize_t store_pxa25x_freq_model_attr(struct cpufreq_policy *policy, const char *buf, size_t count)
+{
+	unsigned int ret;
+	char str[16];
+
+	ret = sscanf(buf, "%15s", str);
+	if (ret != 1)
+		return -EINVAL;
+
+	if (strnicmp(str,"performance",16)==0)
+		performance = 1;
+	else if (strnicmp(str,"powersave",16)==0)
+		performance = 0;
+	else
+		return -EINVAL;
+
+	ret = cpufreq_update_policy(policy->cpu);
+
+	return ret ? ret : count;
+}
+
+struct freq_attr pxa25x_freq_model_attr = {
+	.attr = { .name = "pxa25x_freq_model", .mode = 0644, .owner=THIS_MODULE },
+	.show = show_pxa25x_freq_model_attr,
+	.store = store_pxa25x_freq_model_attr,
+};
+
+static struct freq_attr* pxa_cpufreq_attr[] = {
+	&cpufreq_freq_attr_scaling_available_freqs,
+	&pxa25x_freq_model_attr,
+	NULL,
+};
+
+static struct cpufreq_driver pxa_cpufreq_driver = {
+	.verify	= pxa_verify_policy,
+	.target	= pxa_set_target,
+	.init	= pxa_cpufreq_init,
+	.get	= pxa_cpufreq_get,
+	.name	= "pxa25x",
+	.attr	= pxa_cpufreq_attr,
+};
+
+static int __init pxa_cpu_init(void)
+{
+	return cpufreq_register_driver(&pxa_cpufreq_driver);
+}
+
+static void __exit pxa_cpu_exit(void)
+{
+	cpufreq_unregister_driver(&pxa_cpufreq_driver);
+}
+
+MODULE_AUTHOR("Intrinsyc Software Inc.");
+MODULE_DESCRIPTION("CPU frequency changing driver for the PXA architecture");
+MODULE_LICENSE("GPL");
+module_init(pxa_cpu_init);
+module_exit(pxa_cpu_exit);


Ian.

-- 
Ian Campbell, Senior Design Engineer
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