[PATCH] Add support for 4KS cpu.

[PATCH] Add support for 4KS cpu.

[Franck]

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This patch adds support for both 4ksc and 4ksd cpus. These cpu are
mainly used in embedded system such as smartcard or point of sell
devices as they provide some extra security features.

Signed-off-by: Franck <vagabon.xyz@gmail.com>

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diff -Nurp linux-2.6.14-rc2-mipscvs/arch/mips/Kconfig linux-2.6.14-rc2-mipscvs-4KSx/arch/mips/Kconfig
--- linux-2.6.14-rc2-mipscvs/arch/mips/Kconfig	2005-09-23 22:02:44.000000000 +0200
+++ linux-2.6.14-rc2-mipscvs-4KSx/arch/mips/Kconfig	2005-10-04 09:52:43.000000000 +0200
@@ -1123,6 +1123,20 @@ config CPU_SB1
 	select CPU_SUPPORTS_64BIT_KERNEL
 	select CPU_SUPPORTS_HIGHMEM
 
+config CPU_4KSC
+	bool "4KSC"
+	select CPU_SUPPORTS_32BIT_KERNEL
+	select CPU_HAS_PREFETCH
+	help
+	  MIPS Technologies 4KSc-series processors.
+
+config CPU_4KSD
+	bool "4KSD"
+	select CPU_SUPPORTS_32BIT_KERNEL
+	select CPU_HAS_PREFETCH
+	help
+	  MIPS Technologies 4KSd-series processors.
+
 endchoice
 
 endmenu
diff -Nurp linux-2.6.14-rc2-mipscvs/arch/mips/kernel/cpu-probe.c linux-2.6.14-rc2-mipscvs-4KSx/arch/mips/kernel/cpu-probe.c
--- linux-2.6.14-rc2-mipscvs/arch/mips/kernel/cpu-probe.c	2005-08-16 19:50:43.000000000 +0200
+++ linux-2.6.14-rc2-mipscvs-4KSx/arch/mips/kernel/cpu-probe.c	2005-10-04 09:41:42.000000000 +0200
@@ -552,6 +552,7 @@ static inline void cpu_probe_mips(struct
 		c->cputype = CPU_4KEC;
 		break;
 	case PRID_IMP_4KSC:
+	case PRID_IMP_4KSD:
 		c->cputype = CPU_4KSC;
 		break;
 	case PRID_IMP_5KC:
diff -Nurp linux-2.6.14-rc2-mipscvs/arch/mips/kernel/Makefile linux-2.6.14-rc2-mipscvs-4KSx/arch/mips/kernel/Makefile
--- linux-2.6.14-rc2-mipscvs/arch/mips/kernel/Makefile	2005-09-01 22:42:46.000000000 +0200
+++ linux-2.6.14-rc2-mipscvs-4KSx/arch/mips/kernel/Makefile	2005-10-04 09:30:29.000000000 +0200
@@ -31,6 +31,8 @@ obj-$(CONFIG_CPU_SB1)		+= r4k_fpu.o r4k_
 obj-$(CONFIG_CPU_MIPS32_R1)	+= r4k_fpu.o r4k_switch.o
 obj-$(CONFIG_CPU_MIPS64_R1)	+= r4k_fpu.o r4k_switch.o
 obj-$(CONFIG_CPU_R6000)		+= r6000_fpu.o r4k_switch.o
+obj-$(CONFIG_CPU_4KSC)		+= r4k_switch.o
+obj-$(CONFIG_CPU_4KSD)		+= r4k_switch.o
 
 obj-$(CONFIG_SMP)		+= smp.o
 
diff -Nurp linux-2.6.14-rc2-mipscvs/arch/mips/lib-32/Makefile linux-2.6.14-rc2-mipscvs-4KSx/arch/mips/lib-32/Makefile
--- linux-2.6.14-rc2-mipscvs/arch/mips/lib-32/Makefile	2005-07-11 12:03:27.000000000 +0200
+++ linux-2.6.14-rc2-mipscvs-4KSx/arch/mips/lib-32/Makefile	2005-10-04 09:44:09.000000000 +0200
@@ -21,5 +21,7 @@ obj-$(CONFIG_CPU_SB1)		+= dump_tlb.o
 obj-$(CONFIG_CPU_TX39XX)	+= r3k_dump_tlb.o
 obj-$(CONFIG_CPU_TX49XX)	+= dump_tlb.o
 obj-$(CONFIG_CPU_VR41XX)	+= dump_tlb.o
+obj-$(CONFIG_CPU_4KSC)		+= dump_tlb.o
+obj-$(CONFIG_CPU_4KSD)		+= dump_tlb.o
 
 EXTRA_AFLAGS := $(CFLAGS)
diff -Nurp linux-2.6.14-rc2-mipscvs/arch/mips/Makefile linux-2.6.14-rc2-mipscvs-4KSx/arch/mips/Makefile
--- linux-2.6.14-rc2-mipscvs/arch/mips/Makefile	2005-09-15 10:53:10.000000000 +0200
+++ linux-2.6.14-rc2-mipscvs-4KSx/arch/mips/Makefile	2005-10-04 09:25:21.000000000 +0200
@@ -237,6 +237,14 @@ cflags-$(CONFIG_CPU_R10000)	+= \
 			$(call set_gccflags,r10000,mips4,r8000,mips4,mips2) \
 			-Wa,--trap
 
+cflags-$(CONFIG_CPU_4KSC)	+= \
+			$(call set_gccflags,4kec,mips32r2,r4600,mips3,mips2) \
+			-msmartmips -Wa,--trap
+
+cflags-$(CONFIG_CPU_4KSD)	+= \
+			$(call set_gccflags,4kec,mips32r2,r4600,mips3,mips2) \
+			-msmartmips -Wa,--trap
+
 ifdef CONFIG_CPU_SB1
 ifdef CONFIG_SB1_PASS_1_WORKAROUNDS
 MODFLAGS	+= -msb1-pass1-workarounds
diff -Nurp linux-2.6.14-rc2-mipscvs/arch/mips/mm/cache.c linux-2.6.14-rc2-mipscvs-4KSx/arch/mips/mm/cache.c
--- linux-2.6.14-rc2-mipscvs/arch/mips/mm/cache.c	2005-07-06 14:08:14.000000000 +0200
+++ linux-2.6.14-rc2-mipscvs-4KSx/arch/mips/mm/cache.c	2005-10-04 09:46:56.000000000 +0200
@@ -120,7 +120,8 @@ void __init cpu_cache_init(void)
     defined(CONFIG_CPU_NEVADA) || defined(CONFIG_CPU_R5432)  || \
     defined(CONFIG_CPU_R5500)  || defined(CONFIG_CPU_MIPS32_R1) || \
     defined(CONFIG_CPU_MIPS64_R1) || defined(CONFIG_CPU_TX49XX) || \
-    defined(CONFIG_CPU_RM7000) || defined(CONFIG_CPU_RM9000)
+    defined(CONFIG_CPU_RM7000) || defined(CONFIG_CPU_RM9000) || \
+    defined(CONFIG_CPU_4KSC)   || defined(CONFIG_CPU_4KSD)
 		ld_mmu_r4xx0();
 #endif
 	} else switch (current_cpu_data.cputype) {
diff -Nurp linux-2.6.14-rc2-mipscvs/arch/mips/mm/Makefile linux-2.6.14-rc2-mipscvs-4KSx/arch/mips/mm/Makefile
--- linux-2.6.14-rc2-mipscvs/arch/mips/mm/Makefile	2005-07-14 14:05:06.000000000 +0200
+++ linux-2.6.14-rc2-mipscvs-4KSx/arch/mips/mm/Makefile	2005-10-04 09:45:17.000000000 +0200
@@ -26,6 +26,8 @@ obj-$(CONFIG_CPU_SB1)		+= c-sb1.o cerr-s
 obj-$(CONFIG_CPU_TX39XX)	+= c-tx39.o pg-r4k.o tlb-r3k.o
 obj-$(CONFIG_CPU_TX49XX)	+= c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o
 obj-$(CONFIG_CPU_VR41XX)	+= c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o
+obj-$(CONFIG_CPU_4KSC)		+= c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o
+obj-$(CONFIG_CPU_4KSD)		+= c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o
 
 obj-$(CONFIG_IP22_CPU_SCACHE)	+= sc-ip22.o
 obj-$(CONFIG_R5000_CPU_SCACHE)  += sc-r5k.o
diff -Nurp linux-2.6.14-rc2-mipscvs/include/asm-mips/module.h linux-2.6.14-rc2-mipscvs-4KSx/include/asm-mips/module.h
--- linux-2.6.14-rc2-mipscvs/include/asm-mips/module.h	2005-09-14 12:35:37.000000000 +0200
+++ linux-2.6.14-rc2-mipscvs-4KSx/include/asm-mips/module.h	2005-10-04 09:55:34.000000000 +0200
@@ -113,7 +113,11 @@ search_module_dbetables(unsigned long ad
 #define MODULE_PROC_FAMILY "RM9000"
 #elif defined CONFIG_CPU_SB1
 #define MODULE_PROC_FAMILY "SB1"
-#elif
+#elif defined CONFIG_CPU_4KSC
+#define MODULE_PROC_FAMILY "4KSC"
+#elif defined CONFIG_CPU_4KSD
+#define MODULE_PROC_FAMILY "4KSD"
+#else
 #error MODULE_PROC_FAMILY undefined for your processor configuration
 #endif
 

Re: [PATCH] Add support for 4KS cpu.

[Maciej W. Rozycki]

On Tue, 4 Oct 2005, Franck wrote:

> This patch adds support for both 4ksc and 4ksd cpus. These cpu are
> mainly used in embedded system such as smartcard or point of sell
> devices as they provide some extra security features.

 Please send patches inline.

 Apart from the change to "arch/mips/kernel/cpu-probe.c", which is useful, 
what's the benefit of the changes?  Specifically how is selecting e.g. 
"CPU_4KSC" meant to be different from "CPU_MIPS32_R2"?  Do you want to 
make GCC tune your code according to a specific's CPU pipeline 
description?  If so, then it should probably be done a bit differently and 
there is actually no need to differentiate between specific members of the 
4K family.

> Signed-off-by: Franck <vagabon.xyz@gmail.com>

 You should rather use your real name here.  [Hmm, why am I responding to 
an anonym in the first place?...]

  Maciej

Re: [PATCH] Add support for 4KS cpu.

[Kevin D. Kissell]

FWIW, the 4KSc is a strict superset of the 4Kc (anticipating
*some* of the Release 2 features, but not requiring them to be
used) and the 4KSd is a strict superset of the 4KE.  I would
not recommend configuring CPU_MIPS32_R2 for the 4KSc.

Both of these cores have "SmartMIPS" MMUs, which allow for
orthogonal control of Read/Write/Execute permissions on pages,
using a couple of additional bits at the top of the EntryLo
registers - which in turn limit the maximum usable physical
address space. They also allow for variable granularity of
the PageMask register, to support 1K pages.  But these features
are all done in a way that's backward-compatible with MIPS32,
and the default reset behavior makes them look like 4Kc/4KEc.

They also have some physical security and cryptography accelleration
features, some of which use extended CPU state that would
require some kernel context management support if anyone wanted
to actually use them in Linux applications. The real point of
having a CPU_4KSC config flag would be to enable building-in
such support.

I'm being a teeny bit vague about this, because I'm not 100%
certain that all the details of "SmartMIPS" have been published.

		Regards,

		Kevin K.

Maciej W. Rozycki wrote:
> On Tue, 4 Oct 2005, Franck wrote:
> 
> 
>>This patch adds support for both 4ksc and 4ksd cpus. These cpu are
>>mainly used in embedded system such as smartcard or point of sell
>>devices as they provide some extra security features.
> 
> 
>  Please send patches inline.
> 
>  Apart from the change to "arch/mips/kernel/cpu-probe.c", which is useful, 
> what's the benefit of the changes?  Specifically how is selecting e.g. 
> "CPU_4KSC" meant to be different from "CPU_MIPS32_R2"?  Do you want to 
> make GCC tune your code according to a specific's CPU pipeline 
> description?  If so, then it should probably be done a bit differently and 
> there is actually no need to differentiate between specific members of the 
> 4K family.
> 
> 
>>Signed-off-by: Franck <vagabon.xyz@gmail.com>
> 
> 
>  You should rather use your real name here.  [Hmm, why am I responding to 
> an anonym in the first place?...]
> 
>   Maciej
> 

Re: [PATCH] Add support for 4KS cpu.

[Maciej W. Rozycki]

On Tue, 4 Oct 2005, Kevin D. Kissell wrote:

> FWIW, the 4KSc is a strict superset of the 4Kc (anticipating
> *some* of the Release 2 features, but not requiring them to be
> used) and the 4KSd is a strict superset of the 4KE.  I would
> not recommend configuring CPU_MIPS32_R2 for the 4KSc.

 Well, the patch asked GCC to use the instruction set of the "4kec" CPU 
for both (and also the "mips32r2" ISA, but that's overridden by the 
former), so it must have been incorrect in the first place -- I have only 
referred to this.

> They also have some physical security and cryptography accelleration
> features, some of which use extended CPU state that would
> require some kernel context management support if anyone wanted
> to actually use them in Linux applications. The real point of
> having a CPU_4KSC config flag would be to enable building-in
> such support.

 This would make sense, but I'm afraid the proposal was far from that... 

  Maciej

Re: [PATCH] Add support for 4KS cpu.

[Kevin D. Kissell]

Maciej W. Rozycki wrote:
> On Tue, 4 Oct 2005, Kevin D. Kissell wrote:
> 
> 
>>FWIW, the 4KSc is a strict superset of the 4Kc (anticipating
>>*some* of the Release 2 features, but not requiring them to be
>>used) and the 4KSd is a strict superset of the 4KE.  I would
>>not recommend configuring CPU_MIPS32_R2 for the 4KSc.
> 
> 
>  Well, the patch asked GCC to use the instruction set of the "4kec" CPU 
> for both (and also the "mips32r2" ISA, but that's overridden by the 
> former), so it must have been incorrect in the first place

Which was sort-of why I replied.  In particular, the MIPS32R2 bitfield
instructions will probably cause a reserved instruction fault on a 4KSc.

	Regards,

	Kevin K.

Re: [PATCH] Add support for 4KS cpu.

[Franck]

2005/10/4, Kevin D. Kissell <kevink@mips.com>:
> >  Well, the patch asked GCC to use the instruction set of the "4kec" CPU
> > for both (and also the "mips32r2" ISA, but that's overridden by the
> > former), so it must have been incorrect in the first place
>
> Which was sort-of why I replied.  In particular, the MIPS32R2 bitfield
> instructions will probably cause a reserved instruction fault on a 4KSc.
>

should I pass these options to GCC for 4KSc ?

cflags-$(CONFIG_CPU_4KSC)      += \
                       $(call set_gccflags,4kc,mips32r1,r4600,mips3,mips2) \
                       -msmartmips -Wa,--trap

Thanks
--
               Franck

Re: [PATCH] Add support for 4KS cpu.

[Maciej W. Rozycki]

On Tue, 4 Oct 2005, Franck wrote:

> should I pass these options to GCC for 4KSc ?
> 
> cflags-$(CONFIG_CPU_4KSC)      += \
>                        $(call set_gccflags,4kc,mips32r1,r4600,mips3,mips2) \
>                        -msmartmips -Wa,--trap

 s/mips32r1/mips32/, otherwise OK.

 But since you seem to use SDE, you may as well just use "4ksc" (and 
possibly skip "-msmartmips" as it's implied); similarly for "4ksd".  
Unfortunately documentation on what CPU types are accepted seems to be 
incomplete -- use `gcc -v --help' to see which ones are actually 
available.

  Maciej

Re: [PATCH] Add support for 4KS cpu.

[Franck]

2005/10/4, Maciej W. Rozycki <macro@linux-mips.org>:
> On Tue, 4 Oct 2005, Franck wrote:
>
> > should I pass these options to GCC for 4KSc ?
> >
> > cflags-$(CONFIG_CPU_4KSC)      += \
> >                        $(call set_gccflags,4kc,mips32r1,r4600,mips3,mips2) \
> >                        -msmartmips -Wa,--trap
>
>  s/mips32r1/mips32/, otherwise OK.
>
>  But since you seem to use SDE, you may as well just use "4ksc" (and
> possibly skip "-msmartmips" as it's implied); similarly for "4ksd".
> Unfortunately documentation on what CPU types are accepted seems to be
> incomplete -- use `gcc -v --help' to see which ones are actually
> available.
>

maybe something like these are better (I removed last parameter since
it's no more used) ?

cflags-$(CONFIG_CPU_4KSC)       += \
                        $(call set_gccflags,4ksc,mips32,4kc,mips32) \
                        -Wa,--trap

cflags-$(CONFIG_CPU_4KSD)       += \
                        $(call set_gccflags,4ksd,mips32r2,4kec,mips32r2) \
                        -Wa,--trap

Thanks
--
               Franck

Re: [PATCH] Add support for 4KS cpu.

[Franck]

2005/10/4, Franck <vagabon.xyz@gmail.com>:
> >  But since you seem to use SDE, you may as well just use "4ksc" (and
> > possibly skip "-msmartmips" as it's implied); similarly for "4ksd".
> > Unfortunately documentation on what CPU types are accepted seems to be
> > incomplete -- use `gcc -v --help' to see which ones are actually
> > available.
> >
>
> maybe something like these are better (I removed last parameter since
> it's no more used) ?
>
> cflags-$(CONFIG_CPU_4KSC)       += \
>                         $(call set_gccflags,4ksc,mips32,4kc,mips32) \
>                         -Wa,--trap
>
> cflags-$(CONFIG_CPU_4KSD)       += \
>                         $(call set_gccflags,4ksd,mips32r2,4kec,mips32r2) \
>                         -Wa,--trap
>

Actually it would be better to let smartmips options in case we use
fallback options:

Thanks
--
               Franck

Re: [PATCH] Add support for 4KS cpu.

[Maciej W. Rozycki]

On Wed, 5 Oct 2005, Franck wrote:

> Actually it would be better to let smartmips options in case we use
> fallback options:

 In which case the toolchain is not going to support the "-msmartmips" 
option anyway...  Perhaps you should just use the same options throughout 
as there is probably no sensible set of legacy options to fall back to.  

  Maciej

Re: [PATCH] Add support for 4KS cpu.

[Franck]

2005/10/5, Maciej W. Rozycki <macro@linux-mips.org>:
> On Wed, 5 Oct 2005, Franck wrote:
>
> > Actually it would be better to let smartmips options in case we use
> > fallback options:
>
>  In which case the toolchain is not going to support the "-msmartmips"
> option anyway...

toolchain could support smartmips extension without supporting 4ksd
specific instructions...

Thanks
--
               Franck

Re: [PATCH] Add support for 4KS cpu.

[Franck]

2005/10/4, Kevin D. Kissell <kevink@mips.com>:
> They also have some physical security and cryptography accelleration
> features, some of which use extended CPU state that would
> require some kernel context management support if anyone wanted
> to actually use them in Linux applications. The real point of
> having a CPU_4KSC config flag would be to enable building-in
> such support.
>

what is extended CPU state that you're talking about ?

> I'm being a teeny bit vague about this, because I'm not 100%
> certain that all the details of "SmartMIPS" have been published.
>

hmm, does that mean that smart mips extension couldn't be supported in
Linux in case that this extension have not been published ?

Thanks
--
               Franck

Re: [PATCH] Add support for 4KS cpu.

[Kevin D. Kissell]

Franck wrote:
> 2005/10/4, Kevin D. Kissell <kevink@mips.com>:
> 
>>They also have some physical security and cryptography accelleration
>>features, some of which use extended CPU state that would
>>require some kernel context management support if anyone wanted
>>to actually use them in Linux applications. The real point of
>>having a CPU_4KSC config flag would be to enable building-in
>>such support.
>>
> what is extended CPU state that you're talking about ?

That would be telling.  ;o)   Seriously, see below.

>>I'm being a teeny bit vague about this, because I'm not 100%
>>certain that all the details of "SmartMIPS" have been published.
>>
> 
> hmm, does that mean that smart mips extension couldn't be supported in
> Linux in case that this extension have not been published ?

I'm personally not a big believer in security-through-obscurity,
but there are those, both inside and outside MIPS, who felt that
the security of SmartMIPS cores would be enhanced if we didn't
give away all of the details.  As a consequence, we put off
publishing the nitty-gritty details of SmartMIPS for quite a while.
I note that we now have the programmers' manual on-line at www.mips.com,
so I guess I'm implicitly cleared to discuss it in at least that level
of detail.

A key element of SmartMIPS that allows for a ~2x speedup for
crypto codes that rely on extended precision math (RSA, ECC)
is the combination of an extension to the Hi/Lo accumulator
(called "ACX") with a special extract-and-reduce instruction
("MFLHXU").  If one wants to use that in Linux - or at least,
if one wants to allow more than one thread to be able to use
it at a time - one needs to save/restore ACX on the kernel
stackframe, along with Hi and Lo.

		Regards,

		Kevin K.

Re: [PATCH] Add support for 4KS cpu.

[Franck]

2005/10/5, Kevin D. Kissell <kevink@mips.com>:
> I'm personally not a big believer in security-through-obscurity,
> but there are those, both inside and outside MIPS, who felt that
> the security of SmartMIPS cores would be enhanced if we didn't
> give away all of the details.  As a consequence, we put off
> publishing the nitty-gritty details of SmartMIPS for quite a while.
> I note that we now have the programmers' manual on-line at www.mips.com,
> so I guess I'm implicitly cleared to discuss it in at least that level
> of detail.
>

well, I agree with you on "security-through-obscurity" point. From
outside, I feel like MIPS has a lot of things to _hide_ athough that's
not a good feeling for security systems. Anyways...

> A key element of SmartMIPS that allows for a ~2x speedup for
> crypto codes that rely on extended precision math (RSA, ECC)
> is the combination of an extension to the Hi/Lo accumulator
> (called "ACX") with a special extract-and-reduce instruction
> ("MFLHXU").  If one wants to use that in Linux - or at least,
> if one wants to allow more than one thread to be able to use
> it at a time - one needs to save/restore ACX on the kernel
> stackframe, along with Hi and Lo.
>

Correct. I must at least add this in the patch. I'll do it soon.

Thanks for enlight this.
--
               Franck

Re: [PATCH] Add support for 4KS cpu.

[Franck]

2005/10/4, Maciej W. Rozycki <macro@linux-mips.org>:
> On Tue, 4 Oct 2005, Franck wrote:
>
> > This patch adds support for both 4ksc and 4ksd cpus. These cpu are
> > mainly used in embedded system such as smartcard or point of sell
> > devices as they provide some extra security features.
>
>  Please send patches inline.

I can see it inlined...what email viewer are you using ?

>
>  Apart from the change to "arch/mips/kernel/cpu-probe.c", which is useful,
> what's the benefit of the changes?  Specifically how is selecting e.g.
> "CPU_4KSC" meant to be different from "CPU_MIPS32_R2"?  Do you want to
> make GCC tune your code according to a specific's CPU pipeline
> description?  If so, then it should probably be done a bit differently and
> there is actually no need to differentiate between specific members of the
> 4K family.
>

True, but we may have some differences in future. For example, they
both implements smart mips instructions. See options passed to GCC in
mips Makefile, they're different from CPU_MIPS32_R2 ones. They also
have a couple of instructions very useful for cryptographic
algorithms. And have some extra bits in TLB to protect pages from
being execute for example. These are the main differences that I can
remember. Big fat warning: I sent all support I have done for these
cpu, _not_ more, _not_ less. I agree it's almost nothing but it's a
start...

> > Signed-off-by: Franck <vagabon.xyz@gmail.com>
>

Ok I'll change it.

Thanks
--
               Franck

Re: [PATCH] Add support for 4KS cpu.

[Maciej W. Rozycki]

On Tue, 4 Oct 2005, Franck wrote:

> >  Please send patches inline.
> 
> I can see it inlined...what email viewer are you using ?

 Well, inlined means straight in the body rather than as a MIME attachment 
-- even if you use "Content-Disposition: inline", it's still one.

> True, but we may have some differences in future. For example, they
> both implements smart mips instructions. See options passed to GCC in
> mips Makefile, they're different from CPU_MIPS32_R2 ones. They also
> have a couple of instructions very useful for cryptographic

 See my other comment in this thread.  As to the SmartMIPS/crypto 
instructions -- unless they are going to be emitted by GCC for the kernel 
build (which I seriously doubt), there is no point in enabling them.

> algorithms. And have some extra bits in TLB to protect pages from
> being execute for example. These are the main differences that I can

 Now that may be of potential interest of the kernel, but again, that's in 
principle probably not specific to these processors, so that should be a 
separate option; if possible one selected at the run time only (hint, 
hint!).

> remember. Big fat warning: I sent all support I have done for these
> cpu, _not_ more, _not_ less. I agree it's almost nothing but it's a
> start...

 Well, it's probably a bit too early for inclusion, but it's certainly not 
for a review.  By sending changes here for discussion early you may avoid 
a lot of hassle later when you may discover a major update is required for 
them to be accepted.  Good luck!

  Maciej

Re: [PATCH] Add support for 4KS cpu.

[Franck]

2005/10/4, Maciej W. Rozycki <macro@linux-mips.org>:
>  See my other comment in this thread.  As to the SmartMIPS/crypto
> instructions -- unless they are going to be emitted by GCC for the kernel
> build (which I seriously doubt), there is no point in enabling them.
>

some assembly code could...

> > algorithms. And have some extra bits in TLB to protect pages from
> > being execute for example. These are the main differences that I can
>
>  Now that may be of potential interest of the kernel, but again, that's in
> principle probably not specific to these processors,
>

hmm, I'm not an expert in MIPS cpu as you guys, so can you give me an
example of others processors that have such TLB features ?

> > remember. Big fat warning: I sent all support I have done for these
> > cpu, _not_ more, _not_ less. I agree it's almost nothing but it's a
> > start...
>
>  Well, it's probably a bit too early for inclusion, but it's certainly not
> for a review.  By sending changes here for discussion early you may avoid
> a lot of hassle later when you may discover a major update is required for
> them to be accepted.  Good luck!

Actually Ralf asked for it in a previous thread.

Thanks
--
               Franck

Re: [PATCH] Add support for 4KS cpu.

[Maciej W. Rozycki]

On Tue, 4 Oct 2005, Franck wrote:

> >  See my other comment in this thread.  As to the SmartMIPS/crypto
> > instructions -- unless they are going to be emitted by GCC for the kernel
> > build (which I seriously doubt), there is no point in enabling them.
> 
> some assembly code could...

 In which case it has to be specific to the configuration used anyway and 
may just locally enable whatever instructions are needed (".set 
smartmips", etc.) and be enabled itself based on configuration, either at 
the run time, if possible and reasonable, or using a CONFIG_* option.

> hmm, I'm not an expert in MIPS cpu as you guys, so can you give me an
> example of others processors that have such TLB features ?

 Well, the extensions are a part of the SmartMIPS ASE, so they are 
certainly not bound to any particular CPU type.

  Maciej

Re: [PATCH] Add support for 4KS cpu.

[Ralf Baechle]

On Tue, Oct 04, 2005 at 03:10:28PM +0200, Franck wrote:

> > > This patch adds support for both 4ksc and 4ksd cpus. These cpu are
> > > mainly used in embedded system such as smartcard or point of sell
> > > devices as they provide some extra security features.
> >
> >  Please send patches inline.
> 
> I can see it inlined...what email viewer are you using ?

The primary reason is that patches will be quoted and commented in email
just like text.  The attachment handling in most mail clients makes this
unnecessarily painful.

  Ralf

Re: [PATCH] Add support for 4KS cpu.

[Ralf Baechle]

On Tue, Oct 04, 2005 at 10:49:44AM +0200, Franck wrote:

> This patch adds support for both 4ksc and 4ksd cpus. These cpu are
> mainly used in embedded system such as smartcard or point of sell
> devices as they provide some extra security features.

So I've applied the cpu-probe.c part.

Thanks,

  Ralf