From: Dmitry Osipenko <digetx@gmail.com>
To: Jon Hunter <jonathanh@nvidia.com>,
Ben Dooks <ben.dooks@codethink.co.uk>,
linux-tegra@vger.kernel.org, alsa-devel@alsa-project.org,
Jaroslav Kysela <perex@perex.cz>, Takashi Iwai <tiwai@suse.com>,
Liam Girdwood <lgirdwood@gmail.com>,
Mark Brown <broonie@kernel.org>,
Thierry Reding <thierry.reding@gmail.com>
Cc: linux-kernel@lists.codethink.co.uk,
Edward Cragg <edward.cragg@codethink.co.uk>
Subject: Re: [alsa-devel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples
Date: Fri, 20 Dec 2019 17:43:36 +0300 [thread overview]
Message-ID: <449bdc3c-bf82-7cc4-6704-440dd100ca3a@gmail.com> (raw)
In-Reply-To: <aba4edd6-0ea5-5e95-c5a0-9e749587c763@nvidia.com>
[-- Attachment #1: Type: text/plain, Size: 6871 bytes --]
20.12.2019 16:57, Jon Hunter пишет:
>
> On 20/12/2019 11:38, Ben Dooks wrote:
>> On 20/12/2019 11:30, Jon Hunter wrote:
>>>
>>> On 25/11/2019 17:28, Dmitry Osipenko wrote:
>>>> 25.11.2019 20:22, Dmitry Osipenko пишет:
>>>>> 25.11.2019 13:37, Ben Dooks пишет:
>>>>>> On 23/11/2019 21:09, Dmitry Osipenko wrote:
>>>>>>> 18.10.2019 18:48, Ben Dooks пишет:
>>>>>>>> From: Edward Cragg <edward.cragg@codethink.co.uk>
>>>>>>>>
>>>>>>>> The tegra3 audio can support 24 and 32 bit sample sizes so add the
>>>>>>>> option to the tegra30_i2s_hw_params to configure the S24_LE or
>>>>>>>> S32_LE
>>>>>>>> formats when requested.
>>>>>>>>
>>>>>>>> Signed-off-by: Edward Cragg <edward.cragg@codethink.co.uk>
>>>>>>>> [ben.dooks@codethink.co.uk: fixup merge of 24 and 32bit]
>>>>>>>> [ben.dooks@codethink.co.uk: add pm calls around ytdm config]
>>>>>>>> [ben.dooks@codethink.co.uk: drop debug printing to dev_dbg]
>>>>>>>> Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
>>>>>>>> ---
>>>>>>>> squash 5aeca5a055fd ASoC: tegra: i2s: pm_runtime_get_sync() is
>>>>>>>> needed
>>>>>>>> in tdm code
>>>>>>>>
>>>>>>>> ASoC: tegra: i2s: pm_runtime_get_sync() is needed in tdm code
>>>>>>>> ---
>>>>>>>> sound/soc/tegra/tegra30_i2s.c | 25 ++++++++++++++++++++-----
>>>>>>>> 1 file changed, 20 insertions(+), 5 deletions(-)
>>>>>>>>
>>>>>>>> diff --git a/sound/soc/tegra/tegra30_i2s.c
>>>>>>>> b/sound/soc/tegra/tegra30_i2s.c
>>>>>>>> index 73f0dddeaef3..063f34c882af 100644
>>>>>>>> --- a/sound/soc/tegra/tegra30_i2s.c
>>>>>>>> +++ b/sound/soc/tegra/tegra30_i2s.c
>>>>>>>> @@ -127,7 +127,7 @@ static int tegra30_i2s_hw_params(struct
>>>>>>>> snd_pcm_substream *substream,
>>>>>>>> struct device *dev = dai->dev;
>>>>>>>> struct tegra30_i2s *i2s = snd_soc_dai_get_drvdata(dai);
>>>>>>>> unsigned int mask, val, reg;
>>>>>>>> - int ret, sample_size, srate, i2sclock, bitcnt;
>>>>>>>> + int ret, sample_size, srate, i2sclock, bitcnt, audio_bits;
>>>>>>>> struct tegra30_ahub_cif_conf cif_conf;
>>>>>>>> if (params_channels(params) != 2)
>>>>>>>> @@ -137,8 +137,19 @@ static int tegra30_i2s_hw_params(struct
>>>>>>>> snd_pcm_substream *substream,
>>>>>>>> switch (params_format(params)) {
>>>>>>>> case SNDRV_PCM_FORMAT_S16_LE:
>>>>>>>> val = TEGRA30_I2S_CTRL_BIT_SIZE_16;
>>>>>>>> + audio_bits = TEGRA30_AUDIOCIF_BITS_16;
>>>>>>>> sample_size = 16;
>>>>>>>> break;
>>>>>>>> + case SNDRV_PCM_FORMAT_S24_LE:
>>>>>>>> + val = TEGRA30_I2S_CTRL_BIT_SIZE_24;
>>>>>>>> + audio_bits = TEGRA30_AUDIOCIF_BITS_24;
>>>>>>>> + sample_size = 24;
>>>>>>>> + break;
>>>>>>>> + case SNDRV_PCM_FORMAT_S32_LE:
>>>>>>>> + val = TEGRA30_I2S_CTRL_BIT_SIZE_32;
>>>>>>>> + audio_bits = TEGRA30_AUDIOCIF_BITS_32;
>>>>>>>> + sample_size = 32;
>>>>>>>> + break;
>>>>>>>> default:
>>>>>>>> return -EINVAL;
>>>>>>>> }
>>>>>>>> @@ -170,8 +181,8 @@ static int tegra30_i2s_hw_params(struct
>>>>>>>> snd_pcm_substream *substream,
>>>>>>>> cif_conf.threshold = 0;
>>>>>>>> cif_conf.audio_channels = 2;
>>>>>>>> cif_conf.client_channels = 2;
>>>>>>>> - cif_conf.audio_bits = TEGRA30_AUDIOCIF_BITS_16;
>>>>>>>> - cif_conf.client_bits = TEGRA30_AUDIOCIF_BITS_16;
>>>>>>>> + cif_conf.audio_bits = audio_bits;
>>>>>>>> + cif_conf.client_bits = audio_bits;
>>>>>>>> cif_conf.expand = 0;
>>>>>>>> cif_conf.stereo_conv = 0;
>>>>>>>> cif_conf.replicate = 0;
>>>>>>>> @@ -306,14 +317,18 @@ static const struct snd_soc_dai_driver
>>>>>>>> tegra30_i2s_dai_template = {
>>>>>>>> .channels_min = 2,
>>>>>>>> .channels_max = 2,
>>>>>>>> .rates = SNDRV_PCM_RATE_8000_96000,
>>>>>>>> - .formats = SNDRV_PCM_FMTBIT_S16_LE,
>>>>>>>> + .formats = SNDRV_PCM_FMTBIT_S32_LE |
>>>>>>>> + SNDRV_PCM_FMTBIT_S24_LE |
>>>>>>>> + SNDRV_PCM_FMTBIT_S16_LE,
>>>>>>>> },
>>>>>>>> .capture = {
>>>>>>>> .stream_name = "Capture",
>>>>>>>> .channels_min = 2,
>>>>>>>> .channels_max = 2,
>>>>>>>> .rates = SNDRV_PCM_RATE_8000_96000,
>>>>>>>> - .formats = SNDRV_PCM_FMTBIT_S16_LE,
>>>>>>>> + .formats = SNDRV_PCM_FMTBIT_S32_LE |
>>>>>>>> + SNDRV_PCM_FMTBIT_S24_LE |
>>>>>>>> + SNDRV_PCM_FMTBIT_S16_LE,
>>>>>>>> },
>>>>>>>> .ops = &tegra30_i2s_dai_ops,
>>>>>>>> .symmetric_rates = 1,
>>>>>>>>
>>>>>>>
>>>>>>> Hello,
>>>>>>>
>>>>>>> This patch breaks audio on Tegra30. I don't see errors anywhere, but
>>>>>>> there is no audio and reverting this patch helps. Please fix it.
>>>>>>
>>>>>> What is the failure mode? I can try and take a look at this some time
>>>>>> this week, but I am not sure if I have any boards with an actual
>>>>>> useful
>>>>>> audio output?
>>>>>
>>>>> The failure mode is that there no sound. I also noticed that video
>>>>> playback stutters a lot if movie file has audio track, seems something
>>>>> times out during of the audio playback. For now I don't have any
>>>>> more info.
>>>>>
>>>>
>>>> Oh, I didn't say how to reproduce it.. for example simply playing
>>>> big_buck_bunny_720p_h264.mov in MPV has the audio problem.
>>>>
>>>> https://download.blender.org/peach/bigbuckbunny_movies/big_buck_bunny_720p_h264.mov
>>>>
>>>
>>> Given that the audio drivers uses regmap, it could be good to dump the
>>> I2S/AHUB registers while the clip if playing with and without this patch
>>> to see the differences. I am curious if the audio is now being played as
>>> 24 or 32-bit instead of 16-bit now these are available.
>>>
>>> You could also dump the hw_params to see the format while playing as
>>> well ...
>>>
>>> $ /proc/asound/<scard-name>/pcm0p/sub0/hw_params
>>
>> I suppose it is also possible that the codec isn't properly doing >16
>> bits and the fact we now offer 24 and 32 could be an issue. I've not
>> got anything with an audio output on it that would be easy to test.
>
> I thought I had tested on a Jetson TK1 (Tegra124) but it was sometime
> back. However, admittedly I may have only done simple 16-bit testing
> with speaker-test.
>
> We do verify that all soundcards are detected and registered as expected
> during daily testing, but at the moment we don't have anything that
> verifies actual playback.
Please take a look at the attached logs.
[-- Attachment #2: works.txt --]
[-- Type: text/plain, Size: 12117 bytes --]
Works
-----
# cat /sys/class/i2c-dev/i2c-2/name
7000d000.i2c
...
i2c@7000d000 {
clock-frequency = <100000>;
status = "okay";
rt5640: rt5640@1c {
compatible = "realtek,rt5640";
reg = <0x1c>;
interrupt-parent = <&gpio>;
interrupts = <TEGRA_GPIO(W, 3) IRQ_TYPE_EDGE_FALLING>;
realtek,dmic1-data-pin = <1>;
realtek,dmic2-data-pin = <0>;
realtek,in1-differential;
};
...
# cat /proc/asound/card0/pcm0p/sub0/hw_params
access: MMAP_INTERLEAVED
format: S16_LE
subformat: STD
channels: 2
rate: 48000 (48000/1)
period_size: 1024
buffer_size: 8192
# trace-cmd record -e regmap:*
# trace-cmd report
CPU 0 is empty
CPU 1 is empty
cpus=4
mpv-308 [002] 171.268104: regmap_cache_only: 70080000.ahub flag=0
mpv-308 [002] 171.268116: regmap_cache_only: 70080000.ahub flag=0
mpv-308 [002] 171.268131: regmap_cache_only: 70080400.i2s flag=0
mpv-308 [002] 171.272549: regmap_reg_read_cache: 2-001c reg=64 val=0
mpv-308 [002] 171.272556: regmap_reg_read_cache: 2-001c reg=80 val=0
mpv-308 [002] 171.272564: regmap_reg_read_cache: 2-001c reg=70 val=8000
mpv-308 [002] 171.272567: regmap_reg_read_cache: 2-001c reg=70 val=8000
mpv-308 [002] 171.272569: regmap_reg_read_cache: 2-001c reg=73 val=1114
mpv-308 [002] 171.272572: regmap_reg_write: 2-001c reg=73 val=114
mpv-308 [002] 171.272581: regmap_hw_write_start: 2-001c reg=73 count=1
mpv-308 [002] 171.273332: regmap_hw_write_done: 2-001c reg=73 count=1
mpv-308 [002] 171.273379: regmap_reg_read_cache: 70080400.i2s reg=0 val=400
mpv-308 [002] 171.273382: regmap_reg_write: 70080400.i2s reg=0 val=403
mpv-308 [002] 171.273395: regmap_reg_write: 70080400.i2s reg=4 val=1f
mpv-308 [002] 171.273398: regmap_reg_write: 70080400.i2s reg=14 val=1013304
mpv-308 [002] 171.273401: regmap_reg_write: 70080400.i2s reg=8 val=10001
kworker/u8:2-145 [003] 171.273992: regmap_reg_read_cache: 2-001c reg=63 val=0
kworker/u8:2-145 [003] 171.273999: regmap_reg_write: 2-001c reg=63 val=a810
kworker/u8:2-145 [003] 171.274006: regmap_hw_write_start: 2-001c reg=63 count=1
kworker/u8:2-145 [003] 171.274478: regmap_hw_write_done: 2-001c reg=63 count=1
kworker/u8:2-145 [003] 171.286067: regmap_reg_read_cache: 2-001c reg=63 val=a810
kworker/u8:2-145 [003] 171.286076: regmap_reg_write: 2-001c reg=63 val=e818
kworker/u8:2-145 [003] 171.286083: regmap_hw_write_start: 2-001c reg=63 count=1
kworker/u8:2-145 [003] 171.286568: regmap_hw_write_done: 2-001c reg=63 count=1
kworker/u8:2-145 [003] 171.286575: regmap_reg_read_cache: 2-001c reg=fa val=3f01
kworker/u8:2-145 [003] 171.286577: regmap_reg_read_cache: 2-001c reg=93 val=3030
mpv-308 [002] 171.286643: regmap_reg_read_cache: 2-001c reg=61 val=0
mpv-308 [002] 171.286647: regmap_reg_write: 2-001c reg=61 val=9800
mpv-308 [002] 171.286650: regmap_hw_write_start: 2-001c reg=61 count=1
mpv-308 [002] 171.287345: regmap_hw_write_done: 2-001c reg=61 count=1
mpv-308 [002] 171.287379: regmap_reg_read_cache: 2-001c reg=63 val=e818
mpv-308 [002] 171.287381: regmap_reg_write: 2-001c reg=63 val=e8d8
mpv-308 [002] 171.287384: regmap_hw_write_start: 2-001c reg=63 count=1
mpv-308 [002] 171.287845: regmap_hw_write_done: 2-001c reg=63 count=1
mpv-308 [002] 171.287875: regmap_hw_read_start: 2-001c reg=6a count=1
mpv-308 [002] 171.289021: regmap_hw_read_done: 2-001c reg=6a count=1
mpv-308 [002] 171.289025: regmap_reg_read: 2-001c reg=6a val=23
mpv-308 [002] 171.289027: regmap_reg_write: 2-001c reg=6a val=24
mpv-308 [002] 171.289029: regmap_hw_write_start: 2-001c reg=6a count=1
mpv-308 [002] 171.289561: regmap_hw_write_done: 2-001c reg=6a count=1
mpv-308 [002] 171.289565: regmap_hw_read_start: 2-001c reg=6c count=1
mpv-308 [002] 171.290174: regmap_hw_read_done: 2-001c reg=6c count=1
mpv-308 [002] 171.290177: regmap_reg_read: 2-001c reg=124 val=420
mpv-308 [002] 171.290180: regmap_reg_write: 2-001c reg=124 val=220
mpv-308 [002] 171.290185: regmap_hw_read_start: 2-001c reg=6a count=1
mpv-308 [002] 171.290800: regmap_hw_read_done: 2-001c reg=6a count=1
mpv-308 [002] 171.290804: regmap_reg_read: 2-001c reg=6a val=24
mpv-308 [002] 171.290807: regmap_hw_write_start: 2-001c reg=6c count=1
mpv-308 [002] 171.291300: regmap_hw_write_done: 2-001c reg=6c count=1
mpv-308 [002] 171.291333: regmap_reg_read_cache: 2-001c reg=8f val=1100
mpv-308 [002] 171.291335: regmap_reg_write: 2-001c reg=8f val=3100
mpv-308 [002] 171.291339: regmap_hw_write_start: 2-001c reg=8f count=1
mpv-308 [002] 171.291802: regmap_hw_write_done: 2-001c reg=8f count=1
mpv-308 [002] 171.291830: regmap_reg_read_cache: 2-001c reg=8e val=4
mpv-308 [002] 171.291833: regmap_reg_write: 2-001c reg=8e val=9
mpv-308 [002] 171.291838: regmap_hw_write_start: 2-001c reg=8e count=1
mpv-308 [002] 171.292433: regmap_hw_write_done: 2-001c reg=8e count=1
mpv-308 [002] 171.292461: regmap_reg_write: 2-001c reg=177 val=9f00
mpv-308 [002] 171.292466: regmap_hw_read_start: 2-001c reg=6a count=1
mpv-308 [002] 171.293274: regmap_hw_read_done: 2-001c reg=6a count=1
mpv-308 [002] 171.293278: regmap_reg_read: 2-001c reg=6a val=24
mpv-308 [002] 171.293281: regmap_reg_write: 2-001c reg=6a val=77
mpv-308 [002] 171.293284: regmap_hw_write_start: 2-001c reg=6a count=1
mpv-308 [002] 171.293894: regmap_hw_write_done: 2-001c reg=6a count=1
mpv-308 [002] 171.293897: regmap_hw_write_start: 2-001c reg=6c count=1
mpv-308 [002] 171.294484: regmap_hw_write_done: 2-001c reg=6c count=1
mpv-308 [002] 171.294510: regmap_reg_read_cache: 2-001c reg=63 val=e8d8
mpv-308 [002] 171.294513: regmap_reg_write: 2-001c reg=63 val=a8d0
mpv-308 [002] 171.294516: regmap_hw_write_start: 2-001c reg=63 count=1
mpv-308 [002] 171.294976: regmap_hw_write_done: 2-001c reg=63 count=1
mpv-308 [002] 171.295001: regmap_reg_read_cache: 2-001c reg=63 val=a8d0
mpv-308 [002] 171.295004: regmap_reg_write: 2-001c reg=63 val=a8f0
mpv-308 [002] 171.295006: regmap_hw_write_start: 2-001c reg=63 count=1
mpv-308 [002] 171.295680: regmap_hw_write_done: 2-001c reg=63 count=1
mpv-308 [002] 171.306100: regmap_reg_read_cache: 2-001c reg=63 val=a8f0
mpv-308 [002] 171.306108: regmap_reg_write: 2-001c reg=63 val=e8f8
mpv-308 [002] 171.306114: regmap_hw_write_start: 2-001c reg=63 count=1
mpv-308 [002] 171.306885: regmap_hw_write_done: 2-001c reg=63 count=1
mpv-308 [002] 171.306954: regmap_reg_read_cache: 2-001c reg=8f val=3100
mpv-308 [002] 171.306957: regmap_reg_write: 2-001c reg=8f val=1140
mpv-308 [002] 171.306961: regmap_hw_write_start: 2-001c reg=8f count=1
mpv-308 [002] 171.307532: regmap_hw_write_done: 2-001c reg=8f count=1
mpv-308 [002] 171.307559: regmap_reg_read_cache: 2-001c reg=91 val=c00
mpv-308 [002] 171.307561: regmap_reg_write: 2-001c reg=91 val=e00
mpv-308 [002] 171.307564: regmap_hw_write_start: 2-001c reg=91 count=1
mpv-308 [002] 171.308068: regmap_hw_write_done: 2-001c reg=91 count=1
mpv-308 [002] 171.308093: regmap_reg_read_cache: 2-001c reg=90 val=646
mpv-308 [002] 171.308096: regmap_reg_write: 2-001c reg=90 val=737
mpv-308 [002] 171.308099: regmap_hw_write_start: 2-001c reg=90 count=1
mpv-308 [002] 171.308573: regmap_hw_write_done: 2-001c reg=90 count=1
mpv-308 [002] 171.308600: regmap_reg_write: 2-001c reg=137 val=1c00
mpv-308 [002] 171.308607: regmap_hw_read_start: 2-001c reg=6a count=1
mpv-308 [002] 171.309204: regmap_hw_read_done: 2-001c reg=6a count=1
mpv-308 [002] 171.309212: regmap_reg_read: 2-001c reg=6a val=77
mpv-308 [002] 171.309215: regmap_reg_write: 2-001c reg=6a val=37
mpv-308 [002] 171.309217: regmap_hw_write_start: 2-001c reg=6a count=1
mpv-308 [002] 171.309994: regmap_hw_write_done: 2-001c reg=6a count=1
mpv-308 [002] 171.309999: regmap_hw_write_start: 2-001c reg=6c count=1
mpv-308 [002] 171.310714: regmap_hw_write_done: 2-001c reg=6c count=1
mpv-308 [002] 171.310747: regmap_reg_read_cache: 2-001c reg=8e val=9
mpv-308 [002] 171.310750: regmap_reg_write: 2-001c reg=8e val=5
mpv-308 [002] 171.310755: regmap_hw_write_start: 2-001c reg=8e count=1
mpv-308 [002] 171.311331: regmap_hw_write_done: 2-001c reg=8e count=1
mpv-308 [002] 171.311361: regmap_hw_read_start: 2-001c reg=6a count=1
mpv-308 [002] 171.312384: regmap_hw_read_done: 2-001c reg=6a count=1
mpv-308 [002] 171.312388: regmap_reg_read: 2-001c reg=6a val=37
mpv-308 [002] 171.312391: regmap_reg_write: 2-001c reg=6a val=24
mpv-308 [002] 171.312394: regmap_hw_write_start: 2-001c reg=6a count=1
mpv-308 [002] 171.312891: regmap_hw_write_done: 2-001c reg=6a count=1
mpv-308 [002] 171.312897: regmap_hw_read_start: 2-001c reg=6c count=1
mpv-308 [002] 171.313657: regmap_hw_read_done: 2-001c reg=6c count=1
mpv-308 [002] 171.313661: regmap_reg_read: 2-001c reg=124 val=220
mpv-308 [002] 171.313664: regmap_reg_write: 2-001c reg=124 val=420
mpv-308 [002] 171.313667: regmap_hw_read_start: 2-001c reg=6a count=1
mpv-308 [002] 171.314977: regmap_hw_read_done: 2-001c reg=6a count=1
mpv-308 [002] 171.314984: regmap_reg_read: 2-001c reg=6a val=24
mpv-308 [002] 171.314990: regmap_hw_write_start: 2-001c reg=6c count=1
mpv-308 [002] 171.315479: regmap_hw_write_done: 2-001c reg=6c count=1
mpv-308 [002] 171.315519: regmap_reg_read_cache: 2-001c reg=2 val=cbcb
mpv-308 [002] 171.315522: regmap_reg_write: 2-001c reg=2 val=4b4b
mpv-308 [002] 171.315525: regmap_hw_write_start: 2-001c reg=2 count=1
mpv-308 [002] 171.316002: regmap_hw_write_done: 2-001c reg=2 count=1
mpv/ao-318 [003] 171.744407: regmap_reg_read_cache: 70080000.ahub reg=0 val=70777
mpv/ao-318 [003] 171.744424: regmap_reg_write: 70080000.ahub reg=0 val=80070777
mpv/ao-318 [003] 171.744433: regmap_reg_read_cache: 70080400.i2s reg=0 val=403
mpv/ao-318 [003] 171.744435: regmap_reg_write: 70080400.i2s reg=0 val=80000403
mpv-308 [002] 173.755178: regmap_reg_read_cache: 70080000.ahub reg=0 val=80070777
mpv-308 [002] 173.755188: regmap_reg_write: 70080000.ahub reg=0 val=70777
mpv-308 [002] 173.755196: regmap_reg_read_cache: 70080400.i2s reg=0 val=80000403
mpv-308 [002] 173.755198: regmap_reg_write: 70080400.i2s reg=0 val=403
[-- Attachment #3: broken.txt --]
[-- Type: text/plain, Size: 12382 bytes --]
Broken
------
# cat /sys/class/i2c-dev/i2c-2/name
7000d000.i2c
...
i2c@7000d000 {
clock-frequency = <100000>;
status = "okay";
rt5640: rt5640@1c {
compatible = "realtek,rt5640";
reg = <0x1c>;
interrupt-parent = <&gpio>;
interrupts = <TEGRA_GPIO(W, 3) IRQ_TYPE_EDGE_FALLING>;
realtek,dmic1-data-pin = <1>;
realtek,dmic2-data-pin = <0>;
realtek,in1-differential;
};
...
# cat /proc/asound/card0/pcm0p/sub0/hw_params
access: MMAP_INTERLEAVED
format: S24_LE
subformat: STD
channels: 2
rate: 48000 (48000/1)
period_size: 512
buffer_size: 4096
# trace-cmd record -e regmap:*
# trace-cmd report
CPU 0 is empty
CPU 1 is empty
cpus=4
mpv-281 [002] 40.227541: regmap_cache_only: 70080000.ahub flag=0
mpv-281 [002] 40.227554: regmap_cache_only: 70080000.ahub flag=0
mpv-281 [002] 40.227572: regmap_cache_only: 70080400.i2s flag=0
mpv-281 [002] 40.236905: regmap_reg_read_cache: 2-001c reg=64 val=0
mpv-281 [002] 40.236921: regmap_reg_read_cache: 2-001c reg=80 val=0
mpv-281 [002] 40.236931: regmap_reg_read_cache: 2-001c reg=70 val=8000
mpv-281 [002] 40.236935: regmap_reg_read_cache: 2-001c reg=70 val=8000
mpv-281 [002] 40.236939: regmap_reg_write: 2-001c reg=70 val=8008
mpv-281 [002] 40.236950: regmap_hw_write_start: 2-001c reg=70 count=1
mpv-281 [002] 40.237776: regmap_hw_write_done: 2-001c reg=70 count=1
mpv-281 [002] 40.237828: regmap_reg_read_cache: 2-001c reg=73 val=1114
mpv-281 [002] 40.237831: regmap_reg_write: 2-001c reg=73 val=8114
mpv-281 [002] 40.237836: regmap_hw_write_start: 2-001c reg=73 count=1
mpv-281 [002] 40.241723: regmap_hw_write_done: 2-001c reg=73 count=1
mpv-281 [002] 40.241794: regmap_reg_read_cache: 70080400.i2s reg=0 val=400
mpv-281 [002] 40.241798: regmap_reg_write: 70080400.i2s reg=0 val=405
mpv-281 [002] 40.241817: regmap_reg_write: 70080400.i2s reg=4 val=2f
mpv-281 [002] 40.241820: regmap_reg_write: 70080400.i2s reg=14 val=1015504
mpv-281 [002] 40.241823: regmap_reg_write: 70080400.i2s reg=8 val=10001
kworker/u8:1-36 [003] 40.242987: regmap_reg_read_cache: 2-001c reg=63 val=0
kworker/u8:1-36 [003] 40.242992: regmap_reg_write: 2-001c reg=63 val=a810
kworker/u8:1-36 [003] 40.243002: regmap_hw_write_start: 2-001c reg=63 count=1
kworker/u8:1-36 [003] 40.243519: regmap_hw_write_done: 2-001c reg=63 count=1
kworker/u8:1-36 [003] 40.256915: regmap_reg_read_cache: 2-001c reg=63 val=a810
kworker/u8:1-36 [003] 40.256924: regmap_reg_write: 2-001c reg=63 val=e818
kworker/u8:1-36 [003] 40.256933: regmap_hw_write_start: 2-001c reg=63 count=1
kworker/u8:1-36 [003] 40.257590: regmap_hw_write_done: 2-001c reg=63 count=1
kworker/u8:1-36 [003] 40.257597: regmap_reg_read_cache: 2-001c reg=fa val=3f01
kworker/u8:1-36 [003] 40.257600: regmap_reg_read_cache: 2-001c reg=93 val=3030
mpv-281 [002] 40.257670: regmap_reg_read_cache: 2-001c reg=61 val=0
mpv-281 [002] 40.257674: regmap_reg_write: 2-001c reg=61 val=9800
mpv-281 [002] 40.257678: regmap_hw_write_start: 2-001c reg=61 count=1
mpv-281 [002] 40.258409: regmap_hw_write_done: 2-001c reg=61 count=1
mpv-281 [002] 40.258448: regmap_reg_read_cache: 2-001c reg=63 val=e818
mpv-281 [002] 40.258451: regmap_reg_write: 2-001c reg=63 val=e8d8
mpv-281 [002] 40.258454: regmap_hw_write_start: 2-001c reg=63 count=1
mpv-281 [002] 40.259701: regmap_hw_write_done: 2-001c reg=63 count=1
mpv-281 [002] 40.259751: regmap_hw_read_start: 2-001c reg=6a count=1
mpv-281 [002] 40.260357: regmap_hw_read_done: 2-001c reg=6a count=1
mpv-281 [002] 40.260361: regmap_reg_read: 2-001c reg=6a val=23
mpv-281 [002] 40.260365: regmap_reg_write: 2-001c reg=6a val=24
mpv-281 [002] 40.260367: regmap_hw_write_start: 2-001c reg=6a count=1
mpv-281 [002] 40.260881: regmap_hw_write_done: 2-001c reg=6a count=1
mpv-281 [002] 40.260885: regmap_hw_read_start: 2-001c reg=6c count=1
mpv-281 [002] 40.263245: regmap_hw_read_done: 2-001c reg=6c count=1
mpv-281 [002] 40.263251: regmap_reg_read: 2-001c reg=124 val=420
mpv-281 [002] 40.263255: regmap_reg_write: 2-001c reg=124 val=220
mpv-281 [002] 40.263260: regmap_hw_read_start: 2-001c reg=6a count=1
mpv-281 [002] 40.264325: regmap_hw_read_done: 2-001c reg=6a count=1
mpv-281 [002] 40.264330: regmap_reg_read: 2-001c reg=6a val=24
mpv-281 [002] 40.264334: regmap_hw_write_start: 2-001c reg=6c count=1
mpv-281 [002] 40.264827: regmap_hw_write_done: 2-001c reg=6c count=1
mpv-281 [002] 40.264859: regmap_reg_read_cache: 2-001c reg=8f val=1100
mpv-281 [002] 40.264867: regmap_reg_write: 2-001c reg=8f val=3100
mpv-281 [002] 40.264871: regmap_hw_write_start: 2-001c reg=8f count=1
mpv-281 [002] 40.265939: regmap_hw_write_done: 2-001c reg=8f count=1
mpv-281 [002] 40.265976: regmap_reg_read_cache: 2-001c reg=8e val=4
mpv-281 [002] 40.265981: regmap_reg_write: 2-001c reg=8e val=9
mpv-281 [002] 40.265986: regmap_hw_write_start: 2-001c reg=8e count=1
mpv-281 [002] 40.267142: regmap_hw_write_done: 2-001c reg=8e count=1
mpv-281 [002] 40.267172: regmap_reg_write: 2-001c reg=177 val=9f00
mpv-281 [002] 40.267182: regmap_hw_read_start: 2-001c reg=6a count=1
mpv-281 [002] 40.267842: regmap_hw_read_done: 2-001c reg=6a count=1
mpv-281 [002] 40.267845: regmap_reg_read: 2-001c reg=6a val=24
mpv-281 [002] 40.267848: regmap_reg_write: 2-001c reg=6a val=77
mpv-281 [002] 40.267851: regmap_hw_write_start: 2-001c reg=6a count=1
mpv-281 [002] 40.268937: regmap_hw_write_done: 2-001c reg=6a count=1
mpv-281 [002] 40.268943: regmap_hw_write_start: 2-001c reg=6c count=1
mpv-281 [002] 40.269454: regmap_hw_write_done: 2-001c reg=6c count=1
mpv-281 [002] 40.269484: regmap_reg_read_cache: 2-001c reg=63 val=e8d8
mpv-281 [002] 40.269487: regmap_reg_write: 2-001c reg=63 val=a8d0
mpv-281 [002] 40.269490: regmap_hw_write_start: 2-001c reg=63 count=1
mpv-281 [002] 40.270012: regmap_hw_write_done: 2-001c reg=63 count=1
mpv-281 [002] 40.271740: regmap_reg_read_cache: 2-001c reg=63 val=a8d0
mpv-281 [002] 40.271748: regmap_reg_write: 2-001c reg=63 val=a8f0
mpv-281 [002] 40.271753: regmap_hw_write_start: 2-001c reg=63 count=1
mpv-281 [002] 40.272240: regmap_hw_write_done: 2-001c reg=63 count=1
mpv-281 [002] 40.286888: regmap_reg_read_cache: 2-001c reg=63 val=a8f0
mpv-281 [002] 40.286901: regmap_reg_write: 2-001c reg=63 val=e8f8
mpv-281 [002] 40.286917: regmap_hw_write_start: 2-001c reg=63 count=1
mpv-281 [002] 40.287748: regmap_hw_write_done: 2-001c reg=63 count=1
mpv-281 [002] 40.287841: regmap_reg_read_cache: 2-001c reg=8f val=3100
mpv-281 [002] 40.287844: regmap_reg_write: 2-001c reg=8f val=1140
mpv-281 [002] 40.287847: regmap_hw_write_start: 2-001c reg=8f count=1
mpv-281 [002] 40.288310: regmap_hw_write_done: 2-001c reg=8f count=1
mpv-281 [002] 40.288339: regmap_reg_read_cache: 2-001c reg=91 val=c00
mpv-281 [002] 40.288341: regmap_reg_write: 2-001c reg=91 val=e00
mpv-281 [002] 40.288344: regmap_hw_write_start: 2-001c reg=91 count=1
mpv-281 [002] 40.288808: regmap_hw_write_done: 2-001c reg=91 count=1
mpv-281 [002] 40.288838: regmap_reg_read_cache: 2-001c reg=90 val=646
mpv-281 [002] 40.288840: regmap_reg_write: 2-001c reg=90 val=737
mpv-281 [002] 40.288844: regmap_hw_write_start: 2-001c reg=90 count=1
mpv-281 [002] 40.289792: regmap_hw_write_done: 2-001c reg=90 count=1
mpv-281 [002] 40.289828: regmap_reg_write: 2-001c reg=137 val=1c00
mpv-281 [002] 40.289837: regmap_hw_read_start: 2-001c reg=6a count=1
mpv-281 [002] 40.291772: regmap_hw_read_done: 2-001c reg=6a count=1
mpv-281 [002] 40.291782: regmap_reg_read: 2-001c reg=6a val=77
mpv-281 [002] 40.291788: regmap_reg_write: 2-001c reg=6a val=37
mpv-281 [002] 40.291792: regmap_hw_write_start: 2-001c reg=6a count=1
mpv-281 [002] 40.292320: regmap_hw_write_done: 2-001c reg=6a count=1
mpv-281 [002] 40.292324: regmap_hw_write_start: 2-001c reg=6c count=1
mpv-281 [002] 40.293579: regmap_hw_write_done: 2-001c reg=6c count=1
mpv-281 [002] 40.293616: regmap_reg_read_cache: 2-001c reg=8e val=9
mpv-281 [002] 40.293618: regmap_reg_write: 2-001c reg=8e val=5
mpv-281 [002] 40.293623: regmap_hw_write_start: 2-001c reg=8e count=1
mpv-281 [002] 40.294179: regmap_hw_write_done: 2-001c reg=8e count=1
mpv-281 [002] 40.294211: regmap_hw_read_start: 2-001c reg=6a count=1
mpv-281 [002] 40.295183: regmap_hw_read_done: 2-001c reg=6a count=1
mpv-281 [002] 40.295187: regmap_reg_read: 2-001c reg=6a val=37
mpv-281 [002] 40.295194: regmap_reg_write: 2-001c reg=6a val=24
mpv-281 [002] 40.295196: regmap_hw_write_start: 2-001c reg=6a count=1
mpv-281 [002] 40.296301: regmap_hw_write_done: 2-001c reg=6a count=1
mpv-281 [002] 40.296308: regmap_hw_read_start: 2-001c reg=6c count=1
mpv-281 [002] 40.298769: regmap_hw_read_done: 2-001c reg=6c count=1
mpv-281 [002] 40.298777: regmap_reg_read: 2-001c reg=124 val=220
mpv-281 [002] 40.298784: regmap_reg_write: 2-001c reg=124 val=420
mpv-281 [002] 40.298790: regmap_hw_read_start: 2-001c reg=6a count=1
mpv-281 [002] 40.299542: regmap_hw_read_done: 2-001c reg=6a count=1
mpv-281 [002] 40.299549: regmap_reg_read: 2-001c reg=6a val=24
mpv-281 [002] 40.299555: regmap_hw_write_start: 2-001c reg=6c count=1
mpv-281 [002] 40.300054: regmap_hw_write_done: 2-001c reg=6c count=1
mpv-281 [002] 40.300107: regmap_reg_read_cache: 2-001c reg=2 val=cbcb
mpv-281 [002] 40.300110: regmap_reg_write: 2-001c reg=2 val=4b4b
mpv-281 [002] 40.300115: regmap_hw_write_start: 2-001c reg=2 count=1
mpv-281 [002] 40.300756: regmap_hw_write_done: 2-001c reg=2 count=1
mpv/ao-290 [003] 40.721759: regmap_reg_read_cache: 70080000.ahub reg=0 val=70777
mpv/ao-290 [003] 40.721776: regmap_reg_write: 70080000.ahub reg=0 val=80070777
mpv/ao-290 [003] 40.721787: regmap_reg_read_cache: 70080400.i2s reg=0 val=405
mpv/ao-290 [003] 40.721789: regmap_reg_write: 70080400.i2s reg=0 val=80000405
mpv-281 [002] 41.693159: regmap_reg_read_cache: 70080000.ahub reg=0 val=80070777
mpv-281 [002] 41.693185: regmap_reg_write: 70080000.ahub reg=0 val=70777
mpv-281 [002] 41.693200: regmap_reg_read_cache: 70080400.i2s reg=0 val=80000405
mpv-281 [002] 41.693203: regmap_reg_write: 70080400.i2s reg=0 val=405
[-- Attachment #4: Type: text/plain, Size: 161 bytes --]
_______________________________________________
Alsa-devel mailing list
Alsa-devel@alsa-project.org
https://mailman.alsa-project.org/mailman/listinfo/alsa-devel
WARNING: multiple messages have this Message-ID (diff)
From: Dmitry Osipenko <digetx@gmail.com>
To: Jon Hunter <jonathanh@nvidia.com>,
Ben Dooks <ben.dooks@codethink.co.uk>,
linux-tegra@vger.kernel.org, alsa-devel@alsa-project.org,
Jaroslav Kysela <perex@perex.cz>, Takashi Iwai <tiwai@suse.com>,
Liam Girdwood <lgirdwood@gmail.com>,
Mark Brown <broonie@kernel.org>,
Thierry Reding <thierry.reding@gmail.com>
Cc: linux-kernel@lists.codethink.co.uk,
Edward Cragg <edward.cragg@codethink.co.uk>
Subject: Re: [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples
Date: Fri, 20 Dec 2019 17:43:36 +0300 [thread overview]
Message-ID: <449bdc3c-bf82-7cc4-6704-440dd100ca3a@gmail.com> (raw)
In-Reply-To: <aba4edd6-0ea5-5e95-c5a0-9e749587c763@nvidia.com>
[-- Attachment #1: Type: text/plain, Size: 6871 bytes --]
20.12.2019 16:57, Jon Hunter пишет:
>
> On 20/12/2019 11:38, Ben Dooks wrote:
>> On 20/12/2019 11:30, Jon Hunter wrote:
>>>
>>> On 25/11/2019 17:28, Dmitry Osipenko wrote:
>>>> 25.11.2019 20:22, Dmitry Osipenko пишет:
>>>>> 25.11.2019 13:37, Ben Dooks пишет:
>>>>>> On 23/11/2019 21:09, Dmitry Osipenko wrote:
>>>>>>> 18.10.2019 18:48, Ben Dooks пишет:
>>>>>>>> From: Edward Cragg <edward.cragg@codethink.co.uk>
>>>>>>>>
>>>>>>>> The tegra3 audio can support 24 and 32 bit sample sizes so add the
>>>>>>>> option to the tegra30_i2s_hw_params to configure the S24_LE or
>>>>>>>> S32_LE
>>>>>>>> formats when requested.
>>>>>>>>
>>>>>>>> Signed-off-by: Edward Cragg <edward.cragg@codethink.co.uk>
>>>>>>>> [ben.dooks@codethink.co.uk: fixup merge of 24 and 32bit]
>>>>>>>> [ben.dooks@codethink.co.uk: add pm calls around ytdm config]
>>>>>>>> [ben.dooks@codethink.co.uk: drop debug printing to dev_dbg]
>>>>>>>> Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
>>>>>>>> ---
>>>>>>>> squash 5aeca5a055fd ASoC: tegra: i2s: pm_runtime_get_sync() is
>>>>>>>> needed
>>>>>>>> in tdm code
>>>>>>>>
>>>>>>>> ASoC: tegra: i2s: pm_runtime_get_sync() is needed in tdm code
>>>>>>>> ---
>>>>>>>> sound/soc/tegra/tegra30_i2s.c | 25 ++++++++++++++++++++-----
>>>>>>>> 1 file changed, 20 insertions(+), 5 deletions(-)
>>>>>>>>
>>>>>>>> diff --git a/sound/soc/tegra/tegra30_i2s.c
>>>>>>>> b/sound/soc/tegra/tegra30_i2s.c
>>>>>>>> index 73f0dddeaef3..063f34c882af 100644
>>>>>>>> --- a/sound/soc/tegra/tegra30_i2s.c
>>>>>>>> +++ b/sound/soc/tegra/tegra30_i2s.c
>>>>>>>> @@ -127,7 +127,7 @@ static int tegra30_i2s_hw_params(struct
>>>>>>>> snd_pcm_substream *substream,
>>>>>>>> struct device *dev = dai->dev;
>>>>>>>> struct tegra30_i2s *i2s = snd_soc_dai_get_drvdata(dai);
>>>>>>>> unsigned int mask, val, reg;
>>>>>>>> - int ret, sample_size, srate, i2sclock, bitcnt;
>>>>>>>> + int ret, sample_size, srate, i2sclock, bitcnt, audio_bits;
>>>>>>>> struct tegra30_ahub_cif_conf cif_conf;
>>>>>>>> if (params_channels(params) != 2)
>>>>>>>> @@ -137,8 +137,19 @@ static int tegra30_i2s_hw_params(struct
>>>>>>>> snd_pcm_substream *substream,
>>>>>>>> switch (params_format(params)) {
>>>>>>>> case SNDRV_PCM_FORMAT_S16_LE:
>>>>>>>> val = TEGRA30_I2S_CTRL_BIT_SIZE_16;
>>>>>>>> + audio_bits = TEGRA30_AUDIOCIF_BITS_16;
>>>>>>>> sample_size = 16;
>>>>>>>> break;
>>>>>>>> + case SNDRV_PCM_FORMAT_S24_LE:
>>>>>>>> + val = TEGRA30_I2S_CTRL_BIT_SIZE_24;
>>>>>>>> + audio_bits = TEGRA30_AUDIOCIF_BITS_24;
>>>>>>>> + sample_size = 24;
>>>>>>>> + break;
>>>>>>>> + case SNDRV_PCM_FORMAT_S32_LE:
>>>>>>>> + val = TEGRA30_I2S_CTRL_BIT_SIZE_32;
>>>>>>>> + audio_bits = TEGRA30_AUDIOCIF_BITS_32;
>>>>>>>> + sample_size = 32;
>>>>>>>> + break;
>>>>>>>> default:
>>>>>>>> return -EINVAL;
>>>>>>>> }
>>>>>>>> @@ -170,8 +181,8 @@ static int tegra30_i2s_hw_params(struct
>>>>>>>> snd_pcm_substream *substream,
>>>>>>>> cif_conf.threshold = 0;
>>>>>>>> cif_conf.audio_channels = 2;
>>>>>>>> cif_conf.client_channels = 2;
>>>>>>>> - cif_conf.audio_bits = TEGRA30_AUDIOCIF_BITS_16;
>>>>>>>> - cif_conf.client_bits = TEGRA30_AUDIOCIF_BITS_16;
>>>>>>>> + cif_conf.audio_bits = audio_bits;
>>>>>>>> + cif_conf.client_bits = audio_bits;
>>>>>>>> cif_conf.expand = 0;
>>>>>>>> cif_conf.stereo_conv = 0;
>>>>>>>> cif_conf.replicate = 0;
>>>>>>>> @@ -306,14 +317,18 @@ static const struct snd_soc_dai_driver
>>>>>>>> tegra30_i2s_dai_template = {
>>>>>>>> .channels_min = 2,
>>>>>>>> .channels_max = 2,
>>>>>>>> .rates = SNDRV_PCM_RATE_8000_96000,
>>>>>>>> - .formats = SNDRV_PCM_FMTBIT_S16_LE,
>>>>>>>> + .formats = SNDRV_PCM_FMTBIT_S32_LE |
>>>>>>>> + SNDRV_PCM_FMTBIT_S24_LE |
>>>>>>>> + SNDRV_PCM_FMTBIT_S16_LE,
>>>>>>>> },
>>>>>>>> .capture = {
>>>>>>>> .stream_name = "Capture",
>>>>>>>> .channels_min = 2,
>>>>>>>> .channels_max = 2,
>>>>>>>> .rates = SNDRV_PCM_RATE_8000_96000,
>>>>>>>> - .formats = SNDRV_PCM_FMTBIT_S16_LE,
>>>>>>>> + .formats = SNDRV_PCM_FMTBIT_S32_LE |
>>>>>>>> + SNDRV_PCM_FMTBIT_S24_LE |
>>>>>>>> + SNDRV_PCM_FMTBIT_S16_LE,
>>>>>>>> },
>>>>>>>> .ops = &tegra30_i2s_dai_ops,
>>>>>>>> .symmetric_rates = 1,
>>>>>>>>
>>>>>>>
>>>>>>> Hello,
>>>>>>>
>>>>>>> This patch breaks audio on Tegra30. I don't see errors anywhere, but
>>>>>>> there is no audio and reverting this patch helps. Please fix it.
>>>>>>
>>>>>> What is the failure mode? I can try and take a look at this some time
>>>>>> this week, but I am not sure if I have any boards with an actual
>>>>>> useful
>>>>>> audio output?
>>>>>
>>>>> The failure mode is that there no sound. I also noticed that video
>>>>> playback stutters a lot if movie file has audio track, seems something
>>>>> times out during of the audio playback. For now I don't have any
>>>>> more info.
>>>>>
>>>>
>>>> Oh, I didn't say how to reproduce it.. for example simply playing
>>>> big_buck_bunny_720p_h264.mov in MPV has the audio problem.
>>>>
>>>> https://download.blender.org/peach/bigbuckbunny_movies/big_buck_bunny_720p_h264.mov
>>>>
>>>
>>> Given that the audio drivers uses regmap, it could be good to dump the
>>> I2S/AHUB registers while the clip if playing with and without this patch
>>> to see the differences. I am curious if the audio is now being played as
>>> 24 or 32-bit instead of 16-bit now these are available.
>>>
>>> You could also dump the hw_params to see the format while playing as
>>> well ...
>>>
>>> $ /proc/asound/<scard-name>/pcm0p/sub0/hw_params
>>
>> I suppose it is also possible that the codec isn't properly doing >16
>> bits and the fact we now offer 24 and 32 could be an issue. I've not
>> got anything with an audio output on it that would be easy to test.
>
> I thought I had tested on a Jetson TK1 (Tegra124) but it was sometime
> back. However, admittedly I may have only done simple 16-bit testing
> with speaker-test.
>
> We do verify that all soundcards are detected and registered as expected
> during daily testing, but at the moment we don't have anything that
> verifies actual playback.
Please take a look at the attached logs.
[-- Attachment #2: works.txt --]
[-- Type: text/plain, Size: 12117 bytes --]
Works
-----
# cat /sys/class/i2c-dev/i2c-2/name
7000d000.i2c
...
i2c@7000d000 {
clock-frequency = <100000>;
status = "okay";
rt5640: rt5640@1c {
compatible = "realtek,rt5640";
reg = <0x1c>;
interrupt-parent = <&gpio>;
interrupts = <TEGRA_GPIO(W, 3) IRQ_TYPE_EDGE_FALLING>;
realtek,dmic1-data-pin = <1>;
realtek,dmic2-data-pin = <0>;
realtek,in1-differential;
};
...
# cat /proc/asound/card0/pcm0p/sub0/hw_params
access: MMAP_INTERLEAVED
format: S16_LE
subformat: STD
channels: 2
rate: 48000 (48000/1)
period_size: 1024
buffer_size: 8192
# trace-cmd record -e regmap:*
# trace-cmd report
CPU 0 is empty
CPU 1 is empty
cpus=4
mpv-308 [002] 171.268104: regmap_cache_only: 70080000.ahub flag=0
mpv-308 [002] 171.268116: regmap_cache_only: 70080000.ahub flag=0
mpv-308 [002] 171.268131: regmap_cache_only: 70080400.i2s flag=0
mpv-308 [002] 171.272549: regmap_reg_read_cache: 2-001c reg=64 val=0
mpv-308 [002] 171.272556: regmap_reg_read_cache: 2-001c reg=80 val=0
mpv-308 [002] 171.272564: regmap_reg_read_cache: 2-001c reg=70 val=8000
mpv-308 [002] 171.272567: regmap_reg_read_cache: 2-001c reg=70 val=8000
mpv-308 [002] 171.272569: regmap_reg_read_cache: 2-001c reg=73 val=1114
mpv-308 [002] 171.272572: regmap_reg_write: 2-001c reg=73 val=114
mpv-308 [002] 171.272581: regmap_hw_write_start: 2-001c reg=73 count=1
mpv-308 [002] 171.273332: regmap_hw_write_done: 2-001c reg=73 count=1
mpv-308 [002] 171.273379: regmap_reg_read_cache: 70080400.i2s reg=0 val=400
mpv-308 [002] 171.273382: regmap_reg_write: 70080400.i2s reg=0 val=403
mpv-308 [002] 171.273395: regmap_reg_write: 70080400.i2s reg=4 val=1f
mpv-308 [002] 171.273398: regmap_reg_write: 70080400.i2s reg=14 val=1013304
mpv-308 [002] 171.273401: regmap_reg_write: 70080400.i2s reg=8 val=10001
kworker/u8:2-145 [003] 171.273992: regmap_reg_read_cache: 2-001c reg=63 val=0
kworker/u8:2-145 [003] 171.273999: regmap_reg_write: 2-001c reg=63 val=a810
kworker/u8:2-145 [003] 171.274006: regmap_hw_write_start: 2-001c reg=63 count=1
kworker/u8:2-145 [003] 171.274478: regmap_hw_write_done: 2-001c reg=63 count=1
kworker/u8:2-145 [003] 171.286067: regmap_reg_read_cache: 2-001c reg=63 val=a810
kworker/u8:2-145 [003] 171.286076: regmap_reg_write: 2-001c reg=63 val=e818
kworker/u8:2-145 [003] 171.286083: regmap_hw_write_start: 2-001c reg=63 count=1
kworker/u8:2-145 [003] 171.286568: regmap_hw_write_done: 2-001c reg=63 count=1
kworker/u8:2-145 [003] 171.286575: regmap_reg_read_cache: 2-001c reg=fa val=3f01
kworker/u8:2-145 [003] 171.286577: regmap_reg_read_cache: 2-001c reg=93 val=3030
mpv-308 [002] 171.286643: regmap_reg_read_cache: 2-001c reg=61 val=0
mpv-308 [002] 171.286647: regmap_reg_write: 2-001c reg=61 val=9800
mpv-308 [002] 171.286650: regmap_hw_write_start: 2-001c reg=61 count=1
mpv-308 [002] 171.287345: regmap_hw_write_done: 2-001c reg=61 count=1
mpv-308 [002] 171.287379: regmap_reg_read_cache: 2-001c reg=63 val=e818
mpv-308 [002] 171.287381: regmap_reg_write: 2-001c reg=63 val=e8d8
mpv-308 [002] 171.287384: regmap_hw_write_start: 2-001c reg=63 count=1
mpv-308 [002] 171.287845: regmap_hw_write_done: 2-001c reg=63 count=1
mpv-308 [002] 171.287875: regmap_hw_read_start: 2-001c reg=6a count=1
mpv-308 [002] 171.289021: regmap_hw_read_done: 2-001c reg=6a count=1
mpv-308 [002] 171.289025: regmap_reg_read: 2-001c reg=6a val=23
mpv-308 [002] 171.289027: regmap_reg_write: 2-001c reg=6a val=24
mpv-308 [002] 171.289029: regmap_hw_write_start: 2-001c reg=6a count=1
mpv-308 [002] 171.289561: regmap_hw_write_done: 2-001c reg=6a count=1
mpv-308 [002] 171.289565: regmap_hw_read_start: 2-001c reg=6c count=1
mpv-308 [002] 171.290174: regmap_hw_read_done: 2-001c reg=6c count=1
mpv-308 [002] 171.290177: regmap_reg_read: 2-001c reg=124 val=420
mpv-308 [002] 171.290180: regmap_reg_write: 2-001c reg=124 val=220
mpv-308 [002] 171.290185: regmap_hw_read_start: 2-001c reg=6a count=1
mpv-308 [002] 171.290800: regmap_hw_read_done: 2-001c reg=6a count=1
mpv-308 [002] 171.290804: regmap_reg_read: 2-001c reg=6a val=24
mpv-308 [002] 171.290807: regmap_hw_write_start: 2-001c reg=6c count=1
mpv-308 [002] 171.291300: regmap_hw_write_done: 2-001c reg=6c count=1
mpv-308 [002] 171.291333: regmap_reg_read_cache: 2-001c reg=8f val=1100
mpv-308 [002] 171.291335: regmap_reg_write: 2-001c reg=8f val=3100
mpv-308 [002] 171.291339: regmap_hw_write_start: 2-001c reg=8f count=1
mpv-308 [002] 171.291802: regmap_hw_write_done: 2-001c reg=8f count=1
mpv-308 [002] 171.291830: regmap_reg_read_cache: 2-001c reg=8e val=4
mpv-308 [002] 171.291833: regmap_reg_write: 2-001c reg=8e val=9
mpv-308 [002] 171.291838: regmap_hw_write_start: 2-001c reg=8e count=1
mpv-308 [002] 171.292433: regmap_hw_write_done: 2-001c reg=8e count=1
mpv-308 [002] 171.292461: regmap_reg_write: 2-001c reg=177 val=9f00
mpv-308 [002] 171.292466: regmap_hw_read_start: 2-001c reg=6a count=1
mpv-308 [002] 171.293274: regmap_hw_read_done: 2-001c reg=6a count=1
mpv-308 [002] 171.293278: regmap_reg_read: 2-001c reg=6a val=24
mpv-308 [002] 171.293281: regmap_reg_write: 2-001c reg=6a val=77
mpv-308 [002] 171.293284: regmap_hw_write_start: 2-001c reg=6a count=1
mpv-308 [002] 171.293894: regmap_hw_write_done: 2-001c reg=6a count=1
mpv-308 [002] 171.293897: regmap_hw_write_start: 2-001c reg=6c count=1
mpv-308 [002] 171.294484: regmap_hw_write_done: 2-001c reg=6c count=1
mpv-308 [002] 171.294510: regmap_reg_read_cache: 2-001c reg=63 val=e8d8
mpv-308 [002] 171.294513: regmap_reg_write: 2-001c reg=63 val=a8d0
mpv-308 [002] 171.294516: regmap_hw_write_start: 2-001c reg=63 count=1
mpv-308 [002] 171.294976: regmap_hw_write_done: 2-001c reg=63 count=1
mpv-308 [002] 171.295001: regmap_reg_read_cache: 2-001c reg=63 val=a8d0
mpv-308 [002] 171.295004: regmap_reg_write: 2-001c reg=63 val=a8f0
mpv-308 [002] 171.295006: regmap_hw_write_start: 2-001c reg=63 count=1
mpv-308 [002] 171.295680: regmap_hw_write_done: 2-001c reg=63 count=1
mpv-308 [002] 171.306100: regmap_reg_read_cache: 2-001c reg=63 val=a8f0
mpv-308 [002] 171.306108: regmap_reg_write: 2-001c reg=63 val=e8f8
mpv-308 [002] 171.306114: regmap_hw_write_start: 2-001c reg=63 count=1
mpv-308 [002] 171.306885: regmap_hw_write_done: 2-001c reg=63 count=1
mpv-308 [002] 171.306954: regmap_reg_read_cache: 2-001c reg=8f val=3100
mpv-308 [002] 171.306957: regmap_reg_write: 2-001c reg=8f val=1140
mpv-308 [002] 171.306961: regmap_hw_write_start: 2-001c reg=8f count=1
mpv-308 [002] 171.307532: regmap_hw_write_done: 2-001c reg=8f count=1
mpv-308 [002] 171.307559: regmap_reg_read_cache: 2-001c reg=91 val=c00
mpv-308 [002] 171.307561: regmap_reg_write: 2-001c reg=91 val=e00
mpv-308 [002] 171.307564: regmap_hw_write_start: 2-001c reg=91 count=1
mpv-308 [002] 171.308068: regmap_hw_write_done: 2-001c reg=91 count=1
mpv-308 [002] 171.308093: regmap_reg_read_cache: 2-001c reg=90 val=646
mpv-308 [002] 171.308096: regmap_reg_write: 2-001c reg=90 val=737
mpv-308 [002] 171.308099: regmap_hw_write_start: 2-001c reg=90 count=1
mpv-308 [002] 171.308573: regmap_hw_write_done: 2-001c reg=90 count=1
mpv-308 [002] 171.308600: regmap_reg_write: 2-001c reg=137 val=1c00
mpv-308 [002] 171.308607: regmap_hw_read_start: 2-001c reg=6a count=1
mpv-308 [002] 171.309204: regmap_hw_read_done: 2-001c reg=6a count=1
mpv-308 [002] 171.309212: regmap_reg_read: 2-001c reg=6a val=77
mpv-308 [002] 171.309215: regmap_reg_write: 2-001c reg=6a val=37
mpv-308 [002] 171.309217: regmap_hw_write_start: 2-001c reg=6a count=1
mpv-308 [002] 171.309994: regmap_hw_write_done: 2-001c reg=6a count=1
mpv-308 [002] 171.309999: regmap_hw_write_start: 2-001c reg=6c count=1
mpv-308 [002] 171.310714: regmap_hw_write_done: 2-001c reg=6c count=1
mpv-308 [002] 171.310747: regmap_reg_read_cache: 2-001c reg=8e val=9
mpv-308 [002] 171.310750: regmap_reg_write: 2-001c reg=8e val=5
mpv-308 [002] 171.310755: regmap_hw_write_start: 2-001c reg=8e count=1
mpv-308 [002] 171.311331: regmap_hw_write_done: 2-001c reg=8e count=1
mpv-308 [002] 171.311361: regmap_hw_read_start: 2-001c reg=6a count=1
mpv-308 [002] 171.312384: regmap_hw_read_done: 2-001c reg=6a count=1
mpv-308 [002] 171.312388: regmap_reg_read: 2-001c reg=6a val=37
mpv-308 [002] 171.312391: regmap_reg_write: 2-001c reg=6a val=24
mpv-308 [002] 171.312394: regmap_hw_write_start: 2-001c reg=6a count=1
mpv-308 [002] 171.312891: regmap_hw_write_done: 2-001c reg=6a count=1
mpv-308 [002] 171.312897: regmap_hw_read_start: 2-001c reg=6c count=1
mpv-308 [002] 171.313657: regmap_hw_read_done: 2-001c reg=6c count=1
mpv-308 [002] 171.313661: regmap_reg_read: 2-001c reg=124 val=220
mpv-308 [002] 171.313664: regmap_reg_write: 2-001c reg=124 val=420
mpv-308 [002] 171.313667: regmap_hw_read_start: 2-001c reg=6a count=1
mpv-308 [002] 171.314977: regmap_hw_read_done: 2-001c reg=6a count=1
mpv-308 [002] 171.314984: regmap_reg_read: 2-001c reg=6a val=24
mpv-308 [002] 171.314990: regmap_hw_write_start: 2-001c reg=6c count=1
mpv-308 [002] 171.315479: regmap_hw_write_done: 2-001c reg=6c count=1
mpv-308 [002] 171.315519: regmap_reg_read_cache: 2-001c reg=2 val=cbcb
mpv-308 [002] 171.315522: regmap_reg_write: 2-001c reg=2 val=4b4b
mpv-308 [002] 171.315525: regmap_hw_write_start: 2-001c reg=2 count=1
mpv-308 [002] 171.316002: regmap_hw_write_done: 2-001c reg=2 count=1
mpv/ao-318 [003] 171.744407: regmap_reg_read_cache: 70080000.ahub reg=0 val=70777
mpv/ao-318 [003] 171.744424: regmap_reg_write: 70080000.ahub reg=0 val=80070777
mpv/ao-318 [003] 171.744433: regmap_reg_read_cache: 70080400.i2s reg=0 val=403
mpv/ao-318 [003] 171.744435: regmap_reg_write: 70080400.i2s reg=0 val=80000403
mpv-308 [002] 173.755178: regmap_reg_read_cache: 70080000.ahub reg=0 val=80070777
mpv-308 [002] 173.755188: regmap_reg_write: 70080000.ahub reg=0 val=70777
mpv-308 [002] 173.755196: regmap_reg_read_cache: 70080400.i2s reg=0 val=80000403
mpv-308 [002] 173.755198: regmap_reg_write: 70080400.i2s reg=0 val=403
[-- Attachment #3: broken.txt --]
[-- Type: text/plain, Size: 12382 bytes --]
Broken
------
# cat /sys/class/i2c-dev/i2c-2/name
7000d000.i2c
...
i2c@7000d000 {
clock-frequency = <100000>;
status = "okay";
rt5640: rt5640@1c {
compatible = "realtek,rt5640";
reg = <0x1c>;
interrupt-parent = <&gpio>;
interrupts = <TEGRA_GPIO(W, 3) IRQ_TYPE_EDGE_FALLING>;
realtek,dmic1-data-pin = <1>;
realtek,dmic2-data-pin = <0>;
realtek,in1-differential;
};
...
# cat /proc/asound/card0/pcm0p/sub0/hw_params
access: MMAP_INTERLEAVED
format: S24_LE
subformat: STD
channels: 2
rate: 48000 (48000/1)
period_size: 512
buffer_size: 4096
# trace-cmd record -e regmap:*
# trace-cmd report
CPU 0 is empty
CPU 1 is empty
cpus=4
mpv-281 [002] 40.227541: regmap_cache_only: 70080000.ahub flag=0
mpv-281 [002] 40.227554: regmap_cache_only: 70080000.ahub flag=0
mpv-281 [002] 40.227572: regmap_cache_only: 70080400.i2s flag=0
mpv-281 [002] 40.236905: regmap_reg_read_cache: 2-001c reg=64 val=0
mpv-281 [002] 40.236921: regmap_reg_read_cache: 2-001c reg=80 val=0
mpv-281 [002] 40.236931: regmap_reg_read_cache: 2-001c reg=70 val=8000
mpv-281 [002] 40.236935: regmap_reg_read_cache: 2-001c reg=70 val=8000
mpv-281 [002] 40.236939: regmap_reg_write: 2-001c reg=70 val=8008
mpv-281 [002] 40.236950: regmap_hw_write_start: 2-001c reg=70 count=1
mpv-281 [002] 40.237776: regmap_hw_write_done: 2-001c reg=70 count=1
mpv-281 [002] 40.237828: regmap_reg_read_cache: 2-001c reg=73 val=1114
mpv-281 [002] 40.237831: regmap_reg_write: 2-001c reg=73 val=8114
mpv-281 [002] 40.237836: regmap_hw_write_start: 2-001c reg=73 count=1
mpv-281 [002] 40.241723: regmap_hw_write_done: 2-001c reg=73 count=1
mpv-281 [002] 40.241794: regmap_reg_read_cache: 70080400.i2s reg=0 val=400
mpv-281 [002] 40.241798: regmap_reg_write: 70080400.i2s reg=0 val=405
mpv-281 [002] 40.241817: regmap_reg_write: 70080400.i2s reg=4 val=2f
mpv-281 [002] 40.241820: regmap_reg_write: 70080400.i2s reg=14 val=1015504
mpv-281 [002] 40.241823: regmap_reg_write: 70080400.i2s reg=8 val=10001
kworker/u8:1-36 [003] 40.242987: regmap_reg_read_cache: 2-001c reg=63 val=0
kworker/u8:1-36 [003] 40.242992: regmap_reg_write: 2-001c reg=63 val=a810
kworker/u8:1-36 [003] 40.243002: regmap_hw_write_start: 2-001c reg=63 count=1
kworker/u8:1-36 [003] 40.243519: regmap_hw_write_done: 2-001c reg=63 count=1
kworker/u8:1-36 [003] 40.256915: regmap_reg_read_cache: 2-001c reg=63 val=a810
kworker/u8:1-36 [003] 40.256924: regmap_reg_write: 2-001c reg=63 val=e818
kworker/u8:1-36 [003] 40.256933: regmap_hw_write_start: 2-001c reg=63 count=1
kworker/u8:1-36 [003] 40.257590: regmap_hw_write_done: 2-001c reg=63 count=1
kworker/u8:1-36 [003] 40.257597: regmap_reg_read_cache: 2-001c reg=fa val=3f01
kworker/u8:1-36 [003] 40.257600: regmap_reg_read_cache: 2-001c reg=93 val=3030
mpv-281 [002] 40.257670: regmap_reg_read_cache: 2-001c reg=61 val=0
mpv-281 [002] 40.257674: regmap_reg_write: 2-001c reg=61 val=9800
mpv-281 [002] 40.257678: regmap_hw_write_start: 2-001c reg=61 count=1
mpv-281 [002] 40.258409: regmap_hw_write_done: 2-001c reg=61 count=1
mpv-281 [002] 40.258448: regmap_reg_read_cache: 2-001c reg=63 val=e818
mpv-281 [002] 40.258451: regmap_reg_write: 2-001c reg=63 val=e8d8
mpv-281 [002] 40.258454: regmap_hw_write_start: 2-001c reg=63 count=1
mpv-281 [002] 40.259701: regmap_hw_write_done: 2-001c reg=63 count=1
mpv-281 [002] 40.259751: regmap_hw_read_start: 2-001c reg=6a count=1
mpv-281 [002] 40.260357: regmap_hw_read_done: 2-001c reg=6a count=1
mpv-281 [002] 40.260361: regmap_reg_read: 2-001c reg=6a val=23
mpv-281 [002] 40.260365: regmap_reg_write: 2-001c reg=6a val=24
mpv-281 [002] 40.260367: regmap_hw_write_start: 2-001c reg=6a count=1
mpv-281 [002] 40.260881: regmap_hw_write_done: 2-001c reg=6a count=1
mpv-281 [002] 40.260885: regmap_hw_read_start: 2-001c reg=6c count=1
mpv-281 [002] 40.263245: regmap_hw_read_done: 2-001c reg=6c count=1
mpv-281 [002] 40.263251: regmap_reg_read: 2-001c reg=124 val=420
mpv-281 [002] 40.263255: regmap_reg_write: 2-001c reg=124 val=220
mpv-281 [002] 40.263260: regmap_hw_read_start: 2-001c reg=6a count=1
mpv-281 [002] 40.264325: regmap_hw_read_done: 2-001c reg=6a count=1
mpv-281 [002] 40.264330: regmap_reg_read: 2-001c reg=6a val=24
mpv-281 [002] 40.264334: regmap_hw_write_start: 2-001c reg=6c count=1
mpv-281 [002] 40.264827: regmap_hw_write_done: 2-001c reg=6c count=1
mpv-281 [002] 40.264859: regmap_reg_read_cache: 2-001c reg=8f val=1100
mpv-281 [002] 40.264867: regmap_reg_write: 2-001c reg=8f val=3100
mpv-281 [002] 40.264871: regmap_hw_write_start: 2-001c reg=8f count=1
mpv-281 [002] 40.265939: regmap_hw_write_done: 2-001c reg=8f count=1
mpv-281 [002] 40.265976: regmap_reg_read_cache: 2-001c reg=8e val=4
mpv-281 [002] 40.265981: regmap_reg_write: 2-001c reg=8e val=9
mpv-281 [002] 40.265986: regmap_hw_write_start: 2-001c reg=8e count=1
mpv-281 [002] 40.267142: regmap_hw_write_done: 2-001c reg=8e count=1
mpv-281 [002] 40.267172: regmap_reg_write: 2-001c reg=177 val=9f00
mpv-281 [002] 40.267182: regmap_hw_read_start: 2-001c reg=6a count=1
mpv-281 [002] 40.267842: regmap_hw_read_done: 2-001c reg=6a count=1
mpv-281 [002] 40.267845: regmap_reg_read: 2-001c reg=6a val=24
mpv-281 [002] 40.267848: regmap_reg_write: 2-001c reg=6a val=77
mpv-281 [002] 40.267851: regmap_hw_write_start: 2-001c reg=6a count=1
mpv-281 [002] 40.268937: regmap_hw_write_done: 2-001c reg=6a count=1
mpv-281 [002] 40.268943: regmap_hw_write_start: 2-001c reg=6c count=1
mpv-281 [002] 40.269454: regmap_hw_write_done: 2-001c reg=6c count=1
mpv-281 [002] 40.269484: regmap_reg_read_cache: 2-001c reg=63 val=e8d8
mpv-281 [002] 40.269487: regmap_reg_write: 2-001c reg=63 val=a8d0
mpv-281 [002] 40.269490: regmap_hw_write_start: 2-001c reg=63 count=1
mpv-281 [002] 40.270012: regmap_hw_write_done: 2-001c reg=63 count=1
mpv-281 [002] 40.271740: regmap_reg_read_cache: 2-001c reg=63 val=a8d0
mpv-281 [002] 40.271748: regmap_reg_write: 2-001c reg=63 val=a8f0
mpv-281 [002] 40.271753: regmap_hw_write_start: 2-001c reg=63 count=1
mpv-281 [002] 40.272240: regmap_hw_write_done: 2-001c reg=63 count=1
mpv-281 [002] 40.286888: regmap_reg_read_cache: 2-001c reg=63 val=a8f0
mpv-281 [002] 40.286901: regmap_reg_write: 2-001c reg=63 val=e8f8
mpv-281 [002] 40.286917: regmap_hw_write_start: 2-001c reg=63 count=1
mpv-281 [002] 40.287748: regmap_hw_write_done: 2-001c reg=63 count=1
mpv-281 [002] 40.287841: regmap_reg_read_cache: 2-001c reg=8f val=3100
mpv-281 [002] 40.287844: regmap_reg_write: 2-001c reg=8f val=1140
mpv-281 [002] 40.287847: regmap_hw_write_start: 2-001c reg=8f count=1
mpv-281 [002] 40.288310: regmap_hw_write_done: 2-001c reg=8f count=1
mpv-281 [002] 40.288339: regmap_reg_read_cache: 2-001c reg=91 val=c00
mpv-281 [002] 40.288341: regmap_reg_write: 2-001c reg=91 val=e00
mpv-281 [002] 40.288344: regmap_hw_write_start: 2-001c reg=91 count=1
mpv-281 [002] 40.288808: regmap_hw_write_done: 2-001c reg=91 count=1
mpv-281 [002] 40.288838: regmap_reg_read_cache: 2-001c reg=90 val=646
mpv-281 [002] 40.288840: regmap_reg_write: 2-001c reg=90 val=737
mpv-281 [002] 40.288844: regmap_hw_write_start: 2-001c reg=90 count=1
mpv-281 [002] 40.289792: regmap_hw_write_done: 2-001c reg=90 count=1
mpv-281 [002] 40.289828: regmap_reg_write: 2-001c reg=137 val=1c00
mpv-281 [002] 40.289837: regmap_hw_read_start: 2-001c reg=6a count=1
mpv-281 [002] 40.291772: regmap_hw_read_done: 2-001c reg=6a count=1
mpv-281 [002] 40.291782: regmap_reg_read: 2-001c reg=6a val=77
mpv-281 [002] 40.291788: regmap_reg_write: 2-001c reg=6a val=37
mpv-281 [002] 40.291792: regmap_hw_write_start: 2-001c reg=6a count=1
mpv-281 [002] 40.292320: regmap_hw_write_done: 2-001c reg=6a count=1
mpv-281 [002] 40.292324: regmap_hw_write_start: 2-001c reg=6c count=1
mpv-281 [002] 40.293579: regmap_hw_write_done: 2-001c reg=6c count=1
mpv-281 [002] 40.293616: regmap_reg_read_cache: 2-001c reg=8e val=9
mpv-281 [002] 40.293618: regmap_reg_write: 2-001c reg=8e val=5
mpv-281 [002] 40.293623: regmap_hw_write_start: 2-001c reg=8e count=1
mpv-281 [002] 40.294179: regmap_hw_write_done: 2-001c reg=8e count=1
mpv-281 [002] 40.294211: regmap_hw_read_start: 2-001c reg=6a count=1
mpv-281 [002] 40.295183: regmap_hw_read_done: 2-001c reg=6a count=1
mpv-281 [002] 40.295187: regmap_reg_read: 2-001c reg=6a val=37
mpv-281 [002] 40.295194: regmap_reg_write: 2-001c reg=6a val=24
mpv-281 [002] 40.295196: regmap_hw_write_start: 2-001c reg=6a count=1
mpv-281 [002] 40.296301: regmap_hw_write_done: 2-001c reg=6a count=1
mpv-281 [002] 40.296308: regmap_hw_read_start: 2-001c reg=6c count=1
mpv-281 [002] 40.298769: regmap_hw_read_done: 2-001c reg=6c count=1
mpv-281 [002] 40.298777: regmap_reg_read: 2-001c reg=124 val=220
mpv-281 [002] 40.298784: regmap_reg_write: 2-001c reg=124 val=420
mpv-281 [002] 40.298790: regmap_hw_read_start: 2-001c reg=6a count=1
mpv-281 [002] 40.299542: regmap_hw_read_done: 2-001c reg=6a count=1
mpv-281 [002] 40.299549: regmap_reg_read: 2-001c reg=6a val=24
mpv-281 [002] 40.299555: regmap_hw_write_start: 2-001c reg=6c count=1
mpv-281 [002] 40.300054: regmap_hw_write_done: 2-001c reg=6c count=1
mpv-281 [002] 40.300107: regmap_reg_read_cache: 2-001c reg=2 val=cbcb
mpv-281 [002] 40.300110: regmap_reg_write: 2-001c reg=2 val=4b4b
mpv-281 [002] 40.300115: regmap_hw_write_start: 2-001c reg=2 count=1
mpv-281 [002] 40.300756: regmap_hw_write_done: 2-001c reg=2 count=1
mpv/ao-290 [003] 40.721759: regmap_reg_read_cache: 70080000.ahub reg=0 val=70777
mpv/ao-290 [003] 40.721776: regmap_reg_write: 70080000.ahub reg=0 val=80070777
mpv/ao-290 [003] 40.721787: regmap_reg_read_cache: 70080400.i2s reg=0 val=405
mpv/ao-290 [003] 40.721789: regmap_reg_write: 70080400.i2s reg=0 val=80000405
mpv-281 [002] 41.693159: regmap_reg_read_cache: 70080000.ahub reg=0 val=80070777
mpv-281 [002] 41.693185: regmap_reg_write: 70080000.ahub reg=0 val=70777
mpv-281 [002] 41.693200: regmap_reg_read_cache: 70080400.i2s reg=0 val=80000405
mpv-281 [002] 41.693203: regmap_reg_write: 70080400.i2s reg=0 val=405
[-- Attachment #4: Type: text/plain, Size: 0 bytes --]
next prev parent reply other threads:[~2019-12-20 14:44 UTC|newest]
Thread overview: 182+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-10-18 15:48 [alsa-devel] tegra30 tdm audio support Ben Dooks
2019-10-18 15:48 ` Ben Dooks
2019-10-18 15:48 ` [alsa-devel] [PATCH v5 1/7] ASoC: tegra: add a TDM configuration callback Ben Dooks
2019-10-18 15:48 ` Ben Dooks
2019-10-24 15:50 ` [alsa-devel] " Jon Hunter
2019-10-24 15:50 ` Jon Hunter
2019-10-25 10:12 ` [alsa-devel] Applied "ASoC: tegra: add a TDM configuration callback" to the asoc tree Mark Brown
2019-10-25 10:12 ` Mark Brown
2019-10-18 15:48 ` [alsa-devel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples Ben Dooks
2019-10-18 15:48 ` Ben Dooks
2019-10-24 15:54 ` [alsa-devel] " Jon Hunter
2019-10-24 15:54 ` Jon Hunter
2019-10-25 10:12 ` [alsa-devel] Applied "ASoC: tegra: Allow 24bit and 32bit samples" to the asoc tree Mark Brown
2019-10-25 10:12 ` Mark Brown
2019-11-23 21:09 ` [alsa-devel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples Dmitry Osipenko
2019-11-23 21:09 ` Dmitry Osipenko
2019-11-25 10:37 ` [alsa-devel] " Ben Dooks
2019-11-25 10:37 ` Ben Dooks
2019-11-25 17:22 ` [alsa-devel] " Dmitry Osipenko
2019-11-25 17:22 ` Dmitry Osipenko
2019-11-25 17:28 ` [alsa-devel] " Dmitry Osipenko
2019-11-25 17:28 ` Dmitry Osipenko
2019-12-19 21:21 ` [alsa-devel] " Dmitry Osipenko
2019-12-19 21:21 ` Dmitry Osipenko
2019-12-20 10:56 ` [alsa-devel] " Ben Dooks
2019-12-20 10:56 ` Ben Dooks
2019-12-20 11:30 ` [alsa-devel] " Jon Hunter
2019-12-20 11:30 ` Jon Hunter
2019-12-20 11:38 ` [alsa-devel] " Ben Dooks
2019-12-20 11:38 ` Ben Dooks
2019-12-20 13:57 ` [alsa-devel] " Jon Hunter
2019-12-20 13:57 ` Jon Hunter
2019-12-20 14:43 ` Dmitry Osipenko [this message]
2019-12-20 14:43 ` Dmitry Osipenko
2019-12-20 14:56 ` [alsa-devel] " Ben Dooks
2019-12-20 14:56 ` Ben Dooks
2019-12-20 15:02 ` [alsa-devel] " Dmitry Osipenko
2019-12-20 15:02 ` Dmitry Osipenko
2019-12-20 15:25 ` [alsa-devel] " Ben Dooks
2019-12-20 15:25 ` Ben Dooks
2019-12-20 16:40 ` [alsa-devel] " Dmitry Osipenko
2019-12-20 16:40 ` Dmitry Osipenko
2019-12-20 17:06 ` [alsa-devel] " Ben Dooks
2019-12-20 17:06 ` Ben Dooks
2019-12-22 17:08 ` [alsa-devel] " Dmitry Osipenko
2019-12-22 17:08 ` Dmitry Osipenko
2020-01-05 0:04 ` [alsa-devel] " Ben Dooks
2020-01-05 0:04 ` Ben Dooks
2020-01-05 1:48 ` [alsa-devel] " Dmitry Osipenko
2020-01-05 1:48 ` Dmitry Osipenko
2020-01-05 10:53 ` [alsa-devel] " Ben Dooks
2020-01-05 10:53 ` Ben Dooks
2020-01-06 19:00 ` [alsa-devel] [Linux-kernel] " Ben Dooks
2020-01-06 19:00 ` Ben Dooks
2020-01-07 1:39 ` [alsa-devel] " Dmitry Osipenko
2020-01-07 1:39 ` Dmitry Osipenko
2020-01-08 11:37 ` [alsa-devel] " Jon Hunter
2020-01-08 11:37 ` Jon Hunter
2020-01-20 16:50 ` [alsa-devel] " Dmitry Osipenko
2020-01-20 16:50 ` Dmitry Osipenko
2020-01-20 17:36 ` [alsa-devel] " Ben Dooks
2020-01-20 17:36 ` Ben Dooks
2020-01-23 19:38 ` [alsa-devel] " Ben Dooks
2020-01-23 19:38 ` Ben Dooks
2020-01-23 21:59 ` Ben Dooks
2020-01-23 21:59 ` Ben Dooks
2020-01-23 22:11 ` Dmitry Osipenko
2020-01-23 22:11 ` Dmitry Osipenko
2020-01-24 4:31 ` Dmitry Osipenko
2020-01-24 4:31 ` Dmitry Osipenko
2020-01-24 16:56 ` Jon Hunter
2020-01-24 16:56 ` Jon Hunter
2020-01-24 17:00 ` Mark Brown
2020-01-24 17:00 ` Mark Brown
2020-01-24 17:03 ` Ben Dooks
2020-01-24 17:03 ` Ben Dooks
2020-01-24 16:50 ` Jon Hunter
2020-01-24 16:50 ` Jon Hunter
2020-01-24 17:00 ` Ben Dooks
2020-01-24 17:00 ` Ben Dooks
2020-01-28 7:49 ` Ricard Wanderlof
2020-01-28 7:49 ` Ricard Wanderlof
2020-01-24 17:06 ` Ben Dooks
2020-01-24 17:06 ` Ben Dooks
2020-01-27 19:20 ` Dmitry Osipenko
2020-01-27 19:20 ` Dmitry Osipenko
2020-01-27 19:23 ` Dmitry Osipenko
2020-01-27 19:23 ` Dmitry Osipenko
2020-01-28 8:59 ` Ben Dooks
2020-01-28 8:59 ` Ben Dooks
2020-01-28 13:19 ` [alsa-devel] " Jon Hunter
2020-01-28 13:19 ` Jon Hunter
2020-01-28 15:25 ` Dmitry Osipenko
2020-01-28 15:25 ` Dmitry Osipenko
2020-01-28 15:26 ` Mark Brown
2020-01-28 15:26 ` Mark Brown
2020-01-28 17:45 ` Dmitry Osipenko
2020-01-28 17:45 ` Dmitry Osipenko
2020-01-28 18:42 ` Jon Hunter
2020-01-28 18:42 ` Jon Hunter
2020-01-30 8:04 ` Ben Dooks
2020-01-30 8:04 ` Ben Dooks
2020-01-28 8:58 ` Ben Dooks
2020-01-28 8:58 ` Ben Dooks
2020-01-28 12:13 ` [alsa-devel] " Mark Brown
2020-01-28 12:13 ` Mark Brown
2020-01-28 17:42 ` Dmitry Osipenko
2020-01-28 17:42 ` Dmitry Osipenko
2020-01-28 18:19 ` Jon Hunter
2020-01-28 18:19 ` Jon Hunter
2020-01-29 0:17 ` Dmitry Osipenko
2020-01-29 0:17 ` Dmitry Osipenko
2020-01-30 8:05 ` [alsa-devel] (no subject) Ben Dooks
2020-01-30 8:05 ` Ben Dooks
2020-01-30 9:31 ` [alsa-devel] (no subject) Clemens Ladisch
2020-01-30 9:31 ` Clemens Ladisch
2020-01-30 9:39 ` [alsa-devel] " Ben Dooks
2020-01-30 9:39 ` Ben Dooks
2020-01-30 14:58 ` Clemens Ladisch
2020-01-30 14:58 ` Clemens Ladisch
2020-01-31 10:50 ` Ben Dooks
2020-01-31 10:50 ` Ben Dooks
2020-01-31 11:03 ` Clemens Ladisch
2020-01-31 11:03 ` Clemens Ladisch
2020-01-29 10:49 ` [alsa-devel] [Linux-kernel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples Jon Hunter
2020-01-29 10:49 ` Jon Hunter
2020-01-29 14:33 ` Jon Hunter
2020-01-29 14:33 ` Jon Hunter
2020-01-29 15:22 ` Dmitry Osipenko
2020-01-29 15:22 ` Dmitry Osipenko
2020-01-30 8:17 ` Ben Dooks
2020-01-30 8:17 ` Ben Dooks
2020-01-30 12:05 ` Jon Hunter
2020-01-30 12:05 ` Jon Hunter
2020-01-30 12:07 ` Ben Dooks
2020-01-30 12:07 ` Ben Dooks
2020-01-30 13:09 ` Jon Hunter
2020-01-30 13:09 ` Jon Hunter
2020-01-30 13:10 ` Mark Brown
2020-01-30 13:10 ` Mark Brown
2020-03-19 15:32 ` Ben Dooks
2020-03-19 15:32 ` Ben Dooks
2020-03-20 14:18 ` Dmitry Osipenko
2020-03-20 14:18 ` Dmitry Osipenko
2020-01-30 8:06 ` Ben Dooks
2020-01-30 8:06 ` Ben Dooks
2020-01-29 17:52 ` Ben Dooks
2020-01-29 17:52 ` Ben Dooks
2020-01-07 10:29 ` [alsa-devel] " Jon Hunter
2020-01-07 10:29 ` Jon Hunter
2020-01-07 10:35 ` [alsa-devel] " Ben Dooks
2020-01-07 10:35 ` Ben Dooks
2020-01-21 18:15 ` [alsa-devel] " Ben Dooks
2020-01-21 18:15 ` Ben Dooks
2020-01-21 18:54 ` Dmitry Osipenko
2020-01-21 18:54 ` Dmitry Osipenko
2019-10-18 15:48 ` [alsa-devel] [PATCH v5 3/7] ASoC: tegra: i2s: Add support for more than 2 channels Ben Dooks
2019-10-18 15:48 ` Ben Dooks
2019-10-24 16:12 ` [alsa-devel] " Jon Hunter
2019-10-24 16:12 ` Jon Hunter
2019-10-24 19:18 ` [alsa-devel] " Mark Brown
2019-10-24 19:18 ` Mark Brown
2019-10-25 7:48 ` [alsa-devel] " Jon Hunter
2019-10-25 7:48 ` Jon Hunter
2019-10-18 15:48 ` [alsa-devel] [PATCH v5 4/7] ASoC: tegra: disable rx_fifo after disable stream Ben Dooks
2019-10-18 15:48 ` Ben Dooks
2019-10-24 16:12 ` [alsa-devel] " Jon Hunter
2019-10-24 16:12 ` Jon Hunter
2019-10-25 10:12 ` [alsa-devel] Applied "ASoC: tegra: disable rx_fifo after disable stream" to the asoc tree Mark Brown
2019-10-25 10:12 ` Mark Brown
2019-10-18 15:48 ` [alsa-devel] [PATCH v5 5/7] ASoC: tegra: set i2s_offset to 0 for tdm Ben Dooks
2019-10-18 15:48 ` Ben Dooks
2019-10-25 7:58 ` [alsa-devel] " Jon Hunter
2019-10-25 7:58 ` Jon Hunter
2019-10-18 15:48 ` [alsa-devel] [PATCH v5 6/7] ASoC: tegra: config fifos on hw_param changes Ben Dooks
2019-10-18 15:48 ` Ben Dooks
2019-10-25 8:18 ` [alsa-devel] " Jon Hunter
2019-10-25 8:18 ` Jon Hunter
2019-10-18 15:48 ` [alsa-devel] [PATCH v5 7/7] ASoC: tegra: take packing settings from the audio cif_config Ben Dooks
2019-10-18 15:48 ` Ben Dooks
2019-10-25 8:47 ` [alsa-devel] " Jon Hunter
2019-10-25 8:47 ` Jon Hunter
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=449bdc3c-bf82-7cc4-6704-440dd100ca3a@gmail.com \
--to=digetx@gmail.com \
--cc=alsa-devel@alsa-project.org \
--cc=ben.dooks@codethink.co.uk \
--cc=broonie@kernel.org \
--cc=edward.cragg@codethink.co.uk \
--cc=jonathanh@nvidia.com \
--cc=lgirdwood@gmail.com \
--cc=linux-kernel@lists.codethink.co.uk \
--cc=linux-tegra@vger.kernel.org \
--cc=perex@perex.cz \
--cc=thierry.reding@gmail.com \
--cc=tiwai@suse.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.