Re: [PATCH] sata_nv ADMA/NCQ support for nForce4

[Robert Hancock <hancockr@shaw.ca>]

Mark Lord wrote:
> Robert Hancock wrote:
>>
>> +/* ADMA Physical Region Descriptor - one SG segment */
>> +struct nv_adma_prd {
>> +    __le64            addr;
>> +    __le32            len;
>> +    u8            flags;
>> +    u8            packet_len;
>> +    __le16            reserved;
>> +};
> ..
>> +/* ADMA Command Parameter Block
>> +   The first 5 SG segments are stored inside the Command Parameter 
>> Block itself.
>> +   If there are more than 5 segments the remainder are stored in a 
>> separate
>> +   memory area indicated by next_aprd. */
>> +struct nv_adma_cpb {
>> +    u8            resp_flags;    //0
>> +    u8            reserved1;     //1
>> +    u8            ctl_flags;     //2
>> +    // len is length of taskfile in 64 bit words
>> +     u8            len;           //3 +    u8            
>> tag;           //4
>> +    u8            next_cpb_idx;  //5
>> +    __le16            reserved2;     //6-7
>> +    __le16            tf[12];        //8-31
>> +    struct nv_adma_prd    aprd[5];       //32-111
>> +    __le64            next_aprd;     //112-119
>> +    __le64            reserved3;     //120-127
>> +};
> 
> 
> Are those CPB / PRD structs endian-safe when using a big-endian CPU?
> 
> Cheers

They should be, I believe cpu_to_leXX is used whenever the multi-byte 
elements are being written. Not that anyone would likely install a 
big-endian CPU on an nForce4 chipset ;-)

-- 
Robert Hancock      Saskatoon, SK, Canada
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