From: Heiko Stübner <heiko@sntech.de>
To: kvm-riscv@lists.infradead.org
Subject: [PATCH -next v17 02/20] riscv: Extending cpufeature.c to detect V-extension
Date: Fri, 31 Mar 2023 12:45:28 +0200 [thread overview]
Message-ID: <4789687.GXAFRqVoOG@diego> (raw)
In-Reply-To: <20230327164941.20491-3-andy.chiu@sifive.com>
Am Montag, 27. M?rz 2023, 18:49:22 CEST schrieb Andy Chiu:
> From: Guo Ren <ren_guo@c-sky.com>
>
> Add V-extension into riscv_isa_ext_keys array and detect it with isa
> string parsing.
>
> Signed-off-by: Guo Ren <ren_guo@c-sky.com>
> Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
> Signed-off-by: Greentime Hu <greentime.hu@sifive.com>
> Suggested-by: Vineet Gupta <vineetg@rivosinc.com>
> Co-developed-by: Andy Chiu <andy.chiu@sifive.com>
> Signed-off-by: Andy Chiu <andy.chiu@sifive.com>
> Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
Tested-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
WARNING: multiple messages have this Message-ID (diff)
From: "Heiko Stübner" <heiko@sntech.de>
To: linux-riscv@lists.infradead.org, palmer@dabbelt.com,
anup@brainfault.org, atishp@atishpatra.org,
kvm-riscv@lists.infradead.org, kvm@vger.kernel.org
Cc: vineetg@rivosinc.com, greentime.hu@sifive.com,
guoren@linux.alibaba.com, Guo Ren <ren_guo@c-sky.com>,
Andy Chiu <andy.chiu@sifive.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Conor Dooley <conor.dooley@microchip.com>,
Andrew Jones <ajones@ventanamicro.com>,
Guo Ren <guoren@kernel.org>, Jisheng Zhang <jszhang@kernel.org>,
Dao Lu <daolu@rivosinc.com>,
Vincent Chen <vincent.chen@sifive.com>,
Andy Chiu <andy.chiu@sifive.com>
Subject: Re: [PATCH -next v17 02/20] riscv: Extending cpufeature.c to detect V-extension
Date: Fri, 31 Mar 2023 12:45:28 +0200 [thread overview]
Message-ID: <4789687.GXAFRqVoOG@diego> (raw)
In-Reply-To: <20230327164941.20491-3-andy.chiu@sifive.com>
Am Montag, 27. März 2023, 18:49:22 CEST schrieb Andy Chiu:
> From: Guo Ren <ren_guo@c-sky.com>
>
> Add V-extension into riscv_isa_ext_keys array and detect it with isa
> string parsing.
>
> Signed-off-by: Guo Ren <ren_guo@c-sky.com>
> Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
> Signed-off-by: Greentime Hu <greentime.hu@sifive.com>
> Suggested-by: Vineet Gupta <vineetg@rivosinc.com>
> Co-developed-by: Andy Chiu <andy.chiu@sifive.com>
> Signed-off-by: Andy Chiu <andy.chiu@sifive.com>
> Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
Tested-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
WARNING: multiple messages have this Message-ID (diff)
From: "Heiko Stübner" <heiko@sntech.de>
To: linux-riscv@lists.infradead.org, palmer@dabbelt.com,
anup@brainfault.org, atishp@atishpatra.org,
kvm-riscv@lists.infradead.org, kvm@vger.kernel.org
Cc: vineetg@rivosinc.com, greentime.hu@sifive.com,
guoren@linux.alibaba.com, Guo Ren <ren_guo@c-sky.com>,
Andy Chiu <andy.chiu@sifive.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Conor Dooley <conor.dooley@microchip.com>,
Andrew Jones <ajones@ventanamicro.com>,
Guo Ren <guoren@kernel.org>, Jisheng Zhang <jszhang@kernel.org>,
Dao Lu <daolu@rivosinc.com>,
Vincent Chen <vincent.chen@sifive.com>,
Andy Chiu <andy.chiu@sifive.com>
Subject: Re: [PATCH -next v17 02/20] riscv: Extending cpufeature.c to detect V-extension
Date: Fri, 31 Mar 2023 12:45:28 +0200 [thread overview]
Message-ID: <4789687.GXAFRqVoOG@diego> (raw)
In-Reply-To: <20230327164941.20491-3-andy.chiu@sifive.com>
Am Montag, 27. März 2023, 18:49:22 CEST schrieb Andy Chiu:
> From: Guo Ren <ren_guo@c-sky.com>
>
> Add V-extension into riscv_isa_ext_keys array and detect it with isa
> string parsing.
>
> Signed-off-by: Guo Ren <ren_guo@c-sky.com>
> Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
> Signed-off-by: Greentime Hu <greentime.hu@sifive.com>
> Suggested-by: Vineet Gupta <vineetg@rivosinc.com>
> Co-developed-by: Andy Chiu <andy.chiu@sifive.com>
> Signed-off-by: Andy Chiu <andy.chiu@sifive.com>
> Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
Tested-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
next prev parent reply other threads:[~2023-03-31 10:45 UTC|newest]
Thread overview: 129+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-27 16:49 [PATCH -next v17 00/20] riscv: Add vector ISA support Andy Chiu
2023-03-27 16:49 ` Andy Chiu
2023-03-27 16:49 ` Andy Chiu
2023-03-27 16:49 ` [PATCH -next v17 01/20] riscv: Rename __switch_to_aux() -> fpu Andy Chiu
2023-03-27 16:49 ` Andy Chiu
2023-03-27 16:49 ` Andy Chiu
2023-03-27 16:49 ` [PATCH -next v17 02/20] riscv: Extending cpufeature.c to detect V-extension Andy Chiu
2023-03-27 16:49 ` Andy Chiu
2023-03-27 16:49 ` Andy Chiu
2023-03-31 10:45 ` Heiko Stübner [this message]
2023-03-31 10:45 ` Heiko Stübner
2023-03-31 10:45 ` Heiko Stübner
2023-03-27 16:49 ` [PATCH -next v17 03/20] riscv: Add new csr defines related to vector extension Andy Chiu
2023-03-27 16:49 ` Andy Chiu
2023-03-27 16:49 ` Andy Chiu
2023-03-31 16:03 ` Heiko Stübner
2023-03-31 16:03 ` Heiko Stübner
2023-03-31 16:03 ` Heiko Stübner
2023-03-27 16:49 ` [PATCH -next v17 04/20] riscv: Clear vector regfile on bootup Andy Chiu
2023-03-27 16:49 ` Andy Chiu
2023-03-27 16:49 ` Andy Chiu
2023-03-31 10:53 ` Heiko Stübner
2023-03-31 10:53 ` Heiko Stübner
2023-03-31 10:53 ` Heiko Stübner
2023-03-27 16:49 ` [PATCH -next v17 05/20] riscv: Disable Vector Instructions for kernel itself Andy Chiu
2023-03-27 16:49 ` Andy Chiu
2023-03-27 16:49 ` Andy Chiu
2023-03-31 10:56 ` Heiko Stübner
2023-03-31 10:56 ` Heiko Stübner
2023-03-31 10:56 ` Heiko Stübner
2023-03-27 16:49 ` [PATCH -next v17 06/20] riscv: Introduce Vector enable/disable helpers Andy Chiu
2023-03-27 16:49 ` Andy Chiu
2023-03-27 16:49 ` Andy Chiu
2023-03-31 10:56 ` Heiko Stübner
2023-03-31 10:56 ` Heiko Stübner
2023-03-31 10:56 ` Heiko Stübner
2023-03-27 16:49 ` [PATCH -next v17 07/20] riscv: Introduce riscv_v_vsize to record size of Vector context Andy Chiu
2023-03-27 16:49 ` Andy Chiu
2023-03-27 16:49 ` Andy Chiu
2023-03-31 11:02 ` Heiko Stübner
2023-03-31 11:02 ` Heiko Stübner
2023-03-31 11:02 ` Heiko Stübner
2023-03-27 16:49 ` [PATCH -next v17 08/20] riscv: Introduce struct/helpers to save/restore per-task Vector state Andy Chiu
2023-03-27 16:49 ` Andy Chiu
2023-03-27 16:49 ` Andy Chiu
2023-03-31 11:05 ` Heiko Stübner
2023-03-31 11:05 ` Heiko Stübner
2023-03-31 11:05 ` Heiko Stübner
2023-03-27 16:49 ` [PATCH -next v17 09/20] riscv: Add task switch support for vector Andy Chiu
2023-03-27 16:49 ` Andy Chiu
2023-03-27 16:49 ` Andy Chiu
2023-03-31 11:19 ` Heiko Stübner
2023-03-31 11:19 ` Heiko Stübner
2023-03-31 11:19 ` Heiko Stübner
2023-03-27 16:49 ` [PATCH -next v17 10/20] riscv: Allocate user's vector context in the first-use trap Andy Chiu
2023-03-27 16:49 ` Andy Chiu
2023-03-27 16:49 ` Andy Chiu
2023-03-28 17:22 ` Conor Dooley
2023-03-28 17:22 ` Conor Dooley
2023-03-28 17:22 ` Conor Dooley
2023-03-31 14:38 ` Andy Chiu
2023-03-31 14:38 ` Andy Chiu
2023-03-31 14:38 ` Andy Chiu
2023-03-31 13:08 ` Heiko Stübner
2023-03-31 13:08 ` Heiko Stübner
2023-03-31 13:08 ` Heiko Stübner
2023-03-27 16:49 ` [PATCH -next v17 11/20] riscv: Add ptrace vector support Andy Chiu
2023-03-27 16:49 ` Andy Chiu
2023-03-27 16:49 ` Andy Chiu
2023-03-28 5:53 ` Rolf Eike Beer
2023-03-28 5:53 ` Rolf Eike Beer
2023-03-28 5:53 ` Rolf Eike Beer
2023-03-28 6:46 ` Andy Chiu
2023-03-28 6:46 ` Andy Chiu
2023-03-28 6:46 ` Andy Chiu
2023-03-27 16:49 ` [PATCH -next v17 12/20] riscv: signal: check fp-reserved words unconditionally Andy Chiu
2023-03-27 16:49 ` Andy Chiu
2023-03-27 16:49 ` Andy Chiu
2023-04-01 22:21 ` Heiko Stübner
2023-04-01 22:21 ` Heiko Stübner
2023-04-01 22:21 ` Heiko Stübner
2023-03-27 16:49 ` [PATCH -next v17 13/20] riscv: signal: Add sigcontext save/restore for vector Andy Chiu
2023-03-27 16:49 ` Andy Chiu
2023-03-27 16:49 ` Andy Chiu
2023-04-01 22:20 ` Heiko Stübner
2023-04-01 22:20 ` Heiko Stübner
2023-04-01 22:20 ` Heiko Stübner
2023-03-27 16:49 ` [PATCH -next v17 14/20] riscv: signal: Report signal frame size to userspace via auxv Andy Chiu
2023-03-27 16:49 ` Andy Chiu
2023-03-27 16:49 ` Andy Chiu
2023-04-01 22:19 ` Heiko Stübner
2023-04-01 22:19 ` Heiko Stübner
2023-04-01 22:19 ` Heiko Stübner
2023-03-27 16:49 ` [PATCH -next v17 15/20] riscv: signal: validate altstack to reflect Vector Andy Chiu
2023-03-27 16:49 ` Andy Chiu
2023-03-27 16:49 ` Andy Chiu
2023-03-31 13:43 ` Heiko Stübner
2023-03-31 13:43 ` Heiko Stübner
2023-03-31 13:43 ` Heiko Stübner
2023-03-27 16:49 ` [PATCH -next v17 16/20] riscv: prevent stack corruption by reserving task_pt_regs(p) early Andy Chiu
2023-03-27 16:49 ` Andy Chiu
2023-03-27 16:49 ` Andy Chiu
2023-03-31 13:38 ` Heiko Stübner
2023-03-31 13:38 ` Heiko Stübner
2023-03-31 13:38 ` Heiko Stübner
2023-03-27 16:49 ` [PATCH -next v17 17/20] riscv: kvm: Add V extension to KVM ISA Andy Chiu
2023-03-27 16:49 ` Andy Chiu
2023-03-27 16:49 ` Andy Chiu
2023-03-31 13:36 ` Heiko Stübner
2023-03-31 13:36 ` Heiko Stübner
2023-03-31 13:36 ` Heiko Stübner
2023-03-27 16:49 ` [PATCH -next v17 18/20] riscv: KVM: Add vector lazy save/restore support Andy Chiu
2023-03-27 16:49 ` Andy Chiu
2023-03-27 16:49 ` Andy Chiu
2023-03-27 17:36 ` Anup Patel
2023-03-27 17:36 ` Anup Patel
2023-03-27 17:36 ` Anup Patel
2023-03-27 16:49 ` [PATCH -next v17 19/20] riscv: detect assembler support for .option arch Andy Chiu
2023-03-27 16:49 ` Andy Chiu
2023-03-27 16:49 ` Andy Chiu
2023-03-31 13:33 ` Heiko Stübner
2023-03-31 13:33 ` Heiko Stübner
2023-03-31 13:33 ` Heiko Stübner
2023-03-27 16:49 ` [PATCH -next v17 20/20] riscv: Enable Vector code to be built Andy Chiu
2023-03-27 16:49 ` Andy Chiu
2023-03-27 16:49 ` Andy Chiu
2023-03-31 13:32 ` Heiko Stübner
2023-03-31 13:32 ` Heiko Stübner
2023-03-31 13:32 ` Heiko Stübner
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=4789687.GXAFRqVoOG@diego \
--to=heiko@sntech.de \
--cc=kvm-riscv@lists.infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.