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From: Jes Sorensen <jes@sgi.com>
To: "Zhang, Xiantao" <xiantao.zhang@intel.com>
Cc: Carsten Otte <cotte@de.ibm.com>,
	"Luck, Tony" <tony.luck@intel.com>,
	linux-ia64@vger.kernel.org, kvm-ia64-devel@lists.sourceforge.net,
	kvm-devel@lists.sourceforge.net, Avi Kivity <avi@qumranet.com>,
	virtualization@lists.linux-foundation.org
Subject: Re: [01/17]PATCH  Add API for allocating dynamic TR resouce. V8
Date: Mon, 31 Mar 2008 09:03:45 +0000	[thread overview]
Message-ID: <47F0A8F1.2090109@sgi.com> (raw)
In-Reply-To: <42DFA526FC41B1429CE7279EF83C6BDC0104823F@pdsmsx415.ccr.corp.intel.com>

Hi Xiantao,

I general I think the code in this patch is fine. I have a couple of
nit-picking comments:

> +	if (target_mask&0x1) {

The formatting here isn't quite what most of the kernel does. It would
be better if you added spaces so it's a little easier to read, ie:

	if (target_mask & 0x1) {

> +		p = &__per_cpu_idtrs[cpu][0][0];
> +		for (i = IA64_TR_ALLOC_BASE; i <= per_cpu(ia64_tr_used,
> cpu);
> +								i++,
> p++) {
> +			if (p->pte&0x1)

Same thing here.

> +#define RR_TO_RID(rr) ((rr)<<32>>40)

I would prefer to have this one defined like this:

#define RR_TO_RID(rr)	(rr >> 8) & 0xffffff

It should generate the same code, but is more intuitive for the reader.

Otherwise I think this patch is fine - this is really just cosmetics.

Cheers,
Jes

WARNING: multiple messages have this Message-ID (diff)
From: Jes Sorensen <jes@sgi.com>
To: "Zhang, Xiantao" <xiantao.zhang@intel.com>
Cc: Carsten Otte <cotte@de.ibm.com>,
	"Luck, Tony" <tony.luck@intel.com>,
	linux-ia64@vger.kernel.org, kvm-ia64-devel@lists.sourceforge.net,
	kvm-devel@lists.sourceforge.net, Avi Kivity <avi@qumranet.com>,
	virtualization@lists.linux-foundation.org
Subject: Re: [01/17]PATCH Add API for allocating dynamic TR resouce. V8
Date: Mon, 31 Mar 2008 11:03:45 +0200	[thread overview]
Message-ID: <47F0A8F1.2090109@sgi.com> (raw)
In-Reply-To: <42DFA526FC41B1429CE7279EF83C6BDC0104823F@pdsmsx415.ccr.corp.intel.com>

Hi Xiantao,

I general I think the code in this patch is fine. I have a couple of
nit-picking comments:

> +	if (target_mask&0x1) {

The formatting here isn't quite what most of the kernel does. It would
be better if you added spaces so it's a little easier to read, ie:

	if (target_mask & 0x1) {

> +		p = &__per_cpu_idtrs[cpu][0][0];
> +		for (i = IA64_TR_ALLOC_BASE; i <= per_cpu(ia64_tr_used,
> cpu);
> +								i++,
> p++) {
> +			if (p->pte&0x1)

Same thing here.

> +#define RR_TO_RID(rr) ((rr)<<32>>40)

I would prefer to have this one defined like this:

#define RR_TO_RID(rr)	(rr >> 8) & 0xffffff

It should generate the same code, but is more intuitive for the reader.

Otherwise I think this patch is fine - this is really just cosmetics.

Cheers,
Jes

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  reply	other threads:[~2008-03-31  9:03 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2008-03-28  9:58 [01/17]PATCH Add API for allocating dynamic TR resouce Zhang, Xiantao
2008-03-28  9:58 ` Zhang, Xiantao
2008-03-29  2:48 ` [01/17]PATCH Add API for allocating dynamic TR resouce. V7 Zhang, Xiantao
2008-03-31  8:24 ` [01/17]PATCH Add API for allocating dynamic TR resouce. V8 Zhang, Xiantao
2008-03-31  9:03   ` Jes Sorensen [this message]
2008-03-31  9:03     ` Jes Sorensen
2008-03-31  9:53     ` Zhang, Xiantao
2008-03-31  9:53       ` Zhang, Xiantao
2008-03-31  9:03   ` Jes Sorensen
2008-03-31 13:41   ` Carsten Otte
2008-03-31 13:41     ` Carsten Otte
2008-04-01  1:00     ` Zhang, Xiantao
2008-04-01  1:00       ` Zhang, Xiantao
2008-04-01  7:48       ` Carsten Otte
2008-04-01  7:48       ` Carsten Otte
2008-04-01  7:48         ` Carsten Otte
2008-03-31 13:41   ` Carsten Otte
  -- strict thread matches above, loose matches on Subject: below --
2008-03-31  8:24 Zhang, Xiantao

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