From: Carsten Otte <cotte@de.ibm.com>
To: "Zhang, Xiantao" <xiantao.zhang@intel.com>
Cc: "Luck, Tony" <tony.luck@intel.com>,
linux-ia64@vger.kernel.org, kvm-ia64-devel@lists.sourceforge.net,
carsteno@de.ibm.com, Jes Sorensen <jes@sgi.com>,
Avi Kivity <avi@qumranet.com>,
virtualization@lists.linux-foundation.org,
kvm-devel@lists.sourceforge.net
Subject: Re: [01/17]PATCH Add API for allocating dynamic TR resouce. V8
Date: Tue, 01 Apr 2008 07:48:09 +0000 [thread overview]
Message-ID: <47F1E8B9.3010806@de.ibm.com> (raw)
In-Reply-To: <42DFA526FC41B1429CE7279EF83C6BDC010483DA@pdsmsx415.ccr.corp.intel.com>
Zhang, Xiantao wrote:
> Carsten Otte wrote:
>> Zhang, Xiantao wrote:
>>> +/* mca_insert_tr
>>> + *
>>> + * Switch rid when TR reload and needed!
>>> + * iord: 1: itr, 2: itr;
>>> + *
>>> +*/
>>> +static void mca_insert_tr(u64 iord)
>>> +{
>>> +
>>> + int i;
>>> + u64 old_rr;
>>> + struct ia64_tr_entry *p;
>>> + unsigned long psr;
>>> + int cpu = smp_processor_id();
>> What if CONFIG_PREEMPT is on, and we're being preempted and scheduled
>> to a different CPU here? Are we running preempt disabled here? If so,
>> the function header should state that this function needs to be called
>> preempt_disabled.
>
> The function insert one TR to local TLB, and doesn't allow preempt
> before and after the call, so the caller should be with preempt_disable
> before calling into this routine.
> Maybe the descripiton of this function should contain "Called with
> preempt disabled!". Does it make sense ?
Yea, I think a comment would help in that case :-).
WARNING: multiple messages have this Message-ID (diff)
From: Carsten Otte <cotte@de.ibm.com>
To: "Zhang, Xiantao" <xiantao.zhang@intel.com>
Cc: "Luck, Tony" <tony.luck@intel.com>,
linux-ia64@vger.kernel.org, kvm-ia64-devel@lists.sourceforge.net,
carsteno@de.ibm.com, Jes Sorensen <jes@sgi.com>,
Avi Kivity <avi@qumranet.com>,
virtualization@lists.linux-foundation.org,
kvm-devel@lists.sourceforge.net
Subject: Re: [01/17]PATCH Add API for allocating dynamic TR resouce. V8
Date: Tue, 01 Apr 2008 09:48:09 +0200 [thread overview]
Message-ID: <47F1E8B9.3010806@de.ibm.com> (raw)
In-Reply-To: <42DFA526FC41B1429CE7279EF83C6BDC010483DA@pdsmsx415.ccr.corp.intel.com>
Zhang, Xiantao wrote:
> Carsten Otte wrote:
>> Zhang, Xiantao wrote:
>>> +/* mca_insert_tr
>>> + *
>>> + * Switch rid when TR reload and needed!
>>> + * iord: 1: itr, 2: itr;
>>> + *
>>> +*/
>>> +static void mca_insert_tr(u64 iord)
>>> +{
>>> +
>>> + int i;
>>> + u64 old_rr;
>>> + struct ia64_tr_entry *p;
>>> + unsigned long psr;
>>> + int cpu = smp_processor_id();
>> What if CONFIG_PREEMPT is on, and we're being preempted and scheduled
>> to a different CPU here? Are we running preempt disabled here? If so,
>> the function header should state that this function needs to be called
>> preempt_disabled.
>
> The function insert one TR to local TLB, and doesn't allow preempt
> before and after the call, so the caller should be with preempt_disable
> before calling into this routine.
> Maybe the descripiton of this function should contain "Called with
> preempt disabled!". Does it make sense ?
Yea, I think a comment would help in that case :-).
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next prev parent reply other threads:[~2008-04-01 7:48 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-03-28 9:58 [01/17]PATCH Add API for allocating dynamic TR resouce Zhang, Xiantao
2008-03-28 9:58 ` Zhang, Xiantao
2008-03-29 2:48 ` [01/17]PATCH Add API for allocating dynamic TR resouce. V7 Zhang, Xiantao
2008-03-31 8:24 ` [01/17]PATCH Add API for allocating dynamic TR resouce. V8 Zhang, Xiantao
2008-03-31 9:03 ` Jes Sorensen
2008-03-31 9:03 ` Jes Sorensen
2008-03-31 9:03 ` Jes Sorensen
2008-03-31 9:53 ` Zhang, Xiantao
2008-03-31 9:53 ` Zhang, Xiantao
2008-03-31 13:41 ` Carsten Otte
2008-03-31 13:41 ` Carsten Otte
2008-03-31 13:41 ` Carsten Otte
2008-04-01 1:00 ` Zhang, Xiantao
2008-04-01 1:00 ` Zhang, Xiantao
2008-04-01 7:48 ` Carsten Otte [this message]
2008-04-01 7:48 ` Carsten Otte
2008-04-01 7:48 ` Carsten Otte
-- strict thread matches above, loose matches on Subject: below --
2008-03-31 8:24 Zhang, Xiantao
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