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From: "Jan Beulich" <jbeulich@novell.com>
To: Haitao Shan <haitao.shan@intel.com>
Cc: Kevin Tian <kevin.tian@intel.com>,
	xen-devel <xen-devel@lists.xensource.com>,
	Allen M Kay <allen.m.kay@intel.com>,
	Yunhong Jiang <yunhong.jiang@intel.com>,
	Weidong Han <weidong.han@intel.com>,
	Keir Fraser <keir.fraser@eu.citrix.com>
Subject: Re: [PATCH][RFC]Move PCI Configuration Spaces from Dom0 toXen
Date: Fri, 11 Apr 2008 14:08:10 +0200	[thread overview]
Message-ID: <47FF70CA.76E4.0078.0@novell.com> (raw)
In-Reply-To: <823A93EED437D048963A3697DB0E35DE01427E60@pdsmsx414.ccr.corp.intel.com>

>>> "Shan, Haitao" <haitao.shan@intel.com> 10.04.08 11:45 >>>
>Hi, Keir,
>
>This patch will move reading and writing of PCI configuration spaces
>from dom0 to Xen. It also changes VTD code, so that they can touch the
>PCI configuration spaces with proper lock.
>This will also benefit MSI support in Xen.
>Can you give some comments? Thanks!
> <<pci_conf_xen.patch>> 

I don't think this is going to do what you want when the kernel is using
mmconfig, or AMD's extended register space access method (not to
speak of the hopefully not in wide spread use type 2 access method).

Also I find it a little odd that you allow access to ports cf9...cfb rather
than properly handling namely byte accesses to cf9. Likewise it
doesn't consider the (albeit unlikely) case of multi-byte accesses to
ports crossing the cf8/cfc boundary.

Jan

  parent reply	other threads:[~2008-04-11 12:08 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2008-04-10  9:45 [PATCH][RFC]Move PCI Configuration Spaces from Dom0 to Xen Shan, Haitao
2008-04-10 10:24 ` Keir Fraser
2008-04-10 11:59   ` Haitao Shan
2008-04-10 16:54     ` Espen Skoglund
2008-04-11  0:42       ` [PATCH][RFC]Move PCI Configuration Spacesfrom " Shan, Haitao
2008-04-11  8:24         ` Keir Fraser
2008-04-11 12:08 ` Jan Beulich [this message]
2008-04-11 12:14   ` [PATCH][RFC]Move PCI Configuration Spaces from Dom0 toXen Keir Fraser
2008-04-11 14:35   ` Espen Skoglund

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